Texas Instruments TPS2379 EVM Manuel utilisateur

User's Guide

SLVU687–March 2012

TPS2379 EVM User’s Guide

This User’s Guide describes the evaluation module (EVM) for the TPS2379 (TPS2379EVM-106).

TPS2379 is an IEEE802.3at type 2 compliant powered device (PD) controller with a GATE output for

controlling external booster MOSFETs.

Contents

1 Introduction .................................................................................................................. 2

1.1 Features ............................................................................................................. 2

1.2 Applications ......................................................................................................... 2

2 Electrical Specifications at 25°C .......................................................................................... 2

3 Description ................................................................................................................... 3

4 Schematic .................................................................................................................... 4

5 General Configuration and Description .................................................................................. 5

5.1 Physical Access .................................................................................................... 5

5.2 Test Setup .......................................................................................................... 6

6 EVM Assembly Drawings and Layout Guidelines ...................................................................... 6

6.1 PC Drawings ........................................................................................................ 6

6.2 Layout Guidelines ................................................................................................ 10

6.3 EMI Containment ................................................................................................. 10

7 Bill of Materials ............................................................................................................. 11

List of Figures

1 TPS2379EVM Schematic.................................................................................................. 4

2 Typical TPS2379EVM Test Setup ........................................................................................ 6

3 Top Side Placement........................................................................................................ 7

4 Top Side Routing ........................................................................................................... 7

5 Layer Two Routing.......................................................................................................... 8

6 Layer Three Routing........................................................................................................ 8

7 Bottom Side Routing........................................................................................................ 9

8 Bottom Side Placement .................................................................................................... 9

List of Tables

1 TPS2379EVM Electrical and Performance Specifications............................................................. 2

2 Connector Functionality.................................................................................................... 5

3 Test Points................................................................................................................... 5

4 Jumpers ...................................................................................................................... 5

5 TPS2379EVM Bill of Materials .......................................................................................... 11

SLVU687–March 2012 TPS2379 EVM User’s Guide

Introduction

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1 Introduction

The TPS2379EVM allows reference circuit evaluation of the TI TPS2379 PD controller. The TPS2379

features GATE output for controlling external MOSFETs for extended power applications. It also features a

100 V pass transistor, 140 mA inrush current limiting, type-2 indication, auto-retry fault protection, and an

open-drain power-good output.

1.1 Features

• Gigabit Ethernet pass through interface

• Switched output return for “ease of use” loading

• GATE output to drive the external MOSFET

• Extra detection and class signature selection for non-standard applications

• IEEE 802.3at type-2 hardware classification with status flag (T2P) and LED

• DC/DC converter enable (CDB)

• Robust 100 V, 0.5 Ωinternal hotswap MOSFET and 100 V, 64 mΩexternal MOSFET

• Operating power in excess of 60W with four-pair PSE

1.2 Applications

• IEEE 802.3at-compliant devices

• Video and VoIP telephones

• Multiband access points

• Security cameras

• Pico-base stations

2 Electrical Specifications at 25°C

Table 1. TPS2379EVM Electrical and Performance Specifications

PARAMETER CONDITION MIN TYP MAX UNITS

POWER INTERFACE

Input Voltage Applied to the power pins of connectors J1 or J3 0 – 57 V

Operating Voltage After start up. 30 – 57 V

Rising input voltage at device terminals. – – 40

Input UVLO V

Falling input voltage. 30.5 – –

Detection voltage At device terminals 1.4 – 10.1 V

Classification voltage At device terminals 11.9 – 23.0 V

J6 shunt removed 24.9

Detection signature kΩ

J6 shunt installed 12.5

J7 shunt removed 38 – 42

Classification current mA

J7 shunt installed 64 – 72

Inrush current-limit 100 – 180 mA

Internal MOSFET only (R13 removed) 850 – 1200

Operating current-limit mA

Internal plus external (R13 installed) 2260

Efficiency Four input pairs. Measured from J1 to J4 60W output power 97.5%

2TPS2379 EVM User’s Guide SLVU687–March 2012

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Description

3 Description

TPS2379EVM-106 enables full evaluation of the TPS2379 device. Refer to the schematic shown in

Figure 1. Ethernet power is applied from J1 to T1/T2 and is dropped to the diode bridges (D3/D4/D8/D9 or

D5/D6/D10/D11) from the T1/T2 center taps. The series R-C circuit from each center tap help balance the

Ethernet cable impedance and are critical for ESD and EMI/EMC performance. These circuits are

terminated at TP10 (EGND) through the high voltage capacitor, C9. At the output of the diode bridges is

the EMI/EMC filter and transient protection for the TPS2379. R7 provides the detection signature and R8

provides the class 4 signature resistance to the PSE. A shunt on J6 can be installed to present a 12.5kΩ

detection signature resistance. A shunt on J7 can be installed to present a 37.4Ω(68mA) class signature

resistance.

To the right of the TPS2379 (U1) is the switched side of the PD controller. The TPS2379 RTN pin

provides inrush limited turn on and charge of the bulk capacitor, C3. During inrush, the TPS2379 GATE

pin is pulled low (with respect to VSS) disabling the external boost MOSFET, Q2. When inrush is

complete, the GATE pin goes high and enables a parallel conduction path through Q2 and the TPS2379

internal MOSFET. Q1 provides current limit for the external MOSFET when the voltage between TP12 and

TP11 reaches the base-emitter on threshold of Q1.

Additionally during inrush, the TPS2379 CDB pin is pulled low (with respect to the RTN pin). Since the

CDB pin is connected to the GATE of Q3, Q3 is off during inrush and J4 pin 1 is not connected to the RTN

pin. This allows the output load to remain connected during EVM testing. LED’s D1 and D2 provide

operational visual indications of T2P and ON respectively.

SLVU687–March 2012 TPS2379 EVM User’s Guide

PAIR36

PAIR78

PAIR45

PAIR12

VSS

VDD

T2P

CDB RTN

(ON)(T2P)

CDB

SRTN

T2P

VDD

LED BIAS

SWITCHED

OUTPUT

+54V@1A

POE INPUT ETHERNET DATA

EGND

NOTES

1NOT USED

Use for switched RTN

GATE

ESNS

XDEN

XCLS

63.4

FB1 500

B2100

SMAJ58A

1000pF

24.9k

0.1uF

1000pF

0.01uF

R10

0.01uF

R11

0.01uF

R12

0.01uF

B2100

D10

B2100

D11

B2100

FB2 500

+C3

47uF

12.1k

LN1271RAL

LN1371G

12.1k

R3 75

R6 75

R2 75

R1 75

R14 100k

TP1

TP11

TP3

TP5

TP4

TP7

TP2

TP8 TP9

D12

BZT52C18V

1000pF

1VDD

2DEN

3CLS

4VSS 5

RTN

CDB

T2P

GATE

PWPD

TPS2379DDA

PHY

LINE

ETH1-230LD

PHY

LINE

ETH1-230LD

R17

0.27

R13

150

R16 200k

TP6

TP12

FMMT493TC

R15

90.9

R18

TP10

IRFR3410PbF

BUK7275-100A

R19

24.9k

Schematic

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4 Schematic

Figure 1. TPS2379EVM Schematic

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General Configuration and Description

5 General Configuration and Description

5.1 Physical Access

Table 2 lists the TPS2379EVM connector functionality, Table 3 describes the test point availability and

Table 4 describes the jumper functionality.

Table 2. Connector Functionality

Connector Label Description

Power over ethernet (POE) input. Connect to power sourcing equipment (PSE) power and data

J1 PWR+DATA source.

J2 DATA Ethernet data pass through. Connect to downstream ethernet device.

Output connector to load. Connect pin #4 (VDD) to positive input and pin #1 (RTN) to low side of

J4 J4 load. Pin #2 (CDB) can be used to inhibit the converter while the TPS2379 output is ramping up. Pin

#3 (T2P) can be used to notify the load of when high power source is present.

D1 (RED) T2P T2P (type 2 PSE) LED. When ON this indicates that a type 2 PSE is detected.

D2 (GREEN) ON TPS2379 Output Powered.

Table 3. Test Points

Test Point Color Label Description

TP6 WHT GATE Gate output to external MOSFET

TP3 RED PAIR12 Data pair from pins 1 and 2 of J1

TP4 ORG PAIR36 Data pair from pins 3 and 6 of J1

TP5 RED PAIR45 Spare pair from pins 4 and 5 of J1

TP7 ORG PAIR78 Spare pair from pins 7 and 8 of J1

TP1 RED VDD High side output from bridge

TP2 WHT T2P Type 2 PSE output from TPS2379

TP9 BLK RTN Switched low side from TPS2379

TP8 WHT CDB Converter disable output from TPS2379

TP11 BLK VSS Low side output from bridge

TP10 SM EGND Earth or chassis ground point

TP12 BLK ESNS External MOSFET current sense point

Table 4. Jumpers

Jumper Label Description

J3 J4 LED bias jumper. Install to furnish LED bias for T2P and ON LED’s

J5 J5 Switched output return bypass jumper.

This jumper can be used to switch in alternate non-standard detection resistors. When

J6 XDEN the shunt is removed, the standard 24.9kΩis used and when the shunt is installed, the

detection resistance is ~12.5kΩ

This jumper can be used to switch in alternate non-standard classification resistors.

J7 XCLS When the shunt is removed, the standard class 4 63.4Ω(40mA) resistor is used and

when the shunt is installed, the classification resistance is ~37.4Ω(68mA).

SLVU687–March 2012 TPS2379 EVM User’s Guide

DUT

TPS2379EVM

PSE

Ethernet

Device

VDD

SRTN

(Ethernet Cable)

T2P

CDB

EVM Assembly Drawings and Layout Guidelines

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5.2 Test Setup

Figure 2 shows a typical test setup for TPS2379EVM. Connect J1 to the power sourcing equipment (PSE)

Power for the Ethernet device is available at J4 and the pass through Ethernet data is available at J2.

Figure 2. Typical TPS2379EVM Test Setup

6 EVM Assembly Drawings and Layout Guidelines

6.1 PC Drawings

The following figures show component placement and layout of the EVM.

6TPS2379 EVM User’s Guide SLVU687–March 2012

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EVM Assembly Drawings and Layout Guidelines

Figure 3. Top Side Placement

Figure 4. Top Side Routing

SLVU687–March 2012 TPS2379 EVM User’s Guide

EVM Assembly Drawings and Layout Guidelines

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Figure 5. Layer Two Routing

Figure 6. Layer Three Routing

8TPS2379 EVM User’s Guide SLVU687–March 2012

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EVM Assembly Drawings and Layout Guidelines

Figure 7. Bottom Side Routing

Figure 8. Bottom Side Placement

SLVU687–March 2012 TPS2379 EVM User’s Guide

EVM Assembly Drawings and Layout Guidelines

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6.2 Layout Guidelines

The layout of the PoE front end should follow power and EMI/ESD best practice guidelines. A basic set of

recommendations include:

• Parts placement must be driven by power flow in a point-to-point manner; RJ-45, Ethernet transformer,

diode bridges, TVS and 0.1-µF capacitor, and TPS2379.

• All leads should be as short as possible with wide power traces and paired signal and return.

• There should not be any crossovers of signals from one part of the flow to another.

• Spacing consistent with safety standards like IEC60950 must be observed between the 48-V input

voltage rails and between the input and an isolated converter output.

• The TPS2379 should be located over split, local ground planes referenced to VSS for the PoE input

and to RTN for the switched output.

• Large copper fills and traces should be used on SMT power-dissipating devices, and wide traces or

overlay copper fills should be used in the power path.

6.3 EMI Containment

• Use compact loops for dv/dt and di/dt circuit paths (power loops and gate drives)

• Use minimal, yet thermally adequate, copper areas for heat sinking of components tied to switching

nodes (minimize exposed radiating surface).

• Use copper ground planes (possible stitching) and top layer copper floods (surround circuitry with

ground floods)

• Use 4 layer PCB if economically feasible (for better grounding)

• Minimize the amount of copper area associated with input traces (to minimize radiated pickup)

• Use Bob Smith terminations, Bob Smith EFT capacitor, and Bob Smith plane

• Use Bob Smith plane as ground shield on input side of PCB (creating a phantom or literal earth

ground)

• Use of ferrite beads on input (allow for possible use of beads or 0 ohm resistors)

• Maintain physical separation between input-related circuitry and power circuitry (use ferrite beads as

boundary line)

• Possible use of common-mode inductors

• Possible use of integrated RJ-45 jacks (shielded with internal transformer and Bob Smith terminations)

• End-product enclosure considerations (shielding)

10 TPS2379 EVM User’s Guide SLVU687–March 2012

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