ST STM32 Nucleo Instructions d'installation et d'utilisation

Introduction

This document describes the thermal management guidelines for applications based on STM32 microcontrollers or

microprocessors, that, like any silicon-based integrated circuits, have well-defined storage and operating temperature ranges.

Only the STM32 operating temperature ranges defined in product datasheets are considered: the maximum operating

temperature range and the product operating temperature range. The maximum operating temperature range defines the

threshold temperature beyond which there is a high probability of permanent damage to the device. The operating temperature

range defines the threshold temperature beyond which the electrical parameters are not guaranteed to be within the

specification.

The STM32 maximum specified operating range is referenced to the junction temperature, whereas the operating temperature

range is referenced to the ambient temperature and possibly also to the junction temperature.

Specifying these operating temperature ranges by reference to the ambient temperature or to the junction temperature, is a

common practice in the semiconductor industry. Depending on the device and its power consumption, semiconductor vendors

use either the ambient temperature or the junction temperature for the product operating temperature range specification.

Thermal management guidelines for STM32 applications

AN5036

Application note

AN5036 - Rev 3 - April 2019

For further information contact your local STMicroelectronics sales office.

www.st.com

1General information

This document applies to STM32 Arm®-based devices.

Note: Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

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General information

AN5036 - Rev 3 page 2/28

2Thermal systems definitions and basic concepts

This section details basic definitions and concepts related to thermal systems, as applied to silicon-based

integrated circuits (ICs).

2.1 Thermal systems definitions

Heat:

The amount of energy exchanged between two different bodies spontaneously under the effect of their different

temperatures.

Temperature:

A comparative measurement of how much a body is hot or cold. The temperature of a given body increases as it

absorbs heat and decreases as it releases heat out.

Temperature gradient:

Refer to the uneven temperature distribution over one body. The temperature gradient magnitude reflects the

difference in temperature from one location to another inside a body.

Thermal resistance:

The property of a material to conduct a certain amount of heat under a certain temperature gradient.

2.2 Thermal systems study

Thermal systems are designed with complex thermal models and advanced simulation software tools. These

models and tools are used to obtain accurate results.

To resolve a thermal system with an acceptable accuracy and with limited computation effort, many simplifying

hypotheses can be considered (such as considering the thermal resistance to be temperature independent).

Considering these hypotheses, the study of thermal systems is close to the study of electrical systems, where the

heat is equivalent to the electrical current, the temperature is equivalent to the voltage and the thermal resistance

is equivalent to the electrical resistance.

Figure 1. Analogy between electrical and thermal system domains

VAB RAB

Electrical current

Thermal power flow

Temperature gradient

Electrical

system domain

Thermal

system domain

θAB

This model is widely accepted by the electronics industry. Most semiconductor vendors provide thermal resistance

parameters of their packaged products based on this simplified model in accordance with certain standardization

bodies (like JEDEC EIA/JESD 51-X) standards. Most electronics designers consider the provided thermal

resistance parameters when dealing with heat dissipation in their application, or at least at an earlier stage when

selecting the right package for a given product.

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Thermal systems definitions and basic concepts

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2.3 Thermal model of a chip carrier

A simplified thermal model for an LQFP-packaged STM32 product is provided in the figure below. All surface

temperatures and thermal resistance (as defined by the JEDEC EIA/JESD 51-X standards) are depicted.

Figure 2. Thermal model of a chip carrier

Case

Die

PCB(printed

circuit board)

θCA

θJC

θJB

θBA

PT: Total power dissipated

PC: Power dissipated through the case

PB: Power dissipated through the bottom

θJA

The definition of thermal parameters mentionned in this figure, are listed in the table below.

Table 1. Thermal parameters

Symbol Description Unit

TJTemperature of the die

°C

TATemperature of surrounding air

TCTemperature of the package top

TBTemperature of the board near the device

θJC Thermal resistance between the die and the package

°C/W

θJB Thermal resistance between the die and the PCB on which the IC is mounted

θJA Thermal resistance between the die and the air surrounding the die package

PBAmount of power dissipated by the device through the board

PCAmount of power dissipated by the device through the package top

PTThe total power dissipated by the device (PT = PB + PC)

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Thermal model of a chip carrier

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3STM32 thermal parameters

This section explains the STM32 thermal parameters as specified by their respective datasheets.

3.1 Ambient temperature

In the electronics field there is no consensus about a standard and unified definition of ambient temperature.

What is sure is that the ambient temperature is the temperature of the device surroundings. But there are many

different ways to measure it. Measurement parameters such as the distance between the measurement point and

the device, if the surrounding air is steady or not, the volume of the test environment, can severely impact later

interpretation of the results.

JEDEC provides a standard definition for ambient temperature but that definition is limited to the JEDEC test

environment used when determining package thermal characteristics.

Most of the time the application operating conditions differ significantly from the JEDEC environment, making the

JEDEC defined thermal resistance from junction to ambient temperature, Theta-JA, not practically usable for high-

performance high-power-dissipation devices.

3.2 Junction temperature

Junction temperature is the widely used term to refer to the temperature of a die. Obviously, the die temperature

is the most important temperature to consider for a device as all its electrical parameters depend on this junction

temperature. Indeed, the junction temperature is the one considered when qualifying the reliability of a device.

In theory the die temperature is not uniformly distributed across the die. There is a temperature gradient across

the die. But in practice, the die temperature is generally considered to be uniformly distributed and only a single

temperature measurement is provided. This reduction of a temperature gradient into one temperature reading

introduces a small incertitude into subsequent assumptions and computations when the die dimensions are

relatively small. This is the case for most STM32 devices.

3.3 Ambient temperature versus junction temperature

Both ambient temperature and junction temperature to specify the thermal performance of STM32 devices.

For many STM32 products, only the maximum ambient temperature is specified as their thermal performance

limit. The junction temperature is also sometimes added.

The use of the ambient temperature for thermal performance assessment is much easier than using the junction

temperature, as the die of a packaged device is not accessible. This makes the conventional temperature

measurement methods unusable for measuring the die temperature.

Measuring the junction temperature requires more advanced measurement techniques. Most STM32 embed a

junction temperature sensor, that serves as a primitive building block for thermal watchdog implementations. But

at design stage, this embedded temperature sensor cannot help in determining the thermal performance of the

whole application. Instead, the junction temperature is estimated at the design stage. It is based on many

parameters including the application power profile, the device thermal resistances, the surrounding temperature

including the board temperature and the device case temperature. For accurate estimation of the junction

temperature, modelling software tools are used when the final application has a complex thermal model and a

complex power profile.

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STM32 thermal parameters

AN5036 - Rev 3 page 5/28

3.4 Case temperature

Case temperature is the temperature of the top of the package used as a chip carrier for the die. The JEDEC

standards specify that the temperature sensor must be placed at the center of the package top using 1 mm of

conductive epoxy.

If the package case-to-ambient thermal resistance is much higher than the package junction-to-case thermal

resistance (one order of magnitude at least) and as most devices dissipated power goes through the board, the

junction temperature can be conflated with case temperature if a certain incertitude is acceptable.

3.5 Board temperature

The board temperature, as defined by the JEDEC standards, is the temperature measured near the center lead of

the longest side of the device. The board temperature and the package junction-to-board thermal resistance are

very critical parameters when assessing the device thermal performance.

Under steady air conditions, most of the heat generated by the device is dissipated through the board. The heat

dissipated through the board can be 20 times higher than the heat dissipated through the package top. For

instance, for a JEDEC high-conductivity test board and under steady air conditions, 95 % of the device power

dissipation passes through the board and only 5 % is dissipated through the package.

3.6 STM32 thermal parameters

Most of STM32 datasheets give only Theta-JA thermal resistance, but some specify also Theta-JC and Theta-JB,

defined in the table below.

Table 2. STM32 thermal resistances

Thermal metric Symbol Value Main purpose

Theta-JA θJA

Tj − TA

Used to rank package performance in JEDEC

environment

Theta-JC θJC

Tj − TC

Used to rank package performance

Used in simulations with 2R model (2R =

two resistances)

Theta-JB θJB

Tj − TB

Used to rank package performance

Used in simulations with 2R model

These parameters are determined under the following specific conditions that differ from the final application

conditions:

•Theta-JA: The JEDEC51-2 document Integrated Circuits Thermal Test Method Environmental Conditions -

Natural Convection (Still Air) describes the thermal test method to define Theta-JA.

•Theta-JB: The JEDEC51 document Integrated Circuit Thermal Test Method Environmental Conditions –

Junction-to-Board describes the thermal test method to define Theta-JB.

•Theta-JC: The MIL-STD-883E document Test method standard Microcircuits describes the thermal test

method to define Theta‑JC.

These thermal resistances must be carefully defined in semiconductor packages and devices context.

The most important point about these values, making them “theta”, is that the total power dissipated by the device

flows between the two following “points”:

• the junction

• ambient or board temperature

There are no extraneous parallel thermal paths in the system allowing some of the heat to “leak” away. All the

heat leaving the junction eventually arrives at or passes through the other point.

It is usually possible to know the total power dissipation of a device but it is far more difficult to know which

fraction of the heat flows out through the case top, versus the part that flows through the leads, and versus the

part that flows through the air gap under the package.

Theta-JC and Theta-JB are generally used as input for thermal simulation tools, that calculate which fraction of

the heat flows out through the top and the bottom of the device.

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Case temperature

AN5036 - Rev 3 page 6/28

4Power dissipation and cooling methods

This section provides recommendations for efficient thermal analysis on STM32 applications, focusing on the

following points:

• Power dissipation and its variation with various factors named PVTA (process, voltage, (junction)

temperature and activity)

• How to minimize power consumption.

• How to optimize thermal dissipation.

4.1 Power dissipation

There are two types of current consumed by the device:

• Static current: also called leakage current, depends on the process, voltage and junction temperature but

does not depend on the activity.

• Dynamic current: depends on the process, voltage and activity but does not depend on the junction

temperature (at least in first approximation).

The static/leakage current grows exponentially with the junction temperature (whilst the dynamic current does not

significantly change).

Therefore, the total current can be written as follows:

ITotal P,V,Tj,activity =Istatic P,V,Tj+IDynamic P,V,Tj,activity

The dissipated power varies with PVTA conditions and is calculated as the product of the voltage generated

across the device and the (average) current consumed.

The junction temperature increase above the ambient temperature is calculated as a product of the dissipated

power and the junction-to-room thermal resistance.

The junction temperature must be kept lower than the maximum target given by the following equation:

Tj=Troom +Pdiss ×Tℎeta_j_room <Tj_max

Important:

In this simplified formula used only for didactic purpose, Theta_j_room is a complex coefficient that is not a device

characteristic but a system one (device + other components + boards + casing).

The following methods to keep the junction temperature below the ambient temperature, are detailed in the next

sections:

• Limiting Pdiss

• Limiting Theta_j_room (cooling system, host board and casing design)

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Power dissipation and cooling methods

AN5036 - Rev 3 page 7/28

4.2 Minimizing power consumption (Pdiss)

To reduce the power consumption, the first action is to reduce the supply voltage. Some STM32 devices offer a

multi-power domain architecture that allows the different power domains to be set in low-power mode to optimize

the power efficiency (see the product datasheets for more details).

The power consumption profile varies also with the application. Some applications are most of the time in Idle

mode, working on full or limited capacity only when an event occurs. Some others demand a regular workload.

For these various power profiles, the user programmer enables the low power modes, in the software, and then

allows power saving.

The most common available modes are listed below:

•Power gating: reduces power consumption by shutting off the current to block of the circuit that are not in

use.

•Clock gating: reduces dynamic power dissipation by shutting down clocks to a circuit or portion of clock

tree.

•Dynamic voltage scaling: power management technique where the voltage is increased or decreased,

depending upon circumstances.

•Dynamic frequency scaling (also known as CPU throttling): frequency automatically adjusted on-the-fly

depending on the actual needs, to conserve power and reduce the amount of heat generated.

All these modes are available for example on STM32H7 Series and STM32MP1 Series products (see related

reference manuals for more details).

4.3 Power dissipation variation with junction temperature

In this section, process, voltage and activity factors are kept constant and there is a focus on the effect of junction

temperature.

The static/leakage current grows exponentially with the junction temperature (whilst the dynamic current does not

significantly change).

The power dissipation variation with junction temperature has the following main consequences:

• A cooling solution must be implemented to limit the junction temperature below 125 °C (maximum junction

temperature).

• If the cooling system is not efficient enough, the device can go in thermal runaway that may be destructive.

When performing system-level thermal simulations in the design phase, it is fundamental to input junction

temperature dependent power dissipation.

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Minimizing power consumption (Pdiss)

AN5036 - Rev 3 page 8/28

4.4 Risk of thermal runaway

The cooling system of a design is characterized by the junction-to-room temperature thermal resistance,

Theta_j_room.

This thermal resistance gives the capability to dissipate power in the design while limiting the junction

temperature.

The heat dissipation capability (HDC) is given by the following equation:

HDC =Tj− Troom /Tℎeta_j_room

The figure below shows the operating point at the intersection of the curve of the power that can be dissipated

inside the design at a given Tj(HDC) and the curve of the power effectively dissipated inside the design (Pdiss).

Figure 3. HDC (heat dissipation capability)

Power

0Troom

Slope = 1 / Theta_j_room

HDC

Better

Worse

Case 1

The figure below shows the intersection point that defines a clear operating point. No thermal runaway.

Figure 4. HDC and junction-temperature-dependent dissipated power (case 1)

Power

0Troom

Operating point

@ Troom Pdiss

125 °c

HDC

Slope = 1 / Theta_j_room

Effective Tj

The cooling design is safe (no thermal runaway) if an intersection point exists for Troom = Troom_max, with a

junction temperature < 125 °C.

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Risk of thermal runaway

AN5036 - Rev 3 page 9/28

Case 2

The figure below shows the effect of an increased room temperature (without changing any other factors).

Figure 5. HDC and junction-temperature-dependent dissipated power (case 2)

Power

0Troom

No intersection point

Thermal runaway

Pdiss

125 °c

HDC

Troom_max

Case 3

The figure below shows the effect of an increased junction-to-room thermal resistance (without changing any

other factors).

Figure 6. HDC and junction-temperature-dependent dissipated power (case 3)

Power

0Troom

No intersection point

Thermal runaway

Pdiss

125 °c

HDC

The two curves in case 2 and case 3 do not intersect. For this reason, no stable operating point is defined. This is

a condition of thermal runaway.

Case 4

The figure below shows the effect of a decrease in power dissipation (without changing any other factors).

Figure 7. HDC and junction-temperature-dependent dissipated power (case 4)

Power

0Troom_max

No intersection point

Thermal runaway

Pdiss

125 °c

HDC

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Risk of thermal runaway

AN5036 - Rev 3 page 10/28

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