ST STM8A Instructions d'installation et d'utilisation

July 2009 Doc ID 15988 Rev 1 1/12

AN3006

Application note

EMC guidelines for STM8A microcontroller

Introduction

To meet the demand for more functionalities, better performance and reduced cost, the

semiconductor industry develops microcontrollers with both high density design technology

and higher clock frequencies. This has intrinsically increased potential noise emission and

noise sensitivity.

Therefore, application developers must now apply EMC “hardening” techniques in the

design of firmware and PCB layout at system level.

This application note is intended for application designers who need to reach the optimum

level of EMC performance. It gives microcontroller EMC features and compliance standards.

This document only concentrates on STM8A features and behaviors. For general

information on EMC for ST microcontrollers, refer to the “EMC design guide for ST

microcontrollers” application note (AN1709).

General recommendations for STM8A devices are summarized in the “Getting started with

the STM8A” application note (AN2677). This document also provides basic EMC

recommendations.

Related documents

AN1015: Software techniques for improving microcontroller EMC performance.

AN1709: EMC design guide for ST microcontrollers.

AN2677: Getting started with the STM8A.

RM0009: STM8A reference manual.

www.st.com

Table of contents AN3006

2/12 Doc ID 15988 Rev 1

Table of contents

1 STM8A: designed for EMC robustness . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Layout recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.1 Two-layer board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.2 Single layer board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4 EMC features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5 Software recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5.1 Critical bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5.2 Illegal opcodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5.3 Reset sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

AN3006 STM8A: designed for EMC robustness

Doc ID 15988 Rev 1 3/12

1 STM8A: designed for EMC robustness

Most STM8A product family applications require a high level of robustness. The STM8A

devices have been designed to meet this requirement with a cost effective approach.

The following built-in features have been implemented for this purpose:

●Independent watchdog (IWDG) and window watchdog (WWDG) to detect unexpected

code execution, application behavior or code corruption

●Clock security system (CSS) to monitor external clock failures

●POR/BOR to make sure the microcontroller is properly supplied

●Critical registers complemented in order to prevent corruption

●Data EEPROM and Flash program memory which are write protected and which can

only be unprotected by entering a key combination

●Built-in I/O protection diodes

All these features could not be efficient enough without following board design EMC

recommendations.

Power supply AN3006

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2 Power supply

The STM8A product family is designed for standard applications in the 3.3 V to 5 V

(+/-10%) supply voltage range.

All power pins must be connected: VDD/VSS, VDDA/VSSA, VDDIOx/VSSIOx.

The VCAP pin is the regulator output. It provides the 1.8 V supply to the core and the

peripherals. This pin must be decoupled with a 470 nF up to 1µF capacitor. If not, or if a

wrong capacitor value is connected, the reset pin could toggle continuously.

For products with separated VDD and VDDIO1, it is strongly recommended to connect both

pins and decouple them with a single capacitor of 100 nF.

VDDA and VDDIO2, when present, must be decoupled with a dedicated 100 nF capacitor.

When designing the layout, all decoupling capacitors (including VCAP capacitor) must be

connected as close as possible to the VDD, VDDA, VDDIOx and VCAP pins.

Power supply connections are shown in the following diagram.

Figure 1. Power supply connections

Main / Low power

regulator

CPU

RAM

Logic

Analog functions

IOsIOs

XTAL

Star connected

Analog

signal

VCAP

VDD/VDDIO1

VDDIO2

VSSIO2

VDDA

VSSA

OSCIN

OSCOUT

VDDIO

VSSIO

VDDIO

3.3V - 5V

VSS/VSSIO1

ai15330B

AN3006 Layout recommendations

Doc ID 15988 Rev 1 5/12

3 Layout recommendations

The schematic diagram shows the appropriate bill of materials but, for EMC performance,

special care should be taken for the ground plane layout, track width and length, etc.

It is important to pay special attention to:

●the ground plane below the device used as a shield

●the supplies which should run around the device towards the other components (to

avoid creating a second power supply way).

●the ground path between the capacitor-loaded resonator and VSS which should be as

short as possible.

3.1 Two-layer board

Due to the position of VDDIO2 and VSSIO2, a two-layer board design is recommended for 44-

pin package and above.

Figure 2. Top view of a 64-pin package layout

Note: Grey: bottom side

Dark grey: top side

VSS

VDD

Crystal

Supplies towards other components

1: RESET

2: OSCIN

3: OSCOUT

4: VSSIO1

5: VSS

6: VCAP

7: VDD

8: VDDIO1

19: VDDA

20: VSSA

39: VSSIO2

40: VDDIO2

ai15361

Layout recommendations AN3006

6/12 Doc ID 15988 Rev 1

Figure 3. Bottom view of a 64-pin package layout

Note: Grey: bottom side

Dark grey: top side

Crystal

ai15362

AN3006 Layout recommendations

Doc ID 15988 Rev 1 7/12

3.2 Single layer board

For 32-pin package and below, a single layer board can offer a very good level of EMC

performance.

Figure 4. Top view of a 32-pin package layout

VSS

VDD

Suppliestowardsother components

Crystal

1: RESET

2: OSCIN

3: OSCOUT

4: VSS

5: VCAP

6: VDD

7: VDDIO1

9: VDDA

10: VSSA ai15363B

EMC features AN3006

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4 EMC features

EMC features are specific to each device. Please refer to the Electrical features section of

the product datasheet for any information on these features.

AN3006 Software recommendations

Doc ID 15988 Rev 1 9/12

5 Software recommendations

The standard software techniques for improving EMC performance described in the AN1015

application note (“Software techniques for improving microcontroller EMC performance”)

also apply to the STM8A product family.

This section lists the STM8A specifications related to the software techniques written in the

AN1015. It gives the values for STM8A products, although it is strongly recommended to

read the AN1015 carefully in order to safely implement the software recommendations.

5.1 Critical bytes

It is recommended avoiding the following critical bytes in your code:

●0x8E: opcode for HALT (instruction used to enter low power modes)

●0x8F: opcode for WFI (instruction Wait For Interrupt)

●0x82, 0xAC: opcode for INT (instruction used to jump into an interrupt routine)

●0x8B: opcode for SWBRK (software breakpoint instruction used to stall the CPU in

debug mode)

These critical bytes can be generated by the linker when computing the address destination

of a branch instruction (JUMP or CALL) in absolute or relative addressing modes. To

remove such critical bytes you can simply insert a NOP instruction before the target

address. For further explanation, refer to the AN1015 application note.

5.2 Illegal opcodes

To better control unexpected jumps, it is recommended to fill unused memory areas with

TRAP opcode (0x83).

Besides, if you want to generate an illegal opcode reset, the simpler illegal opcodes are the

following: 0x05, 0x0B, 0x71 and 0x75.

With pre-opcode, the list is longer:

●0x7220..0x722F, 0x7231, 0x7232, 0x7235, 0x723B, 0x7241, 0x7242, 0x7245, 0x724B,

0x7251, 0x7252, 0x7255, 0x725B, 0x7261, 0x7262, 0x7265, 0x726B, 0x7280..0x728E,

0x7290..0x72A1, 0x72A3..0x72A8, 0x72AA..0x72AF, 0x72B1, 0x72B3..0x72B8,

0x72BA, 0x72BC..0x72BF, 0x72E0..0x72EF, 0x72F1, 0x72F3..0x72F8, 0x72FA,

0x72FC..0x72FF

●0x9000, 0x9003..0x900F, 0x9020..0x9027, 0x902A, 0x902B, 0x9030..0x903F, 0x9041,

0x9045, 0x904B, 0x9051, 0x9055,0x905B, 0x9061, 0x9065,0x906B, 0x9071, 0x9072,

0x9075, 0x907B, 0x9080..0x9084, 0x9086..0x9088, 0x908A..0x908F, 0x9090..0x9092,

0x9098..0x909D, 0x90A0..0x90A2, 0x9090A4..0x90A6, 0x90A8..0x90AD,

0x90B0..0x90B2, 0x90B4..0x90BD, 0x90C0..0x90C2, 0x90C4..0x90CD

●0x9100..0x915F, 0x9161, 0x9162, 0x9165, 0x916B,0x9170..0x91A6, 0x91A8..0x91AE,

0x91B0..0x91C2, 0x91C4..0x91CD, 0x91E0,0x91FF

●0x9200..0x922F, 0x9231, 0x9232, 0x9235, 0x923B, 0x9240..0x925F, 0x9261, 0x9262,

0x9265, 0x926B, 0x9270..0x928C, 0x928E..0x92A6, 0x92A8..0x92AB, 0x92AD,

0x92AE, 0x92B0..0x92BB, 0x92BE, 0x92BF, 0x92E0..0x92FF.

Software recommendations AN3006

10/12 Doc ID 15988 Rev 1

5.3 Reset sources

Reset sources that triggered a reset can be checked in the Reset status register RST_SR

(at address 0x50B3). The different reset sources which can be identified through the Reset

status register are:

●EMC reset,

●SWIM reset,

●Illegal opcode reset,

●Independent watchdog reset,

●Window watchdog reset.

Each of these flags can be cleared by software by writing 1 into the corresponding bit

location. They can also all be cleared by a power-on reset.

For a description of these reset sources, please refer to the STM8A microcontroller family

reference manual (RM0009).

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