ST SPC58EC-DISP Manuel utilisateur

Introduction

The SPC58EC-DISP discovery plus board is a development board to evaluate and develop applications with the microcontroller

SPC58EC80E5 in eTQFP144 package.

The SPC58EC80E5 is a microcontroller targeting body, networking and security applications.

This document describes the hardware architecture of the board and how it is possible to enable specific functions through the

configuration of the jumpers.

SPC58EC-DISP discovery board

UM2259

User manual

UM2259 - Rev 2 - March 2022

For further information contact your local STMicroelectronics sales office.

www.st.com

1Overview

The several interfaces including Ethernet controller, CAN-FD, FlexRay, LIN and UART, ADC, and JTAG port

make the SPC58EC-DISP an excellent tool to evaluate the microcontroller as well as to develop and then debug

applications.

An integrated programmer debugger (supported PLS) allows debugging and programming the microcontroller.

The same section allows enabling a USB virtual COM port.

Dedicated connectors allow plugging shields Arduino UNO R3-compatible. This feature makes it simple to

expand the board functionality adding a shield or board available on the market. All GPIOs and main signals

are accessible by a 4x37 0.1” pin array.

Figure 1. SPC58EC-DISP discovery board-top side

UM2259

Overview

UM2259 - Rev 2 page 2/27

2License agreement

The packaging of this evaluation board was sealed with a seal stating, by breaking this seal, you agree to the

terms and conditions of the evaluation board license agreement, the terms and conditions of which are available

at https://www.st.com/resource/en/evaluation_board_terms_of_use/evaluationproductlicenseagreement.pdf.

Upon breaking the seal, you and STMicroelectronics entered into the evaluation board license agreement, a copy

of which is also enclosed with the evaluation board for convenience.

Attention: This evaluation board only offers limited features for evaluating ST products. It has not been tested for use

with other products and is not suitable for any safety or other commercial or consumer application. This

evaluation board is otherwise provided “AS IS” and STMicroelectronics disclaims all warranties, express or

implied, including the implied warranties of merchantability and fitness for a particular purpose.

UM2259

License agreement

UM2259 - Rev 2 page 3/27

3Handling precautions

Please take care to handle the package content in order to prevent electrostatic discharge.

Before the EVB is used or power is applied, please fully read the following sections on how to correctly configure

the board. Failure to correctly configure the board may cause irreparable component, MCU or EVB damage.

UM2259

Handling precautions

UM2259 - Rev 2 page 4/27

4Hardware overview

4.1 Power supply section

The input voltage level is 12 VDC, the output voltage is set to 5 V and 3.3 V.

The Figure 2 and Figure 3 show the buck converters used to generate 5 V and 3.3 V respectively.

Figure 2. 12 V - 5 V buck converter

C82

10uF/50V

C83

100nF/50V C84

22nF/50V

C87

220pF/50V

R75

4,7kΩ

GND

TP21

3V3

R73

10kΩ

R74

3,3kΩ

C86

100nF/50V

V_Ext

5VTP20

VCC

COMP

VRef

GND

INH

OUT 1

SYNC 2

FB 5

U8 A5973AD

SB25

Closed

33uH/1,5A

STPS340U

C85

330uF/10V

Figure 3. 3.3 V buck converter

VCC

COMP

VRef

GND

INH

OUT 1

SYNC 2

FB 5

U7 A5973AD

C76

10uF/50V

C77

100nF/50V C78

22nF/50V

C81

220pF/50V

R72

4,7kΩ

TP19

3V3

STPS340U

R70

5,6kΩ

R71

3,3kΩ

C80

100nF/50V

V_Ext

3V3TP18

3V3

SB24

Closed

GND

15uH/2A

C79

330uF/10V

The Figure 4 shows a 3.3 V linear regulator; it is suitable to supply the ADC section.

Figure 4. 3.3 V linear converter

GND

Vout 4

Vin

LD1117A3V3

60ohm-500mA

C88

100nF/50V

C90

4,7uF/16V

C89

100nF/50V

C91

100nF/50V

C92

4,7uF/16V

GND

3V3_LR

TP22

3V3_LR

UM2259

Hardware overview

UM2259 - Rev 2 page 5/27

4.2 Microcontroller power management

The JP34 allows selecting the voltage level to supply VDD_HV_IO_main (5 V or 3.3 V); as well as JP35 sets the

VDD_HV_IO_Flex level. The JP36 sets the VDD_HV_ADC supply level; JP37 sets the 3.3 V source (from linear

or switching regulator). These jumpers allow the evaluation of the current absorption.

The LEDs D5, D6, D7 and D8 provide feedback about the status of the power supply section.

Figure 5. Power supply selector and LEDs

R79

2,2kΩ

V_Ext

JP34

Header 3x1

3V3

VDD_HV_IO_Main

JP35

Header 3x1

LD5

3V3_LR

R76

470Ω

GND

3V3_LR

JP37

Header 3x1

JP36

Header 3x1

VDD_HV_ADC

3V3_Sel

LD6

3V3

R77

470Ω LD7

R78

1kΩ LD8

V_Ext

VDD_HV_IO_Flex

VDD_HV_IO_Main

VDD_HV_IO_Flex

VDD_HV_ADC

4.3 Integrated programmer/debugger

The integrated programmer/debugger allows the user to program the microcontroller, build, and debug the

software applications. The debugger works with the UDE PLS software.

The debugger serial number is a label applied on the PCB bottom side.

The integrated debugger SW is accessible via ST's free integrated development environment, SPC5Studio

(www.st.com/spc5studio). To download the debugger software and activate the license refer to the PLS website.

The core of the debugger is a single chip USB to dual serial/parallel ports. A portion of the device manages the

JTAG signals while the second part implements a UART communication channel; the level shifters are necessary

to balance the signals levels (3.3 V↔5 V).

The supply comes from the PC through the USB cable and a dedicated 3.3 V linear regulator supplies this

section.

The microcontroller can be programmed and debugged also by using external tools connected to a JTAG port

(2x7 pin). The solder jumper from SB8 to SB14 allows disconnecting the JTAG signal from the integrated

debugger.

Note: An external debugger must be used with the USB cable disconnected and under this working condition; the

integrated debugger is not supplied. If the external programmer does not work properly, the jumpers SB8÷SB14

must be removed (open). It is suggested to perform some tests before removing the jumpers SB8÷SB14.

The SPC58EC-DISP comes with the integrated programmer enabled (all solder jumpers from SB8 to SB14 are

present).

UM2259

Microcontroller power management

UM2259 - Rev 2 page 6/27

4.4 Crystal oscillator and reset

The Figure 6 shows the external oscillator circuit; the frequency is 40 MHz.

By setting SB2, SB3 (open) and SB3 (closed) it is possible to drive the EXTAL pin with an external clock.

Figure 6. Crystal oscillator

XTAL

EXTAL

GND

SB2

Closed

40MHz

C52

8pF/16V

SB3

Closed

Not Assembled

Header 2

ExtOsc

GND

X_TAL

EX_TAL

C53

8pF/16V

SB4

Closed

The reset circuit is the device STM6315.

The STM6315 (see Figure 7) asserts a reset signal whenever the VCC pin drops below 2.63 V and keep it

asserted until the level of VCC has risen above the threshold for a 210 ms.

Figure 7. Reset circuit

Vss 1

nRST 2

nMR

Vcc

STM6315RDW13F

GND

R68

1kΩ

LD4

Red

RESET_0

C74

100nF/50V

C75

100nF/50V

R69

2,2kΩ

RESET

SW1

RESET

VDD_HV_IO_Main VDD_HV_IO_Main

RESET

Not Assembled

TP16

Reset

Not Assembled

TP17

GND

JP33

Header 3x1

GND

Deafult: 1-2

The device generates a reset signal when the SW1 button is pressed.

The reset output is an open drain pin and it must be pulled-up to VDD_CPU voltage level (R69). The LD4

provides feedback when the reset pulse is generated.

4.5 FlexRay

The Figure 8 shows the FlexRay section (transceiver + DB9 connector).

The jumpers JP27 and JP32 connect the load terminations (47 Ω). The jumpers from JP28 to JP31 allow

configuring the transceiver.

UM2259

Crystal oscillator and reset

UM2259 - Rev 2 page 7/27

Figure 8. FlexRay

GND

TXD

TXEN

RXD

RXEN

BGE

STBN

WAKE

TRXD0

TRXD1

GND

ERRN

VBAT 14

INH1 2

INH2 1

VIO 4

VCC 19

VBUF 20

BP 18

BM 17

TJA1080A

GND GND

V_EXT

GND

TP13

TP15

TP14

GND

R65

4,7kΩ

GND

R59 3,3kΩ

R56

47Ω

R61

4,7kΩ

R60

47Ω

C69

4,7nF/16V

C70

10pF/16V

C68

10pF/16V

FR_TXD_A

FR_TXEN_A

FR_RXD_A

VDD_HV_IO_Flex

Not Assembled

Header 4 pins

ERRN_A

RXEN_A

C66

100nF/50V

C67

100nF/50V

GND

C65

100nF/50V

GND

FR_TXD_A

FR_TXEN_A

FR_RXD_A

BM1

BP1

ERRN_A

INH_1

INH_2

R58 3,3kΩ

R57 3,3kΩ

VDD_HV_IO_Flex

R64

4,7kΩ

Not Assembled

R63

0Ω

Not Assembled

R62

0Ω

VDD_HV_IO_Flex

GND

V_EXT

JP27

Open

JP32

Open

JP31 Open

JP30 Open

JP29 Open

JP28 Open

CN1

D-SUB 9 WAY FEMALE

100uH/1MHz

4.6 RS232 and LIN

Two serial communication channels are available; U10 is a dual RS232 driver and receiver (see Figure 9).

Figure 9. RS232 section

R1 IN

R2 IN

T1 IN

T2 IN

GND

15 V+ 2

V-

VCC 16

R1 OUT 12

R2 OUT 9

T1 OUT 14

T2 OUT 7

C1+

C1 -

3C2+ 4

C2 - 5

U10

ST3232EBTR

C95

470nF/16V

GND

C96

470nF/16V

C93

100nF/50V

C94

470nF/16V

VDD_HV_IO_Main

GND

Rx_A

Rx_B

Tx_B

Tx_A

C97

100nF/50V

R81

10kΩ

R80

10kΩ

SB15

Open

SB16

Open

Tx2

Rx2

VDD_HV_IO_Main

GND

Rx1

Tx1

SCI_4_TX

SCI_4_RX

SCI_0_TX

SCI_0_RX

VDD_HV_IO_Main

TP26

Rx1

TP30

GND

TP27

Tx1

SCI_ChB

SCI_ChA

HEADER 4X2

VDD_HV_IO_Main

TP28

Rx2

TP29

Tx2

GND

3JP7

SCI_RX_Sel

JP6

SCI_RX_Sel

R1_OUT

T1_IN

RXD_USB

TXD_USB

Default: 1-2

The Figure 10 shows the LIN circuit; JP38 allows setting master/slave mode.

Figure 10. LIN section

HEADER 4X2

V_EXT

TXD

RXD

NWAKE

3NSLP

INH 8

BAT 7

LIN 6

GND 5

U11

TJA1020/1021

GND GND

C98

1nF/16V C99

220pF/16V

R82

10kΩ

TP31 LIN

C100

100nF/50V

GND

TP32GND

NLSP

LIN6_TX

LIN6_RX

GND

V_Ext V_Ext

JP39

Open

LIN

JP38

LIN Master/Slave

BAS40

LIN_TX

LIN_RX

R122

GND

Not Assembled

R123

UM2259

RS232 and LIN

UM2259 - Rev 2 page 8/27

4.7 CAN and ISO CAN-FD

Two CAN channels are available, both are based on a fast transceiver; the implemented solution is compatible

with the CAN-FD operation standard.

The jumper JP2 allows the selection in normal o standby mode:

• No jumper: normal operation(1)

• Jumper 2-3: device in standby mode (manual or fixed selection)

• Jumper 1-2: microcontroller drives the standby (dynamic configuration)

• Jumper JP1 enables the load termination

1. In the transceiver, an internal pull-up resistor is already present and R1 could be removed.

4.8 Ethernet

JP5 allows connecting the Ethernet transceiver to the microcontroller to implement RII or MII communication

protocol.

JP5 allows the implementation of another feature: its pins allow plugging an addition board to evaluate the

communication performance by using a different Ethernet physical layer.

The R29 ÷ R32 are the load termination resistors.

Note: The level of the transceiver in/out pins is 3.3 V then the microcontroller supply level must be set consequently.

4.9 User interface (pushbuttons, LEDs and trimmers)

In the board three LEDs and three push-buttons are present and they are suitable for user purposes (see

Figure 11).

Figure 11. User pushbutton and LEDs

SW_3

SW_2

SW_1

R105

10kΩ

GNDGND GND

SW_User_1

SW_User_2

SW_User_3

VDD_HV_IO_Main

USER - Push Buttons

R106

10kΩ

R107

10kΩ

TP42

SW_1

TP41

SW_2

TP43

SW_3

JP45

Closed

JP46

Closed JP48

Closed

R104

1kΩ

R108

1kΩ

R109

1kΩ

VDD_HV_IO_Main

LD9

User_LED_1

LED_User_2

LED_User_1

LED_User_3

USER - LEDs

TP39

LED_1

TP38

LED_2

TP40

LED_3

JP44

Closed

JP47

Closed

JP49

Closed

LD10

User_LED_2

LD11

User_LED_3

Two trimmers allow the evaluation of the ADC performance (see Figure 12).

Figure 12. Trimmers

R103

10kΩ

C127

100nF/50V

GND

C128

100nF/50V

C129

100nF/50V

GND

ADC_User_1

ADC_User_2

VDD_HV_ADC VDD_HV_ADC

R102

10kΩ

USER - ADC Evaluation

TP36

ADC_2

TP37

ADC_1

JP42

Closed

JP43

Closed

ADC_User_1

ADC_User_2

UM2259

CAN and ISO CAN-FD

UM2259 - Rev 2 page 9/27

4.10 Extended connectors (I/O headers)

Most of the GPIOs and signals are accessible by the connector X9, a 4x37 male pin array allowing connection of

additional boards and with the user HW application. The Table 1 and Table 2 summarize the function and signal of

each pin.

Table 1. X9 (part I) - Extended connectors (I/O headers)

X9 pinA Function/Port pinA X9 pinB Function/Port pinB

A1 GND B1 5 V

A2 PD10_eMIOS0-UC23 B2 PA13_eMIOS-UC13

A3 PD9_eMIOS1-UC3 B3 PH2_GPIO114

A4 PB2_eMIOS0-UC8 B4 PH4_GPIO116

A5 B5

A6 B6

A7 PA4_DSPI1-CS0 B7 PD6_DSPI1-SCK

A8 B8

A9 PC3_eMIOS0-UC7 B9 PA15_DSIP0-CS1

A10 PE10_LIN_0_RXD B10 PD11_eMIOS0-UC21

A11 PE9_eMIOS0-UC9 B11 PK14_GPIO174

A12 RESET B12

A13 B13

A14 PE1_eMIOS0-UC12 B14

A15 PA12_DSPI2-CS0 B15 PH0_DSPI2-SCK

A16 PB9_DSPI2-SIN B16 PB10_DSPI2-SOUT

A17 PF7_CAN4sys1-TX B17 PF6_CAN4sys1-RX

A18 PG1_FR_RXD_A B18 PI9_FR_TXD_A

A19 PD1_I2C-SDA B19 PD2_I2C-SCL

A20 PA11_CAN1sys0_RX B20 PA10_CAN1sys0_TX

A21 PI8_FR_TXEN_A B21 PA0_LIN4-RXD

A22 PF11_SW_User_1 B22 PF0_eMIOS1-UC2

A23 PF12_SW_User_2 B23

A24 PF13_SW_User_3 B24 PG14_eMIOS1-UC0

A25 PF1_eMIOS1-UC1 B25 PC14_eMIOS-UC27

A26 B26 PI3_ADC-AN39

A27 PI5_ADC-AN41 B27 PI6_ADC-AN49

A28 PG3_ADC-AN26 B28 PD13_ADC-AN16

A29 PG4_ADC-AN27 B29 PG5_ ADC-AN42

A30 B30

A31 PE0_ADC_AN11 B31 PG12_ADC-AN58

A32 PE3_ADC-AN17 B32 PG10_ADC-AN55

A33 B33

A34 PI2_eMIOS0-UC5 B34 PD5_DSPI0-SOUT

A35 PM14_GPIO206 B35 PE8_DSIP0-CS0

UM2259

Extended connectors (I/O headers)

UM2259 - Rev 2 page 10/27

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