NXP Semiconductors LX2160ARDBGSG Manuel utilisateur
1 Introduction
The Layerscape® LX2160A reference design board (RDB) provides a
comprehensive platform that enables design and evaluation of the Layerscape
LX2160A processor.
The LX2160ARDB functions with an integrated development environment
(IDE), such as CodeWarrior Development Studio. For instructions on how
to work with the CodeWarrior Development Studio IDE, see CodeWarrior
Development Studio for LS series - ARM V8 ISA, Targeting Manual.
This document provides details of different board interfaces and explains how
to set up and boot the board.
2 Related documentation
The table below lists and explains the additional documents and resources that you can refer to for more information on the
LX2160ARDB. Some of the documents listed below may be available only under a non-disclosure agreement (NDA). To request
access to these documents, contact your local NXP field applications engineer (FAE) or sales representative.
Table 1. Related documentation
Document Description Link / how to access
LX2160A Reference Design Board
Reference Manual
Provides detailed description of the LX2160ARDB LX2160ARDBRM.pdf
LX2160A Reference Design Board
Errata
Describes known errata and workarounds for the
LX2160ARDB
LX2160ARDBE.pdf
LX2160A Product Brief Provides a brief overview of the LX2160A processor LX2160APB.pdf
LX2160A Data Sheet Provides information about electrical characteristics,
hardware design considerations, and ordering information
LX2160A.pdf
LX2160A Reference Manual Provides a detailed description about the LX2160A multicore
processor and its features, such as memory map, serial
interfaces, power supply, chip features, and clock information
LX2160ARM.pdf
LX2160A Chip Errata Lists the details of all known silicon errata for the LX2160A Contact NXP FAE /
sales representative
LX2160A Design Checklist, AN5407 This document provides recommendations for new designs
based on the LX2160A. This document can also be used to
debug newly designed systems by highlighting those aspects
of a design that merit special attention during initial system
start-up.
AN5407.pdf
Table continues on the next page...
Contents
1 Introduction......................................1
2 Related documentation................... 1
3 Hardware kit contents......................2
4 Chassis and board pictures.............3
5 Power and reset buttons................. 6
6 Connectors......................................6
7 Jumpers...........................................8
8 DIP switches..................................10
9 LEDs..............................................13
10 Getting started with LX2160ARDB
...................................................... 16
11 Troubleshooting............................ 22
12 Revision history.............................22
LX2160ARDBGSG
LX2160A Reference Design Board Getting Started Guide
Supports LX2160ARDB, Board Revisions B and C
Rev. 5 — 28 September 2021 User Guide
Table 1. Related documentation (continued)
Document Description Link / how to access
Layerscape Software Development
Kit User Guide
Describes how to work with LSDK, which is a complete Linux
kit for NXP Layerscape Arm-based SoCs and the reference
and evaluation boards available for them.
LSDKUG.pdf
CodeWarrior Development Studio
for LS series - ARM V8 ISA,
Targeting Manual
Explains how to use the CodeWarrior Development Studio for
LS series - ARM V8 ISA product.
CWARMv8TM.pdf
CodeWarrior TAP Probe User
Guide
Provides details of CodeWarrior® TAP, which enables target
system debugging through a standard debug port (usually
JTAG) while connected to a developer workstation through
Ethernet or USB
CWTAPUG.pdf
3 Hardware kit contents
The table below lists the items included in the LX2160ARDB hardware kit.
Table 2. Hardware kit contents
Item description Quantity
LX2160ARDB hardware assembly with enclosure 1
3-conductor power cord 1
DB9 shielded serial cable 1
1.8 meter Cat-6 Ethernet cable 1
32 GB SD card, Samsung MB-ME32GA/AM (UHS-I) 1
Zip lock bag containing 1U chassis bracket (2 pieces) + screw (8 pieces) 1
LX2160ARDB insert card 1
Apart from the main LX2160ARDB kit, two optional kits are also available for purchase at nxp.com:
•LX2RDBKIT1-10-40: Contains transceivers and cables recommended to be used for testing 10/40 Gigabit Ethernet
performance on the LX2160ARDB
• LX2RDBKIT2-25G: Contains transceivers and cables recommended to be used for testing 25 Gigabit Ethernet
performance on the LX2160ARDB
The table below describes the items included in the LX2RDBKIT1-10-40 kit.
Table 3. LX2RDBKIT1-10-40 kit contents
Item description Manufacturer Manufacturing part
number
For port/slot Quantity
Cat-6 Ethernet cable, 6
ft length, orange
10X8-03106 10G MAC3/4 2
40G-BASE-SR4
QSFP+ optical
transceiver module, 40
Gbit/s multi-mode, 850
Mellanox Technologies MC2210411-SR4 40G MAC2 1
Table continues on the next page...
NXP Semiconductors
Hardware kit contents
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Table 3. LX2RDBKIT1-10-40 kit contents (continued)
Item description Manufacturer Manufacturing part
number
For port/slot Quantity
nm wavelength, 150 m
maximum reach
QSFP+ LAN optical
cable, multi-mode,
OM3 50/125, MPO
connector, 3 m length
12FMPOOM3 - 66239 40G MAC2 1
Samsung 32 GB (U1)
EVO select micro-SD
card with adapter
Samsung MB-ME32GA/AM SD card 1
The table below describes the items included in the LX2RDBKIT2-25G kit.
Table 4. LX2RDBKIT2-25G kit contents
Item description Manufacturer Manufacturing part
number
For port/slot Quantity
SFP-25G-SR optical
transceiver module, 25
Gbit/s multi-mode, 850
nm wavelength, 100 m
maximum reach
Mellanox Technologies MMA2P00-AS 25G MAC5/6 1
LAN optical cable,
multi-mode, OM3
50/125, LC duplex
connector, 3 m length
OM3-LC-LC-DX-
FS-3M-PVC - 41728
25G MAC5/6 1
4 Chassis and board pictures
This section provides labelled images of the LX2160ARDB chassis and board for easy identification of different board
components. The board components marked with labels are described in the subsequent sections.
The figure below shows the front side view of the LX2160ARDB chassis.
Power button
Reset button
Ethernet ports
Figure 1. LX2160ARDB chassis
The figure below shows the back panel of the LX2160ARDB chassis.
NXP Semiconductors
Chassis and board pictures
LX2160A Reference Design Board Getting Started Guide, Rev. 5, 28 September 2021
User Guide 3 / 24
Power jack
Figure 2. Chassis back panel
The figure below shows the onboard connectors of the LX2160ARDB.
P3
J4 J32
J30
J42
P1
J1
J2
J13
J28
J14
J48
BT1
J29
J26 J27
J25 J24
J46
J40
J43
J37
J21
J19 J18
P2
J23
J53
J11
J47
J22
J44 J54 J34
J36
J55
J35 J10
J5
J15
J17
J16
J41 J38J39
J3
Figure 3. Connectors
The figure below shows the jumpers, LEDs, and DIP switches available on the LX2160ARDB.
NXP Semiconductors
Chassis and board pictures
LX2160A Reference Design Board Getting Started Guide, Rev. 5, 28 September 2021
User Guide 4 / 24
J33
J6
J7
J31
J8
J9
D1
D11 D10
D9
D5
D39-D28
D44-D45
D43-D42
D27-D24
D41
D23-D18
SW4-SW1
D13
Figure 4. Jumpers, LEDs, and DIP switches
The figure below shows a closer look of the DIP switches.
SW1 SW2 SW3 SW4
Figure 5. DIP switches
NXP Semiconductors
Chassis and board pictures
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5 Power and reset buttons
The power and reset buttons are present on the front panel of the LX2160ARDB chassis (see Figure 1). Both power and reset
buttons are push buttons. The table below describes the power and reset buttons.
Table 5. Power and reset buttons
Identifier Label Function Description
SW5 PWR Power cycle Pressing SW5 turns the power ON or OFF
SW7 RST System reset Pressing SW7 resets the system, including the device and all the
attached peripherals
You cannot switch off the board completely when the SW_AUTO_ON switch (SW4[2]) is set to ON/1. In this mode, pressing the
power switch turns the power off briefly, then it immediately turns back on. To turn off power, set the SW_AUTO_ON switch to
OFF/0 or disconnect the AC power.
To avoid any damage to SDHC1 port pins due to a silicon erratum, follow these recommendations:
•Always use the power button on the front panel to power down the system. Do not power down the system by unplugging
the power adapter.
• Before removing AC power to power cycle the system:
— Insert an SDHC card in the SDHC card slot
— Allow Linux to boot and configure EVDD to 1.8 V
6 Connectors
The LX2160ARDB has numerous onboard connectors (see Figure 3). The table below describes the LX2160ARDB connectors.
Table 6. LX2160ARDB connectors
Connector Connector type Description Typical connection
BT1 3-pin battery holder RTC battery Connects to 3 V standby CR2032 lithium coin
cell battery
J1 2x4-pin ATX 12 V
connector
12 V ATX power supply Connects to the ATX power supply; both
connections are required
J2 2x12-pin ATX connector Main ATX power supply
J3 1x2-pin header Remote power Connects to remote power switch
J4 1x2-pin header Remote reset Connects to remote reset switch
J5 2x6-pin header VDD_DEBUG Connects to Analog Devices PMBus
monitoring tool (not included in the hardware
kit)
J47 1x2-pin connector VDD measurement Allows remote measurement of VDD
J48 1x2-pin connector GVDD measurement Allows remote measurement of GVDD
J11 2x5-pin Arm JTAG header Arm JTAG Connects to CodeWarrior TAP using a 10-pin
cable
J53 2x5-pin header CPLD JTAG Connects to JTAG interface for CPLD
programming
Table continues on the next page...
NXP Semiconductors
Power and reset buttons
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Table 6. LX2160ARDB connectors (continued)
Connector Connector type Description Typical connection
J18 QSFP+ cage 40G MAC2: 40 Gbit
Ethernet
Accepts one zQSFP+ transceiver (optical or
copper) (not included in the hardware kit)
J19 SFP cage (2) 25G MAC5/6: 25 Gbit
Ethernet
Accepts two SFP+ transceivers (optical or
copper) (not included in the hardware kit)
J21 RJ45-19 connector 10G MAC3: 10 Gbit
USXGMII
Connects to external RJ45 Ethernet cable
J22 RJ45-19 connector 10G MAC4: 10 Gbit
USXGMII
Connects to external RJ45 Ethernet cable
P1 RJ45 connector (2) 1G MAC17/18: 1
Gbit RGMII
•1G MAC17 (bottom)
• 1G MAC18 (top)
Connects to external RJ45 Ethernet cable
J45 (board revision
B)
1x3-pin connector 40G interface
programming
Provides direct access to CS4223 data
EEPROM for programming purposes
P2 DB9 connector (2) UART1 (bottom)
UART2 (top)
Connects to external RS-232 cable
P3 DB9 connector (2) CAN1 (bottom)
CAN2 (top)
Connects to external CAN adapter cable
J23 PCIe Gen 3 x4 connector PCI Express slot #1 Connector for Gen 1/2/3 PCIe cards, or right-
angle/low-profile chassis adapter accepting
Gen 1/2 cards
J28 PCIe Gen 3 x8 connector PCI Express slot #2 Connector for Gen 1/2/3 PCIe cards
J24 SATA-3 header SATA1 Connector for user-supplied SATA disk
J25 SATA-3 header SATA2 Connector for user-supplied SATA disk
J26 SATA-3 header SATA3 Connector for user-supplied SATA disk
J27 SATA-3 header SATA4 Connector for user-supplied SATA disk
J30 USB 3.0 Type-A
connector
USB1 (Host mode by
default)
Connects to USB-compatible device
J32 USB 3.0 Micro-AB
connector
USB2 (OTG mode by
default)
Connects to USB-compatible device
J42 SD card receptacle SD card slot Provides access to an SDHC/SDXC card
J13 2x10-pin connector QSPI emulator Connects to DediProg EM100Pro QSPI
emulator using a sideband cable (ISP-ADP-
intel-B)
J46 1x2-pin connector QSPI emulator reset Allows system reset to be triggered by
DediProg EM100Pro emulator using the ISP-
ADP-intel-B cable
Table continues on the next page...
NXP Semiconductors
Connectors
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Table 6. LX2160ARDB connectors (continued)
Connector Connector type Description Typical connection
J34 1x3-pin header I2C1 Provides remote access to I2C1 bus
J36 1x3-pin header I2C1_CH0 Provides remote access to I2C1 channel 0
segment
J55 1x3-pin header I2C1_CH1 Provides remote access to I2C1 channel 1
segment
J37 1x3-pin header I2C1_CH3 Provides remote access to I2C1 channel 3
segment
J35 1x3-pin header I2C5 Provides remote access to I2C5 bus
J43 1x3-pin header I2C6 Provides remote access to I2C6 bus
J10 1x5-pin header GPIO/event access Provides access to GPIO/event pins
J38 1x4 connector Fan #1 (placed near
bottom of PCB)
Provides PWM-controlled 12 V power for
cooling fans
J39 1x4 connector Fan #2 (placed near
bottom of PCB)
J41 1x4 connector Fan #4 (placed near
bottom of PCB)
J40 1x4 connector Fan #3 (placed near
bottom of PCB)
J44 1x4 connector Fan #5 (placed near top of
PCB)
J54 1x3 connector Heatsink fan (placed near
Fan #5)
J29 2x6-pin header 1588 test Provides access to IEEE 1588 pins
J50 (board revision
B)
Subminiature version A
(SMA) coaxial connector
SMA #1 Provides access to recovered IEEE-1588
clock. J50 is not installed, by default.
J52 (board revision
B)
SMA coaxial connector SMA #2 J52 is not installed, by default
J14 288-pin DDR4 UDIMM
socket
DDR4#1 DIMM#1 Single/dual rank UDIMM inserted
J15 288-pin DDR4 UDIMM
socket
DDR4#1 DIMM#2 Single/dual rank UDIMM (optional)
J17 288-pin DDR4 UDIMM
socket
DDR4#2 DIMM#1 Single/dual rank UDIMM inserted
J16 288-pin DDR4 UDIMM
socket
DDR4#2 DIMM#2 Single/dual rank UDIMM (optional)
7 Jumpers
Jumpers (or shorting headers) are used to select some options that either do not change often or involve power conduction. The
LX2160ARDB jumpers are shown in Figure 4 and are described in the table below.
NXP Semiconductors
Jumpers
LX2160A Reference Design Board Getting Started Guide, Rev. 5, 28 September 2021
User Guide 8 / 24
Table 7. LX2160ARDB jumpers
Jumper Type Name/function Description
J6 1x2-pin connector TA_BB_TMP_DETECT_B enable Open: TA_BB_TMP_DETECT_B pin
is grounded
Shorted: TA_BB_TMP_DETECT_B pin is
powered (default setting)
J7 1x2-pin connector VBAT power for TA_BB_VDD
enable
Not supported. Do not install J7. See
LX2160A
Reference Design Board Errata
for more
details.
J8 1x2-pin connector PROG_MTR voltage control (for
NXP use only)
Open: PROG_MTR pin is powered off
(default setting)
Shorted: PROG_MTR pin is powered by OVDD
(1.8 V)
J9 1x2-pin connector TA_PROG_SFP voltage control
(for NXP use only)
Open: TA_PROG_SFP pin is powered off
(default setting)
Shorted: TA_PROG_SFP pin is powered by
OVDD (1.8 V)
J31 1x2-pin connector USB1 mode setting Open: USB1 works in Endpoint mode
Shorted: USB1 works in Host mode
(default setting)
J33 1x2-pin connector USB2 mode setting Open: USB2 works in On-The-Go (OTG) mode
(default setting)
Shorted: USB2 works in Host mode
J56 (board
revision B)
2x3-pin connector Inphi CS4223 GUI access Normal mode (default setting):
• J56, pins 1-2: Shorted
• J56, pins 5-6: Shorted
• J57: Open
GUI mode:
• J56, pins 1-2: Open
• J56, pins 5-6: Open
• J57: Shorted
After switching to GUI mode, connect a
BeagleBone and a 3.3 V - 1.8 V level shifter
to J56 at pins 1-3-5.
J57 (board
revision B)
1x2-pin connector
J58 (board
revision B)
1x2-pin connector PWM fan speed control Open: 100% speed
Shorted: 50% speed (default setting)
Most of these jumpers are installed during assembly, and they do not require any change.
NOTE
NXP Semiconductors
Jumpers
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User Guide 9 / 24
8 DIP switches
The LX2160ARDB provides dual inline package (DIP) switches to allow easy configuration of the system for the most popular
board options. These switches are stored in BRDCFG and DUTCFG registers by CPLD before being used, allowing software
(either local or remote) to reconfigure the system as needed.
The table below explains the DIP switches available in the LX2160ARDB. For each DIP switch:
•If the switch is up (on), the value is 1
• If the switch is down (off), the value is 0
Table 8. Switch settings
Switch Supported function Description
SW1[1:4] RCW fetch location
CFG_RCW_SRC[3:0]
SW_RCW_SRC[3:0]
•0000: Hard-coded RCW
• 1000: SDHC1: SD card
• 1001: SDHC2: eMMC
• 1010: I2C boot EEPROM
• 1100: XSPI sNAND, 2 KB pages
• 1101: XSPI sNAND, 4 KB pages
• 1111: XSPI serial NOR, 24-bit address (default setting)
SW1[5] Reset mode
RESET_REQ_B
SW_RST_MODE
• 0: Ignore RESET_REQ_B
• 1: Trigger system reset on assertion of RESET_REQ_B (default setting)
SW1[6:8] XSPI_A device mapping
CFG_XSPI_MAP[3:0]
SW_XMAP[2:0]: Controls how XSPI_A chip-selects are connected to
devices/peripherals.
Bit value XSPI_A_CS0 XSPI_A_CS1 Description
000 (default
setting)
DEV#0 DEV#1 Boot from default
flash memory
001 DEV#1 DEV#0 Boot from
alternative flash
memory
010 QSPI emulator DEV#0 Boot from QSPI
emulator
011 QSPI emulator DEV#1 Boot from QSPI
emulator
100 DEV#0 QSPI emulator User defined
SW2[1] PCIe Spread-Spectrum
enable
CFG_SPREAD
SW_SPREAD
•0: 100 MHz clocks for PCIe slots are fixed (default setting)
• 1: 100 MHz clocks for PCIe slots are spread-spectrum modulated
Table continues on the next page...
NXP Semiconductors
DIP switches
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