Intel SL8J6 - Pentium 4 Processor Manuel utilisateur

Intel®Pentium®4 Processor on

90 nm Process

Datasheet

2.80 GHz – 3.40 GHz Frequencies Supporting Hyper-Threading

Technology1for All Frequencies with 800 MHz Front Side Bus

February 2005

Document Number: 300561-003

2Datasheet

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY

ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN

INTEL'S TERMS AND CONDITIONS OF SALE FORSUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS

ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES

RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER

INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications.

Intel may make changes to specifications and product descriptions at any time, without notice.

Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for

future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

The Intel®Pentium®4 processor on 90 nm process may contain design defects or errors known as errata which may cause the product to deviate

from published specifications. Current characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

1Hyper-Threading Technology requires a computer system with an Intel®Pentium®4 processor supporting HT Technology and a Hyper-Threading

Technology enabled chipset, BIOS and operating system. Performance will vary depending on the specific hardware and software you use.

See http://www.intel.com/info/hyperthreading/ for more information including details on which processors support HT Technology.

Intel, Pentium, Intel NetBurst, and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States

and other countries.

*Other names and brands may be claimed as the property of others.

Datasheet 3

Contents

1 Introduction..................................................................................................................9

1.1 Terminology.........................................................................................................10

1.1.1 Processor Packaging Terminology.........................................................10

1.2 References..........................................................................................................11

2 Electrical Specifications........................................................................................13

2.1 Power and Ground Pins......................................................................................13

2.2 Decoupling Guidelines ........................................................................................13

2.2.1 VCC Decoupling......................................................................................13

2.2.2 FSB GTL+ Decoupling ...........................................................................13

2.2.3 FSB Clock (BCLK[1:0]) and Processor Clocking....................................14

2.3 Voltage Identification...........................................................................................14

2.3.1 Phase Lock Loop (PLL) Power and Filter...............................................16

2.4 Reserved, Unused, and TESTHI Pins.................................................................17

2.5 FSB Signal Groups..............................................................................................18

2.6 Asynchronous GTL+ Signals...............................................................................19

2.7 Test Access Port (TAP) Connection....................................................................19

2.8 FSB Frequency Select Signals (BSEL[1:0])........................................................20

2.9 Absolute Maximum and Minimum Ratings..........................................................21

2.10 Processor DC Specifications...............................................................................21

2.11 VCC Overshoot Specification...............................................................................29

2.11.1 Die Voltage Validation............................................................................30

3 Package Mechanical Specifications.................................................................31

3.1 Package Mechanical Specifications....................................................................31

3.1.1 Package Mechanical Drawing................................................................32

3.1.2 Processor Component Keep-out Zones.................................................35

3.1.3 Package Loading Specifications ............................................................35

3.1.4 Package Handling Guidelines ................................................................35

3.1.5 Package Insertion Specifications ...........................................................36

3.1.6 Processor Mass Specification ................................................................36

3.1.7 Processor Materials................................................................................36

3.1.8 Processor Markings................................................................................36

3.1.9 Processor Pinout Coordinates................................................................37

4 Pin List and Signal Description..........................................................................39

4.1 Processor Pin Assignments ................................................................................39

4.2 Alphabetical Signals Reference ..........................................................................54

5 Thermal Specifications and Design Considerations.................................63

5.1 Processor Thermal Specifications.......................................................................63

5.1.1 Thermal Specifications...........................................................................63

5.1.2 Thermal Metrology .................................................................................66

5.2 Processor Thermal Features...............................................................................67

5.2.1 Thermal Monitor.....................................................................................67

4Datasheet

5.2.2 On-Demand Mode..................................................................................68

5.2.3 PROCHOT# Signal Pin..........................................................................68

5.2.4 THERMTRIP# Signal Pin.......................................................................69

5.2.5 Tcontrol and Fan Speed Reduction..........................................................69

5.2.6 Thermal Diode........................................................................................69

6Features.......................................................................................................................71

6.1 Power-On Configuration Options ........................................................................71

6.2 Clock Control and Low Power States..................................................................72

6.2.1 Normal State—State 1 ...........................................................................72

6.2.2 AutoHALT Powerdown State—State 2 ..................................................72

6.2.3 Stop-Grant State—State 3 .....................................................................73

6.2.4 HALT/Grant Snoop State—State 4 ........................................................73

6.2.5 Sleep State—State 5..............................................................................74

7 Boxed Processor Specifications.......................................................................75

7.1 Mechanical Specifications...................................................................................76

7.1.1 Boxed Processor Cooling Solution Dimensions.....................................76

7.1.2 Boxed Processor Fan Heatsink Weight..................................................77

7.1.3 Boxed Processor Retention Mechanism and Heatsink Attach

Clip Assembly ........................................................................................78

7.2 Electrical Requirements ......................................................................................78

7.2.1 Fan Heatsink Power Supply...................................................................78

7.3 Thermal Specifications........................................................................................79

7.3.1 Boxed Processor Cooling Requirements ...............................................79

7.3.2 Variable Speed Fan ...............................................................................81

Datasheet 5

Figures

1 Phase Lock Loop (PLL) Filter Requirements ......................................................16

CC Static and Transient Tolerance for Loadline A.............................................24

CC Static and Transient Tolerance for Loadline B.............................................26

CC Overshoot Example Waveform....................................................................30

5 Processor Package Assembly.............................................................................31

6 Processor Package Drawing (Sheet 1 of 2)........................................................33

7 Processor Package Drawing (Sheet 2 of 2)........................................................34

8 Processor Top-Side Markings.............................................................................36

9 Processor Pinout Coordinates (Top View) ..........................................................37

10 Pinout Diagram (Top View—Left Side) ...............................................................40

11 Pinout Diagram (Top View—Right Side).............................................................41

12 Thermal Profile....................................................................................................66

13 Case Temperature (TC) Measurement Location.................................................66

14 Stop Clock State Machine...................................................................................72

15 Mechanical Representation of the Boxed Processor ..........................................75

16 Space Requirements for the Boxed Processor (Side View)................................76

17 Space Requirements for the Boxed Processor (Top View).................................77

18 Boxed Processor Fan Heatsink Power Cable Connector Description.................78

19 Baseboard Power Header Placement Relative to Processor Socket..................79

20 Boxed Processor Fan Heatsink Airspace Keep-out Requirements

(side 1 view)........................................................................................................80

21 Boxed Processor Fan Heatsink Airspace Keep-out Requirements

(side 2 view)........................................................................................................80

22 Boxed Processor Fan Heatsink Set Points .........................................................81

6Datasheet

Tables

1 References..........................................................................................................11

2 Core Frequency to FSB Multiplier Configuration.................................................14

3 Voltage Identification Definition...........................................................................15

4 FSB Pin Groups ..................................................................................................18

5 Signal Characteristics .........................................................................................19

6 Signal Reference Voltages..................................................................................19

7 BSEL[1:0] Frequency Table for BCLK[1:0] .........................................................20

8 Processor DC Absolute Maximum Ratings.........................................................21

9 Voltage and Current Specifications.....................................................................22

10 VCC Static and Transient Tolerance for Loadline A.............................................23

11 VCC Static and Transient Tolerance for Loadline B.............................................25

12 GTL+ Signal Group DC Specifications................................................................27

13 Asynchronous GTL+ Signal Group DC Specifications........................................27

14 PWRGOOD and TAP Signal Group DC Specifications ......................................28

15 VCCVID DC Specifications .................................................................................28

16 VIDPWRGD DC Specifications...........................................................................28

17 BSEL [1:0] and VID[5:0] DC Specifications.........................................................29

18 BOOTSELECT DC Specifications.......................................................................29

19 VCC Overshoot Specifications.............................................................................29

20 Processor Loading Specifications.......................................................................35

21 Package Handling Guidelines.............................................................................35

22 Processor Materials ............................................................................................36

23 Alphabetical Pin Assignment...............................................................................42

24 Numerical Pin Assignment..................................................................................48

25 Signal Description ...............................................................................................54

26 Processor Thermal Specifications.......................................................................64

27 Thermal Profile....................................................................................................65

28 Thermal Diode Parameters.................................................................................70

29 Thermal Diode Interface......................................................................................70

30 Power-On Configuration Option Pins..................................................................71

31 Fan Heatsink Power and Signal Specifications...................................................79

32 Boxed Processor Fan Heatsink Set Points .........................................................81

Datasheet 7

Revision History

Revision Description Date

-001 • Initial release February 2004

-002 • Added specifications for 3.20 GHz processors with PRB = 1

• Added ISGNT/ISLP specifications

• Updated thermal diode specifications

• Other changes marked with change bars

April 2004

-003 • Added specifications for 3.40 GHz processors with PRB = 0 February 2005

8Datasheet

Intel®Pentium®4 Processor on 90 nm

Process 2.80A/E GHz, 3E GHz, 3.20E

GHz, and 3.40E GHz

•Available at 2.80A/E GHz, 3E GHz,

3.20E GHz, and 3.40E GHz

•Supports Hyper-Threading Technology1

(HT Technology) for all frequencies with

800 MHz front side bus (FSB)

•Binary compatible with applications

running on previous members of the Intel

microprocessor line

•Intel NetBurst®microarchitecture

•FSB frequencies at 533 MHz, and

800 MHz

•Hyper-Pipelined Technology

—Advance Dynamic Execution

—Very deep out-of-order execution

•Enhanced branch prediction

•Optimized for 32-bit applications running

on advanced 32-bit operating systems

•478-Pin Package

•16-KB Level 1 data cache

•1-MB Advanced Transfer Cache (on-die,

full-speed Level 2 (L2) cache) with 8-way

associativity and Error Correcting Code

(ECC)

•144 Streaming SIMD Extensions 2

(SSE2) instructions

•13 Streaming SIMD Extensions 3 (SSE3)

instructions

•Enhanced floating point and multimedia

unit for enhanced video, audio,

encryption, and 3D performance

•Power Management capabilities

—System Management mode

—Multiple low-power states

•8-way cache associativity provides

improved cache hit rate on load/store

operations

Datasheet 9

Introduction

1Introduction

The Intel®Pentium®4 processor on 90 nm process is a follow on to the Intel®Pentium®4

processor in the 478-pin package with enhancements to the Intel NetBurst®microarchitecture. The

Pentium 4 processor on 90 nm process uses Flip-Chip Pin Grid Array (FC-mPGA4) package

technology, and plugs into a 478-pin surface mount, Zero Insertion Force (ZIF) socket, referred to

as the mPGA478B socket. The Pentium 4 processor on 90 nm process, like its predecessor, the

Pentium 4 processor in the 478-pin package, is based on the same Intel 32-bit microarchitecture

and maintains the tradition of compatibility with IA-32 software.

Note: In this document the Pentium 4 processor on 90 nm process is also referred to as the processor.

The Pentium 4 processor on 90 nm process supports Hyper-Threading Technology1. Hyper-

Threading Technology allows a single, physical processor to function as two logical processors.

While some execution resources (such as caches, execution units, and buses) are shared, each

logical processor has its own architecture state with its own set of general-purpose registers,

control registers to provide increased system responsiveness in multitasking environments, and

headroom for next generation multithreaded applications. Intel recommends enabling Hyper-

Threading Technology with Microsoft Windows* XP Professional or Windows* XP Home, and

disabling Hyper-Threading Technology via the BIOS for all previous versions of Windows

operating systems. For more information on Hyper-Threading Technology, see www.intel.com/

info/hyperthreading. Refer to Section 6.1, for Hyper-Threading Technology configuration details.

In addition to supporting all the existing Streaming SIMD Extensions 2 (SSE2), there are 13 new

instructions that further extend the capabilities of Intel processor technology. These new

instructions are called Streaming SIMD Extensions 3 (SSE3).These new instructions enhance the

performance of optimized applications for the digital home such as video, image processing and

media compression technology. 3D graphics and other entertainment applications (such as gaming)

will have the opportunity to take advantage of these new instructions as platforms with the Pentium

4 processor on 90 nm process and SSE3 become available in the market place.

The processor’s Intel NetBurst microarchitecture front side bus (FSB) uses a split-transaction,

deferred reply protocol like the Pentium 4 processor. The Intel NetBurst microarchitecture FSB

uses Source-Synchronous Transfer (SST) of address and data to improve performance by

transferring data four times per bus clock (4X data transfer rate, as in AGP 4X). Along with the 4X

data bus, the address bus can deliver addresses two times per bus clock and is referred to as a

"double-clocked" or 2X address bus. Working together, the 4X data bus and 2X address bus

provide a data bus bandwidth of up to 6.4 GB/s.

Intel will enable support components for the processor including heatsink, heatsink retention

mechanism, and socket. Manufacturability is a high priority; hence, mechanical assembly may be

completed from the top of the baseboard and should not require any special tooling.

The processor includes an address bus powerdown capability that removes power from the address

and data pins when the FSB is not in use. This feature is always enabled on the processor.

10 Datasheet

Introduction

1.1 Terminology

A ‘#’ symbol after a signal name refers to an active low signal, indicating a signal is in the active

state when driven to a low level. For example, when RESET# is low, a reset has been requested.

Conversely, when NMI is high, a nonmaskable interrupt has occurred. In the case of signals where

the name does not imply an active state but describes part of a binary sequence (such as address or

data), the ‘#’ symbol implies that the signal is inverted. For example, D[3:0] = ‘HLHL’ refers to a

hex ‘A’, and D[3:0]# = ‘LHLH’ also refers to a hex ‘A’ (H= High logic level, L= Low logic level).

“FSB” refers to the interface between the processor and system core logic (i.e., the chipset

components). The FSB is a multiprocessing interface to processors, memory, and I/O.

1.1.1 Processor Packaging Terminology

Commonly used terms are explained here for clarification:

•Intel®Pentium®4 processor on 90 nm process — Processor in the FC-mPGA4 package

with a 1-MB L2 cache.

•Processor — For this document, the term processor is the generic form of the Pentium 4

processor on 90 nm process.

•Keep-out zone — The area on or near the processor that system design cannot use.

•Intel® 865G/865GV/865PE/865P chipset — Chipset that supports DDR memory technology

for the Pentium 4 processor on 90 nm process.

•Intel® 875P chipset — Chipset that supports DDR memory technology for the Pentium 4

processor on 90 nm process

•Processor core — Processor core die with integrated L2 cache.

•FC-mPGA4 package — The Pentium 4 processor on 90 nm process is available in a Flip-

Chip Micro Pin Grid Array 4 package, consisting of a processor core mounted on a pinned

substrate with an integrated heat spreader (IHS). This packaging technology employs a

1.27 mm [0.05 in] pitch for the substrate pins.

•mPGA478B socket — The Pentium 4 processor on 90 nm process mates with the system

board through a surface mount, 478-pin, zero insertion force (ZIF) socket.

•Integrated heat spreader (IHS) —A component of the processor package used to enhance

the thermal performance of the package. Component thermal solutions interface with the

processor at the IHS surface.

•Retention mechanism (RM)—Since the mPGA478B socket does not include any mechanical

features for heatsink attach, a retention mechanism is required. Component thermal solutions

should attach to the processor via a retention mechanism that is independent of the socket.

•Storage conditions — Refers to a non-operational state. The processor may be installed in a

platform, in a tray, or loose. Processors may be sealed in packaging or exposed to free air.

Under these conditions, processor pins should not be connected to any supply voltages, have

any I/Os biased, or receive any clocks. Upon exposure to “free air”(i.e. unsealed packaging or

a device removed from packaging material) the processor must handled in accordance with

moisture sensitivity labeling (MSL) as indicated on the packaging material.

•Functional operation — Refers to normal operating conditions in which all processor

specifications, including DC, AC, FSB, signal quality, mechanical and thermal, are satisfied.

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