Texas Instruments TPS40200 Manuel utilisateur
User's GuideSLVU147A – February 2006 – Revised March 2006
Using the TPS40200
The TPS40200EVM-001 evaluation module (EVM) uses the TPS40200nonsynchronous buck converter to provide a resistor-selected 3.3-V output voltage thatdelivers up to 2.5 A from a 12-V input bus. The EVM operates from a single supply anduses a single P-channel power FET and Schottky diode to produce a low-cost buckconverter. The part operates at a 300-kHz clock frequency with provision for externalfrequency synchronization.
Contents1 Description ........................................................................................... 22 TPS40200EVM-001 Electrical and Performance Specifications ............................. 23 Schematic ........................................................................................... 34 Test Setup ........................................................................................... 45 TPS40200EVM Typical Performance Data and Characteristic Curves ..................... 76 EVM Assembly Drawings and Layout ........................................................... 97 List of Materials .................................................................................... 14
List of Figures
1 TPS40200EVM-001 Schematic ................................................................... 32 TPS40200 Synchronized to a 50% Duty Cycle External Clock .............................. 43 TPS40200EVM-001 Recommended Test Setup ............................................... 64 Output Ripple Measurement - Tip and Barrel Using TP14 and TP15 ....................... 65 TPS40200EVM-001 Efficiency .................................................................... 76 TPS40200EVM-001 Efficiency .................................................................... 87 TPS40200EVM-001 Line and Load Regulation – Vout = 3.3255 V .......................... 88 TPS40200EVM-001 Line and Load Regulation – Vout = 5.0665 V ......................... 99 TPS40200EVM-001 Component Placement (Viewed from Top) ........................... 1010 TPS40200EVM-001 Silkscreen (Viewed from Top) .......................................... 1111 TPS40200EVM-001 Top View .................................................................. 1212 TPS40200EVM-001 Bottom View ............................................................... 13
List of Tables
1 Adjusting V
OUT
With R6 Rounded to Standard 1% Resistor Values ......................... 32 TPS40200EVM-001 Bill of Materials ........................................................... 14
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1 Description
1.1 Features
1.2 Applications
2 TPS40200EVM-001 Electrical and Performance Specifications
Description
TPS40200EVM-001 is designed to operate with an 8-V to 16-V input and to produce a regulated 3.3-Voutput with a load current from 0.125 A to 2.5 A. The TPS40200EVM-001 demonstrates the use of theTPS40200 in a typical buck converter application. The board sacrifices some packing density to provideample test points for module evaluation. This EVM can be modified to support output voltages from 0.7 Vto 5 V by changing a single feedback resistor. The TPS40200EVM-001 has been built to the sampleapplication as described in the Application Information section of the TPS40200 data sheet (SLUS659 ).
•8-V to 16-V input range•3.3-V output, adjustable with single feedback resistor•0.125-A to 2.5-A steady-state output current•300-kHz switching frequency•Single P-channel MOSFET and single rectifier•Two-layer, 1.4-inch ×2.12-inch, surface-mount design with all components on one side•Convenient test points for probing critical waveforms and noninvasive loop response testing
•Nonisolated medium-current, point-of-load and low-voltage bus converters•Scanners
•Industrial controls•Distributed power systems•DSL/cable modems
PARAMETER TEXT CONDITIONS MIN NOM MAX UNIT
V
IN
Input voltage 8 12 16 VV
OUT
Output voltage IOUT at 2.5 A, R6 = 26.7 k Ω3.200 3.3 3.400
(1)
VLine regulation ±0.2% Vout 3.293 3.3 3.307 VLoad regulation ±0.2% Vout 3.293 3.3 3.307 VV
OUT
Output voltage IOUT at 2.5 A, R6 = 16.5 k Ω4.85 5 5.150
(1)
VLine regulation ±0.2% Vout 4.990 5 5.010 VLoad regulation ±0.2% Vout 4.990 5 5.010 VV
RIPPLE
Output ripple voltage At maximum output current 60 mVV
OVER
Output overshoot For 2.375-A load transient 60 mVV
UNDER
Output undershoot For 2.375-A load transient 60 mVI
OUT
Output current 0.125 2.5 AI
SCP
Short-circuit current trip point Imax +50% minimum 3.75 5 AEfficiency At nominal input voltage and maximum output 90%currentF
S
Switching frequency 300 kHz
(1)
Set-point accuracy depends on external resistor tolerance and the reference voltage. Line and load regulation values arereferenced to the nominal design output voltage.
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3 Schematic
Notes
R6 =26.7k for 3.3 Vout, R6 = 16.2k for 5.0 Vout
+
+
D3 : Do not populate. SOT 23 Common Cathode Dual Schottky
3.1 Adjusting Output Voltage (R6 and R10)
Vvout Vref1R10
R6
(1)
3.2 Using Remote Synchronizing (TP6)
Schematic
NOTE: For reference only; see Table 2, Bill of Materials for specific values
Figure 1. TPS40200EVM-001 Schematic
The regulated output voltage can be adjusted within a limited range by changing the ground resistor in thefeedback resistor divider (R6 and R10). The output voltage is given by Equation 1 .
Where V
REF
= 0.700 V and R10 = 100 k Ω
Table 1 contains common values for R6 to generate popular output voltages. TPS40200EVM-001 is stablethrough these output voltages with the efficiency rising with output voltage.
Table 1. Adjusting V
OUT
With R6 Rounded toStandard 1% Resistor Values
V
OUT
- Output Voltage (V) R6 - Feedback Resistor Divider(k Ω)
5 16.23.3 26.72.5 392 53.61.8 63.41.5 86.61.2 140
The TPS40200EVM-001 board has a synchronizing circuit that uses TP6 as an input. A logic high at thisinput turns on a small signal FET (Q1) whose drain is connected to the oscillator setting node (RC) on theTPS40200. The switching of this transistor over-drives the ramp associated with the internal oscillator andcauses the PWM switching to follow the input clock frequency. For reliable operation, the external clock
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4 Test Setup
4.1 Equipment
Test Setup
frequency should be 25% to 30% higher than the frequency set by R3 and C5. The BSS83 used in thiscircuit has a low (1-pF) output capacitance; so, its presence does not load down the normal operation ofthe RC pin. With the controller’s frequency set to a 300-kHz frequency, the module synchronizes to a390-kHz external clock that has a 50% duty cycle. A shorting jack, J2, is provided to disconnect thesynchronizing circuit from the (RC) node.
The following scope picture (Figure 2 ) shows a 5-V input clock at the TP6 input operating at 390 kHz anda 50% duty cycle. The switch node also shown in the picture is switching at the same frequency with a12-V V
CC
supply. The RC operating frequency of the TPS40200 is set by R3 and C5 to be 300 kHz.
Figure 2. TPS40200 Synchronized to a 50% Duty Cycle External Clock
4.1.1 Voltage Source
V
12V_IN
— The input voltage source (V
12V_IN
) should be a 0-V to 20-V variable dc source capable of 5 A dc.
METERS
A1: 0-A to 5-A dc ammeterV1: V
12V_IN
, 0-V to 20-V voltmeterV2: V
3V3_OUT
0 V to 10-V voltmeter
4.1.2 Loads
LOAD1 — The output load (LOAD1) should be an electronic constant-current-mode load capable of 0A-to-2.5 A dc at 1.5 V.
4.1.3 Recommended Wire Gauge
V
12V_IN
to J1 — The connection between the source voltage, V
12V_IN
and J1 of HPA164 can carry as muchas 3 A dc. The minimum recommended wire size is AWG 16 with the length of wire less than 4 feet (2 feetinput, 2 feet return).
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4.2 Equipment Setup
Test Setup
J3 to LOAD1 (Power) — The power connection between J3 of HPA164 and LOAD1 can carry as much as5 A dc. The minimum recommended wire size is 2x AWG 16, with the length of wire less than 4 feet (2feet output, 2 feet return).
J3 to LOAD1 (Remote Sense) — If remote sense is used, the remote sense connection between J3 ofHPA164 and LOAD1 will carry less than 1 A dc. The minimum recommended wire size is AWG 22, withthe length of wire less and 4 feet (2 feet output, 2 feet return).
4.1.4 Oscilloscope
A 60-MHz or faster oscilloscope can be used to determine the ripple voltage on 3V3_OUT. Theoscilloscope should be set for 1-M Ωimpedance, ac coupling, 1- µs/division horizontal resolution,20-mV/division vertical resolution for taking output ripple measurements. TP14 and TP15 can be used tomeasure the output ripple voltage by placing the oscilloscope probe tip through TP14 and holding theground barrel to TP15 as shown in Figure 3 . For a hands-free approach, the loop in TP15 can be cut andopened to cradle the probe barrel. Using a leaded ground connection may induce additional noise due tothe large ground loop area. Connect a short wire from the barrel of the scope probe to TP15 as necessaryto reach between TP14 and TP15.
Shown in Figure 3 is the basic test setup recommended to evaluate the TPS40200EVM-001. Note thatalthough the return for J1 and J3 are the same, the connections should remain separate as shown inFigure 3 .
4.2.1 Procedure
1. Working at an ESD workstation, ensure that any wrist straps, bootstraps, or mats are connectedreferencing the user to earth ground before power is applied to the EVM. Electrostatic smock andsafety glasses should also be worn.2. Prior to connecting the dc-input source, V
12V_IN
, it is advisable to limit the source current from V
12V_IN
to5 A maximum. Ensure that V
12V_IN
is initially set to 0 V and connected as shown in Figure 2 .3. Connect the ammeter A1 (0-A to 5-A range) between V
12V_IN
and J1 as shown in Figure 3 .4. Connect voltmeter V1 to TP1 and TP3 as shown in Figure 3 .5. Connect LOAD1 to J3 as shown in Figure 1 . Set LOAD1 to constant current mode to sink 0 A dcbefore V
12V_IN
is applied.6. Connect voltmeter, V2 across J3 pin 3 and J3 pin 2 as shown in Figure 3 .7. Connect the oscilloscope probe to TP14 and TP15 as shown in Figure 4 .
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LOAD1
3.3V @
2.5A
−+
V1
−3V3_OUT +
+12V_IN −
+−
Oscilloscope
1M ,AC
20mV / div
20MHz
+
A1
V
−
+
12V_IN
TP1
TP3 TP 14
TP6
TEXAS INSTRUMENTS
TPS40200EVM−001
12V to 3.3V @ 2.5A with sync Input
HPA164
J1
+
−
Sync
See Tip and Barrel
Measurement for V out
ripple
J2
Short
for
Sync
−
+
J1
+
−
TP1
−++
TP1
J1
J3
+
V2
TP 15
+
−
TP15TP14
Metal Ground Barrel
Probe Tip
Tip and Barrel Vout ripple measurement
4.3 Startup/Shutdown Procedure
Test Setup
4.2.2 Diagram
Figure 3. TPS40200EVM-001 Recommended Test Setup
Figure 4. Output Ripple Measurement - Tip and Barrel Using TP14 and TP15
1. Increase V
12V_IN
(V1) from 0 V to 12 V dc.2. Vary LOAD1 from 0 A to 2.5 A dc.3. Vary V
12V_IN
(V1) from 8 Vdc to 16 V dc.4. Decrease LOAD1 to 0 A.5. Decrease V12V_IN to 0 V.
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4.4 Equipment Shutdown
5 TPS40200EVM Typical Performance Data and Characteristic Curves
5.1 Efficiency
0
10
20
30
40
50
60
70
80
90
100
00.5 11.5 22.5 3
VI= 8 V
VI= 12 V VI= 16 V
VO= 3.3 V
−Efficiency −%
IO−Load Current −A
TPS40200EVM Typical Performance Data and Characteristic Curves
1. Shut down oscilloscope.2. Shut down LOAD1.3. Shut down V
12V_IN
.
Figure 5 through Figure 8 present typical performance curves for the TPS40200EVM-001. Because actualperformance data can be affected by measurement techniques and environmental variables, these curvesare presented for reference and may differ from actual field measurements.
NOTE: V
12V_IN
= 8-, 12-, and 16-V, V
3V3_OUT
= 3.3 V, I
1V5_OUT
= 0.125 A to 2.5 A
Figure 5. TPS40200EVM-001 Efficiency
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0
10
20
30
40
50
60
70
80
90
100
00.5 11.5 22.5 3
VI= 8 V
VO= 5 V
−Efficiency −%
IO−Load Current −A
VI= 12 V VI= 16 V
5.2 Line and Load Regulation
3.322
3.323
3.324
3.325
3.326
3.327
3.328
3.329
3.33
3.331
00.5 11.5 22.5 3
VI= 8 V
IO− Load Current − A
VI= 12 V
VI= 16 V
− Output Voltage − V
VO
VO= 3.3255 V
TPS40200EVM Typical Performance Data and Characteristic Curves
NOTE: V
12V_IN
= 8-, 12-, and 16-V, V
3V3_OUT
= 5 V, I
1V5_OUT
= 0.125 A to 2.5 A
Figure 6. TPS40200EVM-001 Efficiency
Figure 7. TPS40200EVM-001 Line and Load Regulation – Vout = 3.3255 V
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5.062
5.064
5.066
5.068
5.07
5.072
5.074
5.076
0 0.5 1 1.5 2 2.5 3
VI= 8 V
IO− Load Current − A
VI= 12 V
VI= 16 V
− Output Voltage − V
VO
6 EVM Assembly Drawings and Layout
EVM Assembly Drawings and Layout
Figure 8. TPS40200EVM-001 Line and Load Regulation – Vout = 5.0665 V
The following figures (Figure 9 through Figure 12 ) show the design of the TPS40200EVM-001printed-circuit board. The EVM has been designed using a 2-layer, 2-oz copper-clad circuit board, 1.4-inch×2.12-inch in size, with all components on the top side to allow the user to easily view, probe, andevaluate the TPS40200 control IC in a practical application. Moving components to both sides of the PCBor using additional internal layers can offer additional size reduction for space-constrained systems.
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EVM Assembly Drawings and Layout
Figure 9. TPS40200EVM-001 Component Placement (Viewed from Top)
10 Using the TPS40200 SLVU147A – February 2006 – Revised March 2006Submit Documentation Feedback
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