ST X-NUCLEO-SRC1M1 Manuel utilisateur

Introduction

The X-NUCLEO-SRC1M1 expansion board allows evaluating the features of TCPP02-M18 for the USB Type-C™ and the

protections for VBUS and CC lines suitable for source applications.

The expansion board is designed to be stacked on top of any STM32 Nucleo-64 development board with Power Delivery

(UCPD) peripheral embedded in their microcontrollers.

You can also stack it on top of any other STM32 Nucleo-64 development board not supporting the UCPD peripheral for 5

V, source only, to demonstrate the USB Type-C™ basic operations (attach, detach and 5 V power supply current capability

information).

When using an STM32 Nucleo-64 development board with Power Delivery peripheral, data functionalities as a host device or

dual role data (DRD) are also allowed.

The X-NUCLEO-SRC1M1 provides an effective demonstration of the source operation of the USB Type-C™ connector when

an external compatible source is connected to the board. The integrated ST715PU33R LDO linear regulator can supply the

connected STM32 Nucleo development board.

The X-NUCLEO-SRC1M1 is compliant with the latest USB Type-C™ and Power Delivery specifications.

The companion software package (X-CUBE-TCPP) contains the application examples for the development boards embedding

UCPD-based microcontrollers (for example, NUCLEO-G071RB, NUCLEO-G474RE, and NUCLEO-G0B1RE) and for those not

supporting the UCPD peripheral (NUCLEO-L412RB-P).

Figure 1. X-NUCLEO-SRC1M1 expansion board

Getting started with the X-NUCLEO-SRC1M1 USB Type-C™ Power Delivery

source expansion board based on TCPP02-M18 for STM32 Nucleo

UM2973

User manual

UM2973 - Rev 1 - December 2021

For further information contact your local STMicroelectronics sales office. www.st.com

1Getting started

1.1 Overview

The X-NUCLEO-SRC1M1 expansion board features:

• Supports all USB Type-C™ Power Delivery SPR profiles up to 100 W

• Manage source role data/power configuration

• Compliant with USB 2.0 dual role data according to STM32 USB data capability

• 8/20 μs surges and overcurrent protections, and discharge for VBUS

• Short to VBUS protection for configuration channel pins (CC1 and CC2)

• ESD protection (IEC61000-4-2 level 4 ± 8 kV contact discharge) for CC1, CC2, D+, and D-

• Overvoltage and overcurrent protections, and discharge for VCONN

• Common mode filter on D+/D- data lines

• Two power modes to optimize the current consumption

• Compliant with programmable power supplies (PPS)

• Free comprehensive development firmware library

• Compliant with STM32 Nucleo-64 boards featuring an STM32 with UCPD feature for Power Delivery and

without UCPD feature for a 5 V solution only

The X-NUCLEO-SRC1M1 provides an interface among three major blocks for the USB Type-C™ Power Delivery

source:

• USB Type-C™ connector;

• the Power Delivery controller embedded in the STM32 (UCPD) on the STM32 Nucleo development board;

• the power supply.

It also provides USB 2.0 data lines interface connection to the STM32 Nucleo MCU.

The BoM is optimized without compromising the protections for:

• VBUS line: overcurrent and surge protections;

• CC lines: overvoltage, overcurrent, and ESD protections;

• data lines: ESD protection and EMI filtering.

As required by the Power Delivery protocol, the TCPP02-M18 features:

• CC lines switch matrix for VCONN;

• VBUS discharge;

• VCONN discharge.

Fault mode report and two optimized power modes are also available.

All these features are managed through I²C communication.

The VBUS current analog readout is also possible when the STM32 ADC is connected to the TCPP02-M18

differential amplifier output.

The following hardware configurations are possible depending on the STM32 UCPD peripheral:

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Getting started

UM2973 - Rev 1 page 2/25

• the STM32 embeds the UCDP peripheral: 5 V to 20 V PD source or PPS source can be connected to the

provider path

Figure 2. Block diagram of X-NUCLEO-SRC1M1 connected to the STM32 Nucleo with UCPD

Firmware

I2C

USB Type-C™

VBUS

Provider path N-MOSFET

Configuration channels

USB 2.0 Data lines

Protections

STM32 Nucleo development board

ADC

X-NUCLEO-SRC1M1 expansion board

TCPP02-M18

UCPD

STM32

connector

Power bus

CC1/CC2 lines

D+/D-lines

USB 2.0

• the STM32 does not embed the UCPD peripheral: 5 V source only can be connected to the provider path

Figure 3. Block diagram of X-NUCLEO-SRC1M1 connected to the STM32 Nucleo without UCPD

STM32

Firmware

I2C

USB Type-C™

BUS

Power bus

Provider path N-MOSFET

Configuration channels

USB 2.0 Data lines

Protections

STM32 Nucleo development board

ADC

X-NUCLEO-SRC1M1 expansion board

TCPP02-M18

connector

CC1/CC2 lines

D+/D- lines

Note: In both the figures above, the solid lines indicate the USB Type-C™ connector connections, whereas the dotted

lines indicate internal connections.

1.2 Hardware architecture

The X-NUCLEO-SRC1M1 expansion board can be used with any STM32 Nucleo-64 development board.

The expansion board must be plugged on the matching pins of the development board CN7 and CN10 ST

morpho connectors.

Two hardware configurations are possible depending on the STM32 UCPD peripheral:

• if the STM32 embeds a UCDP peripheral, connect JP2 and JP3 jumpers to CC1_UCPD and CC2_UCPD,

respectively;

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Hardware architecture

UM2973 - Rev 1 page 3/25

• if the STM32 does not embed a UCPD peripheral, connect JP2 and JP3 jumpers to CC1_noUCPD and

CC2_noUCPD, respectively.

When plugged onto an STM32 Nucleo development board, the expansion board can be supplied in two different

ways:

• through the STM32 Nucleo ST-LINK supply by using the development board internal LDO;

• through the CN3 screw connector and thanks to the integrated ST715PU33R LDO linear regulator (U2) that

supplies the entire system.

Figure 4. X-NUCLEO-SRC1M1 main functional blocks (top view)

1 and 2: Morpho connectors

3, 4, 5, and 6: Arduino connectors

7: USB Type-C™ connector (CN1)

8: Provider path screw connector (CN3) + LED

9: Jumpers for CC lines configuration (JP2 and JP3)

10: 3.3 V LED

11: Jumpers for the board self-power (LDO out + NRST)

12: TCPP02-M18 USB Type-C™ source protection

13: ECMF02-2AMX6 common mode filter + ESD protection

14: ESDA25P35-1U1M TVS diode

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Hardware architecture

UM2973 - Rev 1 page 4/25

Figure 5. X-NUCLEO-SRC1M1 main functional blocks (bottom view)

1 and 2: Morpho connectors

3, 4, 5, and 6: Arduino connectors

7: 5 V only current capability table

8: STL40DN3LLH5 automotive-grade dual N-channel 30 V, 0.016 mΩ, 11 A STripFET H5 power MOSFET

9: Current sense 7 mΩ shunt resistor

10: ST715PU33R high input voltage LDO linear voltage regulator

1.2.1 USB Type-C™ connector

The USB Type-C™ receptacle (CN1) gathers the VBUS path and the main connections, such as CC lines and

USB 2.0 data lines (DP, DM), before dispatching data to the major functional blocks.

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Hardware architecture

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Figure 6. USB Type-C™ receptacle (CN1) and ESDA25P35-1U1M TVS diode (D1)

C13

2.2uF 50V

GND

ESDA25P35-1U1M

TP2

SH22

VBUS

GND

TP5

TP3

330pF 50V

CN1

ConUSB31_632723300011_recept

CC1

Dn1

Dp1

GND1

GND2

GND3

GND5

A12

GND6

B12

SBU1

SHELL1

SHELL2

SHELL3

SHELL4

SHELL5

SHELL6

SSRXn1

B10

SSRXn2

A10

SSRXp1

B11

SSRXp2

A11

SSTXn1

SSTXp1

VBUS1

VBUS2

VBUS4

Dn2

Dp2

GND4

SBU2

SSTXn2

SSTXp2

VBUS3

CC2

TP4

330pF 50V

TP1

CC1c

CC2c

An ESDA25P35-1U1M TVS diode (D1) protects the VBUS power line and, consequently, the entire system against

electrical overstress (EOS) when you connect a sink through the USB Type-C™ cable.

To be compliant with the USB Power Delivery standard requirements, the board embeds the 330 pF C1 and C2

capacitors, as well as the 2.2 µF C13 capacitor, which ensures a good system robustness.

1.2.2 USB 2.0 data path and configuration settings

The X-NUCLEO-SRC1M1 expansion board allows the STM32 Nucleo development boards that feature a USB 2.0

peripheral to expose the D+/D- lines on the USB Type-C™ receptacle (CN1).

Most STM32 Nucleo-64 development boards feature this functionality on the CN10-12 and CN10-14 pins of

the ST morpho connectors. The NUCLEO-L412RB-P, NUCLEO-L433RC-P, NUCLEO-L452RE-P and NUCLEO-

L476RG development boards, instead, map USB 2.0 data on CN10-33 and CN10-17 pins.

Two couples of resistances are connected to the ECMF02-2AMX6 (U3) USB 2.0 data line protection to extend the

use of this peripheral to all the STM32 Nucleo-64 development boards.

Figure 7. USB2.0 data line protection ECMF02-2AMX6 (U3) and resistor setup

GND

DP_G4

DP_XX

DM_G4

CC1_G4

ESD

ESD ESD

ESD

D-

GND

D-

D+D+

R19 0

SH13

SH11

R20 0

SH22

D+ecmf

D-ecmf

90 ohms

ZDiff 90 ohms

ZDiff

ECMF02-2AMX6

DM_xx

DP_xx

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Hardware architecture

UM2973 - Rev 1 page 6/25

By default, the X-NUCLEO-SRC1M1 expansion board mounts R19 and R20 resistors fitted to guarantee USB

2.0 compatibility with all the main microcontroller families. However, for the L4 family (NUCLEO-L412RB-P,

NUCLEO-L433RC-P, NUCLEO-L452RE-P, and NUCLEO-L476RG), you have to remove and replace them with

SH11 and SH13 solder bridges.

D+/- lines are used as data lines (the SH22 solder bridge is opened by default). Short them for source only by

closing the SH22 solder bridge except for 5 V, 0.5 A source in order to ensure compatibility with the USB BC 1.2

standard.

1.2.3 ST morpho and Arduino UNO V3 connectors

The figure below shows the ST morpho and Arduino UNO V3 connectors of the X-NUCLEO-SRC1M1 expansion

board. It details the main connections, functions, and configuration settings.

Figure 8. ST morpho and Arduino UNO V3 connectors

3.3V

GND

5 V

I2C1_SCL

I2C1_SDA

NRST CC1_G4 DP_G4

DM_G4

ADC_Vbusc

ADC_Prov

CC1_G0

ADC_Isense

DP_XX

CC1

CC2

CC1-5V

CC2-5V

ENABLE

FLGN

CN5

SSQ-110-03-F-S

CN6

SSQ-108-03-F-S

R26 0

R31

CN10

ESQ-119-14-T-D

R27 0

R41

100

JP2

JUMPER_3PIN

CN7

ESQ-119-14-T-D

CN9

SSQ-108-03-F-S

R24 0

R25 0

R40

100

JP3

JUMPER_3PIN

CN8

SSQ-106-03-G-S

CC2_G0

CC2_G4

CC lines are connected to the UCPD connection of the ST morpho connectors (CN7 CN10).

Two configurations are possible depending on the CC line connection to ST morpho connectors. To release the

STM32 pins, disconnect unused lines by removing R26/R25 or R24/R27.

An STM32 GPIO manages the TCPP02-M18 (U1) ENABLE PIN. You can also connect it directly to 3.3 V.

1.2.4 5 V only current capability

When the STM32 does not embed the UCPD peripheral, it is possible to manage a 5 V only source. JP2 and JP3

are then connected to CC1-5V and CC2-5V, respectively.

Resistor table 1 and table 2 indicate the 5 V current capability:

• R35/R39 mounted (default configuration): 0.5 A max. at 5 V (36 kΩ pullup to 3.3 V);

• R35/R39 not mounted and SH18/SH20 closed: 1.5 A max. at 5 V (12 kΩ pullup to 3.3 V);

• R35/R39 not mounted and SH19/SH21 closed: 3.0 A max. at 5 V (4.7 kΩ pullup to 3.3 V).

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Hardware architecture

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Figure 9. 5 V only current capability

Resistor table 1

3.3V 3.3V

CC1-5V CC2-5V

R34

4.7k

R39

R32

36k

SH20 SH21R35

SH18

R36

36k

SH19

R37

12k

R33

12k

R38

4.7k

Resistor table 2

When the STM32 embeds the UCPD peripheral, the STM32 manages the 5 V only sources without an external

pullup resistor (JP2 and JP3 are connected to CC1_UCPD and CC2_UCPD, respectively).

1.2.5 I²C bus

An I²C communication is present between the STM32 Nucleo master port and the TCPP02-M18 (U1) slave port

through the SCL and SDA pins.

The TCPP02-M18 I²C default address is 0x68. You can change it to 0x6A by closing the SH16 solder bridge and

unsoldering R28. The high level is then connected to the I2C_ADD pin of the TCPP02-M18.

The X-NUCLEO-SRC1M1 expansion board embeds two 1kΩ I²C pullup resistors (R11 and R12).

1.2.6 Connection of the voltage/current analog senses to the STM32 ADC

The X-NUCLEO-SRC1M1 has two voltage senses connected to the STM32 ADC:

• ADC_VBUSc: measures the VBUS voltage

Note: It is mandatory to ensure the system operation (for example, vSafe0V measurement).

• ADC_Prov: for information on the provider path voltage.

Voltage dividers (ratio 6) are compatible with 24 V DC voltages.

Figure 10. VBUS voltage sense for the STM32 ADC

ADC_VBUSc

200k

40.2k

The X-NUCLEO-SRC1M1 presents the analog current sense output of the TCPP02-M18 (IANA pin) and connects

it to the STM32 ADC (ADC_Isense).

The TCPP02-M18 has an internal differential amplifier (42 V/V) that measures the current flowing through R5 (7

mΩ).

The capacitor footprints (C9 and C11) have been added for potential filtering on analog senses.

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Hardware architecture

UM2973 - Rev 1 page 8/25

1.2.7 Consumer and provider path

The provider path can be connected to VBUS thanks to two dual STL40DN3LLH5 N-MOSFETs (Q2) controlled by

the TCPP02-M18 gate driver (SRC and GATE pins).

Figure 11. Provider path

Provider

GND

SOURCE

R22

LED5 blue

GND

ADC_Prov

SOURCE

FLGN

R10

47K

200k

Q2B

40.2k

0.007

GATE 6

SRC 7

ISENSE

VBUSc

Q2A

STL40DN3LLH5

CN3

1725656

Isense

The blue LED (D7) signals the voltage presence on the provider path. This LED does not indicate the N-MOSFET

state. In fact, the source LED D7 can be on to indicate the voltage presence on the provider path but, at the same

time, Q2 can be off (no connection of the provider path on the VBUS).

The CN3 screw connector allows accessing the consumer path. You can add additional protections (transient

or free-wheel diodes) on the D9 footprint that is compatible with the ESDAP series (ESDA7P120-1U1M up to

ESDA25P35-1U1M).

The output current of the TCPP02-M18 gate driver charge pump manages the inrush current. It is associated with

the STL40DN3LLH5 drain to the gate MOSFET capacitance (also called Miller capacitance or reverse transfer

capacitance). This association avoids any potential parasitic OCP triggering due to the inrush current generated

by cSnkBulk (between 1 µF and 10 µF), as defined by the USB Power Delivery standard at attach.

When using another MOSFET reference, the C8 external capacitor can be implemented to another MOS

reference. This implementation avoids the OCP triggering due to the inrush current, in case the drain-to-gate

capacitance is too low. The effective drain-to-gate capacitance including C8 must be higher than 20 pF.

When using a higher cSnkBulk capacitance, close Q2 slower. Then, mount the C8 capacitor, choosing 100 pF for

every additional 10 µF on the cSnkBulk terminal.

1.2.8 Overcurrent protection for VBUS and CC lines

The R5 terminal voltage (voltage between the TCPP02-M18 VBUSc and ISENSE pins) protects the TCPP02-M18

from overcurrent on the VBUS. When this voltage is higher than 0.042 V, the overcurrent protection turns on and

opens the provider path.

Table 1. VBUS currents according to the R5 shunt resistor values

Max. nominal current Overcurrent protection threshold R5 shunt resistor

0.5 A 0.9 A 47 mΩ

1.5 A 1.9 A 22 mΩ

3.0 A 4.2 A 10 mΩ

5.0 A 6.0 A 7 mΩ (default value)

When the overcurrent fault is detected:

• FLGN falls;

• the register 2 is updated;

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Hardware architecture

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• the recovery word is mandatory to get back to an operational system. Recovery words are:

– 0x18 written on the I2C register 0 to return to the normal mode;

– 0x28 written on the I2C register 0 to return to the low-power mode;

– 0x08 written on I2C register 0 to return to the hibernate mode.

The recovery word erases the error register (register 2) but does not connect the consumer or the provider path to

VBUS nor VCONN. Write the corresponding bits to close one or more switches on the additional step.

1.2.9 CC line overvoltage protection

Unplugging a defective cable, with a voltage higher than 5 V, from the USB Type-C™ connector might cause

a VBUS short to the CC lines (adjacent lines). This also might apply a voltage higher than the one specified for

the STM32 AMR on the CC lines (FT IO). The TCPP02-M18 overvoltage protection on the CC lines protects the

STM32.

1.2.10 LDO

The ST715PU33R (U2) is a 3.3 V high input voltage LDO, supplied through the provider path (for example, CN3).

To supply the system with the LDO output, you must close JP1 with:

• a jumper between 1 and 2 to connect the 3.3 V output voltage to the 3.3 V of the system;

• a jumper between 3 and 4 to force the STM32 NRST pin to 3.3 V (otherwise it might cause a potential

parasitic reset).

The D6 green LED signals the 3.3 V presence on the X-NUCLEO-SRC1M1.

Figure 12. LDO configuration

3. 3 V

High input voltage

85 mA LDO linear regulator

GND GND

3.3V

NRST

U2ST715PU33R

Exp Pad GND

OUT 8

NC1

NC2

GND

NC3 7

NC4 6

FB 5

JP1

TSW-102-07-F-D

1 2

3 4

R23

LED green

470n 5V

100n 25V 1

Provider

GND

SOURCE

R22

LED5 blue

1.2.11 TCPP02-M18 overview

3.3 V is connected to the VCC/VCONN pin of the TCPP02-M18 (U1). It supplies the IC and also provides the

input voltage for VCONN.

VCONN voltage can be in the range of 3.0 to 5.5 V according to the USB-PD standard: VCC/VCONN is compatible

with this voltage range.

All TCPP02-M18 I/Os connected to the STM32 are compliant with 3.3 V and 1.8 V (FLGn, ENABLE, IANA, SDA,

SLC), except CC1 and CC2 I/Os, in which they are in accordance with the USB-PD standard voltages. I2C_ADD

is also compliant with 3.3 V and 1.8 V.

The TCPP02-M18 ENABLE pin is connected to the STM32 GPIO but you can also connect it directly to 3.3 V with

the R29 resistor.

The CBIAS pin capacitor (C3) is the TCPP02-M18 ESD capacitor. Its value must be ≥100 nF and 50 V rated to

limit the voltage derating.

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