Silicon Laboratories Si446 Series Manuel utilisateur

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AN625

Si446XAPI DESCRIPTIONS

1. Introduction

This document provides API descriptions for the commands and properties used to control and configure the

Si446x family.

2. API Summary

2.1. Command Summary

Table 1. Command Summary

Boot Commands

Number Name Summary

0x02 POWER_UP Power-up device and mode selection. Modes include operational

function.

0x04 PATCH_IMAGE Loads image from NVM/ROM into RAM.

Common Commands

Number Name Summary

0x00 NOP No operation command

0x01 PART_INFO Reports basic information about the device.

0x10 FUNC_INFO Returns the Function revision information of the device.

0x11 SET_PROPERTY Sets the value of a property.

0x12 GET_PROPERTY Retrieve a property's value.

0x13 GPIO_PIN_CFG Configures the GPIO pins.

0x14 GET_ADC_READING Retrieve the results of possible ADC conversions.

0x15 FIFO_INFO Provides access to transmit and receive fifo counts and reset.

0x16 GET_PACKET_INFO Returns information about the last packet received.

0x17 IRCAL Calibrate Image Rejection (Si4463 and Si4464 only).

0x18 PROTOCOL_CFG Sets the chip up for specified protocol.

0x20 GET_INT_STATUS Returns the interrupt status byte.

0x21 GET_PH_STATUS Returns the packet handler status.

0x22 GET_MODEM_STATUS Returns the modem status byte.

0x23 GET_CHIP_STATUS Returns the chip status.

0x31 START_TX Switches to TX state and starts packet transmission.

0x32 START_RX Switches to RX state. Command arguments are retained though

sleep state, so these only need to be written when they change.

0x33 REQUEST_DEVICE_STATE Request current device state.

0x34 CHANGE_STATE Update state machine entries.

0x36 RX_HOP Fast RX to RX transitions for use in frequency hopping systems

AN625

2 Rev. 0.1

2.2. Property Summary

Common Properties

Number Name Default Summary

0x0100 INT_CTL_ENABLE 0x04 Interrupt enable property

0x0101 INT_CTL_PH_ENABLE 0x00 Packet handler interrupt enable property

0x0102 INT_CTL_MODEM_ENABLE 0x00 Modem interrupt enable property

0x0103 INT_CTL_CHIP_ENABLE 0x04 Chip interrupt enable property

0x0200 FRR_CTL_A_MODE 0x01 Fast Response Register A Configuration

0x0201 FRR_CTL_B_MODE 0x02 Fast Response Register B Configuration

0x0202 FRR_CTL_C_MODE 0x09 Fast Response Register C Configuration

0x0203 FRR_CTL_D_MODE 0x00 Fast Response Register D Configuration

0x1101 SYNC_BITS_31_24 0x2D Byte 3 of sync word

0x1102 SYNC_BITS_23_16 0xD4 Byte 2 of sync word

0x2400 EZCONFIG_MODULATION 0x02 Configure modulation using the EZ config

feature.

0x4000 FREQ_CONTROL_INTE 0x3C Frac-N PLL integer number.

0x4001 FREQ_CONTROL_FRAC_2 0x08 Byte 2 of Frac-N PLL fraction number.

0x4002 FREQ_CONTROL_FRAC_1 0x00 Byte 1 of Frac-N PLL fraction number.

0x4003 FREQ_CONTROL_FRAC_0 0x00 Byte 0 of Frac-N PLL fraction number.

0x4004 FREQ_CONTROL_CHANNEL_STEP_SIZE_1 0x00 Byte 1 of channel step size.

0x4005 FREQ_CONTROL_CHANNEL_STEP_SIZE_0 0x00 Byte 0 of channel step size.

0x0000 GLOBAL_XO_TUNE 0x40 Configure crystal oscillator frequency tun-

ing bank

0x0001 GLOBAL_CLK_CFG 0 Clock configuration options

0x0002 GLOBAL_LOW_BATT_THRESH 0x18 Low battery threshold

0x0003 GLOBAL_CONFIG 0 Global configuration settings

0x0004 GLOBAL_WUT_CONFIG 0x00 GLOBAL WUT configuation

0x0005 GLOBAL_WUT_M_15_8 0x00 Configure WUT_M_15_8

0x0006 GLOBAL_WUT_M_7_0 0x01 Configure WUT_M_7_0

0x0007 GLOBAL_WUT_R 0x00 Configure WUT_R

0x0008 GLOBAL_WUT_LDC 0x00 Configure WUT_LDC

0x1000 PREAMBLE_TX_LENGTH 0x08 Preamble length

0x1001 PREAMBLE_CONFIG_STD_1 0x14 Standard preamble configuration

0x1002 PREAMBLE_CONFIG_NSTD 0x00 Non-standard preamble configuation

AN625

Rev. 0.1 3

0x1003 PREAMBLE_CONFIG_STD_2 0x0F Standard preamble configuration

0x1004 PREAMBLE_CONFIG 0x21 Preamble configuration bits

0x1005 PREAMBLE_PATTERN_31_24 0 Preamble pattern

0x1006 PREAMBLE_PATTERN_23_16 0 Preamble pattern

0x1007 PREAMBLE_PATTERN_15_8 0 Preamble pattern

0x1008 PREAMBLE_PATTERN_7_0 0 Preamble pattern

0x1100 SYNC_CONFIG 0x01 Sync configuration bits

0x1103 SYNC_BITS_15_8 0x2D Byte 1 of sync word

0x1104 SYNC_BITS_7_0 0xD4 Byte 0 of sync word

0x1200 PKT_CRC_CONFIG 0 Select a CRC polynomial and seed

0x1206 PKT_CONFIG1 0 General packet configuration bits

0x1208 PKT_LEN 0x00 Provides information regarding how to

use the length from the received packet.

0x1209 PKT_LEN_FIELD_SOURCE 0 Field number containing the embedded

length field.

0x120A PKT_LEN_ADJUST 0 Adjust length field by this amount to

derive the variable length information.

0x120B PKT_TX_THRESHOLD 0x30 TX almost empty threshold.

0x120C PKT_RX_THRESHOLD 0x30 RX almost full threshold.

0x120D PKT_FIELD_1_LENGTH_12_8 0x00 Byte 1 of field length

0x120E PKT_FIELD_1_LENGTH_7_0 0x00 Byte 0 of field length

0x120F PKT_FIELD_1_CONFIG 0x00 Field 1 configuration bits.

0x1210 PKT_FIELD_1_CRC_CONFIG 0x00 Field 1 CRC configuration bits.

0x1211 PKT_FIELD_2_LENGTH_12_8 0x00 Byte 1 of field length

0x1212 PKT_FIELD_2_LENGTH_7_0 0x00 Byte 0 of field length

0x1213 PKT_FIELD_2_CONFIG 0x00 Field 2 configuration bits.

0x1214 PKT_FIELD_2_CRC_CONFIG 0x00 Field 2 CRC configuration bits.

0x1215 PKT_FIELD_3_LENGTH_12_8 0x00 Byte 1 of field length

0x1216 PKT_FIELD_3_LENGTH_7_0 0x00 Byte 0 of field length

0x1217 PKT_FIELD_3_CONFIG 0x00 Field 3 configuration bits.

0x1218 PKT_FIELD_3_CRC_CONFIG 0x00 Field 3 CRC configuration bits.

0x1219 PKT_FIELD_4_LENGTH_12_8 0x00 Byte 1 of field length

0x121A PKT_FIELD_4_LENGTH_7_0 0x00 Byte 0 of field length

Common Properties

Number Name Default Summary

AN625

4 Rev. 0.1

0x121B PKT_FIELD_4_CONFIG 0x00 Field 4 configuration bits.

0x121C PKT_FIELD_4_CRC_CONFIG 0x00 Field 4 CRC configuration bits.

0x121D PKT_FIELD_5_LENGTH_12_8 0x00 Byte 1 of field length

0x121E PKT_FIELD_5_LENGTH_7_0 0x00 Byte 0 of field length

0x121F PKT_FIELD_5_CONFIG 0x00 Field 5 configuration bits.

0x1220 PKT_FIELD_5_CRC_CONFIG 0x00 Field 5 CRC configuration bits.

0x1221 PKT_RX_FIELD_1_LENGTH_12_8 0x00 Byte 1 of field length for RX

0x1222 PKT_RX_FIELD_1_LENGTH_7_0 0x00 Byte 0 of field length for RX

0x1223 PKT_RX_FIELD_1_CONFIG 0x00 Field 1 configuration bits for RX.

0x1224 PKT_RX_FIELD_1_CRC_CONFIG 0x00 Field 1 CRC configuration bits for RX.

0x1225 PKT_RX_FIELD_2_LENGTH_12_8 0x00 Byte 1 of field length for RX

0x1226 PKT_RX_FIELD_2_LENGTH_7_0 0x00 Byte 0 of field length for RX

0x1227 PKT_RX_FIELD_2_CONFIG 0x00 Field 2 configuration bits for RX.

0x1228 PKT_RX_FIELD_2_CRC_CONFIG 0x00 Field 2 CRC configuration bits for RX.

0x1229 PKT_RX_FIELD_3_LENGTH_12_8 0x00 Byte 1 of field length for RX

0x122A PKT_RX_FIELD_3_LENGTH_7_0 0x00 Byte 0 of field length for RX

0x122B PKT_RX_FIELD_3_CONFIG 0x00 Field 3 configuration bits for RX.

0x122C PKT_RX_FIELD_3_CRC_CONFIG 0x00 Field 3 CRC configuration bits for RX.

0x122D PKT_RX_FIELD_4_LENGTH_12_8 0x00 Byte 1 of field length for RX

0x122E PKT_RX_FIELD_4_LENGTH_7_0 0x00 Byte 0 of field length for RX

0x122F PKT_RX_FIELD_4_CONFIG 0x00 Field 4 configuration bits for RX.

0x1230 PKT_RX_FIELD_4_CRC_CONFIG 0x00 Field 4 CRC configuration bits for RX.

0x1231 PKT_RX_FIELD_5_LENGTH_12_8 0x00 Byte 1 of field length for RX

0x1232 PKT_RX_FIELD_5_LENGTH_7_0 0x00 Byte 0 of field length for RX

0x1233 PKT_RX_FIELD_5_CONFIG 0x00 Field 5 configuration bits for RX.

0x1234 PKT_RX_FIELD_5_CRC_CONFIG 0x00 Field 5 CRC configuration bits for RX.

0x2000 MODEM_MOD_TYPE 0x02 Modulation Type

0x2001 MODEM_MAP_CONTROL 0x80 Controls bit mapping.

0x2002 MODEM_DSM_CTRL 0x07 DSM control

0x2003 MODEM_DATA_RATE_2 0x0F Byte 2 of TX data rate in bps (bits per

second).

0x2004 MODEM_DATA_RATE_1 0x42 Byte 1 of TX data rate in bps (bits per

second).

Common Properties

Number Name Default Summary

AN625

Rev. 0.1 5

0x2005 MODEM_DATA_RATE_0 0x40 Byte 0 of TX data rate in bps (bits per

second).

0x200A MODEM_FREQ_DEV_2 0x00 Byte 2 of TX frequency deviation (a 17-bit

unsigned number). This only programs

the MSB of TX frequency deviation.

0x200B MODEM_FREQ_DEV_1 0x06 Byte 1 of frequency deviation.

0x200C MODEM_FREQ_DEV_0 0xD3 Byte 0 of frequency deviation.

0x200D MODEM_RESERVED_20_0D 0x00

0x200E MODEM_RESERVED_20_0E 0x00

0x2049 MODEM_ANT_DIV_CONTROL 0x80 Specifies antenna diversity controls.

Antenna diversity mode is valid for stan-

dard packet only.

0x204A MODEM_RSSI_THRESH 0x08 RSSI threshold control

0x204B MODEM_RSSI_JUMP_THRESH 0x0C RSSI jumping detection threshold.

0x204C MODEM_RSSI_CONTROL 0x01 RSSI control

0x204D MODEM_RSSI_CONTROL2 0x00 RSSI control

0x204E MODEM_RSSI_COMP 0x32 RSSI reading offset.

0x2050 MODEM_RESERVED_20_50 0x00

0x2200 PA_MODE 0x10 PA operating mode and groups.

0x2201 PA_PWR_LVL 0x7F PA Level Configuration

0x2202 PA_BIAS_CLKDUTY 0x00 PA Bias and TX clock duty cycle configu-

ration

0x2203 PA_TC 0x01 PA cascode ramping Configuration

0x3000 MATCH_VALUE_1 0x00 Match 1 value.

0x3001 MATCH_MASK_1 0x00 Match 1 mask.

0x3002 MATCH_CTRL_1 0x00 Pacekt match enable and match 1 config-

uration.

0x3003 MATCH_VALUE_2 0x00 Match 2 value.

0x3004 MATCH_MASK_2 0x00 Match 2 mask.

0x3005 MATCH_CTRL_2 0x00 Match 2 configuration.

0x3006 MATCH_VALUE_3 0x00 Match 3 value.

0x3007 MATCH_MASK_3 0x00 Match 3 mask.

0x3008 MATCH_CTRL_3 0x00 Match 3 configuration.

0x3009 MATCH_VALUE_4 0x00 Match 4 value.

0x300A MATCH_MASK_4 0x00 Match 4 mask.

Common Properties

Number Name Default Summary

AN625

6 Rev. 0.1

0x300B MATCH_CTRL_4 0x00 Match 4 configuration.

0x4006 FREQ_CONTROL_W_SIZE 0x20 30 MHz clock cycles

0x4007 FREQ_CONTROL_VCOCNT_RX_ADJ 0xFF VCO target count adjustment for RX

0x5000 RX_HOP_CONTROL 0x04 RX hop control.

0x5001 RX_HOP_TABLE_SIZE 0x01 Number of entries in the RX hop table.

0x5002 RX_HOP_TABLE_ENTRY_0 0 No.1 entry in RX hopping table.

0x500x RX_HOP_TABLE_ENTRY_xx 1 Entries 2-63 in RX hopping table.

0x5041 RX_HOP_TABLE_ENTRY_64 2 No.3 entry in RX hopping table.

Common Properties

Number Name Default Summary

AN625

Rev. 0.1 7

3. Commands

3.1. Boot Commands

3.1.1. POWER_UP

Summary: Power-up device and mode selection. Modes include operational function

Purpose:

Power-up the device with the specified function. Power-up is complete when the CTS bit is set. This command may take

longer to set the CTS bit than other commands.

Command Stream

Reply Stream

Parameters:

PATCH - Select patch mode.

0 = Boot normally.

1 = Copy image selected by FUNC to RAM, but do not boot. After CTS is set, RAM may be patched via

PATCH_ARGS and PATCH_DATA commands.

FUNC[5:0] - Selects the boot function of the device

0 = Boot Loader

1 = Transceiver

TCXO - Select if TCXO is in use.

0 = XTAL is not TCXO.

1 = XTAL is TCXO.

XO_FREQ[31:0] - Frequency of TCXO or external crystal oscillator in Hz. The default is 30000000 (30MHz).

Range: 25000000 to 32000000

Response:

None

POWER_UPCommand 7 654321 0

CMD 0x02

BOOT_OPTIONS PATCH 0 FUNC[5:0]

XTAL_OPTIONS 0000000 TCXO

XO_FREQ XO_FREQ[31:24]

XO_FREQ XO_FREQ[23:16]

XO_FREQ XO_FREQ[15:8]

XO_FREQ XO_FREQ[7:0]

POWER_UPReply 76543210

CMD_COMPLETE CMD_COMPLETE[7:0]

AN625

8 Rev. 0.1

3.1.2. PATCH_IMAGE

Summary: Loads image from NVM/ROM into RAM.

Purpose:

Loads the selected function into RAM for execution or patching

Command Stream

Reply Stream

Parameters:

FUNC[3:0] - Selects the image to load

0 = Boot Loader - No image is loaded

1 = Transceiver

Response:

None

PATCH_IMAGE Command 7 6 5 4 3 2 1 0

CMD 0x04

FLAGS 0000 FUNC[3:0]

PATCH_IMAGE Reply 7 6 5 4 3 2 1 0

CMD_COMPLETE CMD_COMPLETE[7:0]

AN625

Rev. 0.1 9

3.2. Common Commands

3.2.1. NOP

Summary: No operation command

Purpose:

Can be used to ensure communication with the device.

Command Stream

Reply Stream

Parameters:

None

Response:

None

NOPCommand 76543210

CMD 0x00

NOPReply 76543210

CMD_COMPLETE CMD_COMPLETE[7:0]

AN625

10 Rev. 0.1

3.2.2. PART_INFO

Summary: Reports basic information about the device.

Purpose:

Returns Part Number, Part Version, ROM ID, etc

Command Stream

Reply Stream

Parameters:

None

Response:

CHIPREV[7:0] - Chip Mask Revision

PART[15:0] - Part Number. e.g. si4440 will return - 0x4440)

PBUILD[7:0] - Part Build

ID[15:0] - ID

CUSTOMER[7:0] - Customer ID

ROMID[7:0] - ROM ID

PART_INFO Command 7 6 5 4 3 2 1 0

CMD 0x01

PART_INFO Reply 7 6 5 4 3 2 1 0

CMD_COMPLETE CMD_COMPLETE[7:0]

CHIPREV CHIPREV[7:0]

PART PART[15:8]

PART PART[7:0]

PBUILD PBUILD[7:0]

ID ID[15:8]

ID ID[7:0]

CUSTOMER CUSTOMER[7:0]

ROMID ROMID[7:0]

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