Silicon Laboratories SiM3L1xx Manuel utilisateur

SiM3L1xx

High-Performance, Low-Power, 32-Bit Precision32™

MCU Family with up to 256 kB of Flash

32-bit ARM Cortex-M3 CPU

-50 MHz maximum frequency

-Single-cycle multiplication, hardware division support

-Nested vectored interrupt control (NVIC) with 8 priority levels

Memory

-32–256 kB flash, in-system programmable

-8–32 kB SRAM with configurable low power retention

Clock Sources

-Internal oscillator with PLL: 23–50 MHz

-Low power internal oscillator: 20 MHz

-Low frequency internal oscillator (LFO): 16.4 kHz

-External real-time clock (RTC) crystal oscillator

-External oscillator: Crystal, RC, C, CMOS clock

Power Management

-Three adjustable low drop-out (LDO) regulators

-Power-on reset circuit and brownout detectors

-DC-DC buck converter allows dynamic voltage scaling for

maximum efficiency (250 mW output)

-Multiple power modes supported for low power optimization

Low Power Features

-75 nA typical current in Power Mode 8

-Low-current RTC (180 nA from LFO, 300 nA from crystal)

-4 μs wakeup, register state retention and no reset required from

lowest power mode

-175 μA/MHz at 3.6 V executing from flash

-140 μA/MHz at 3.6 V executing from SRAM

-Specialized on-chip charge pump reduces power consumption

-Process/Voltage/Temperature (PVT) Monitor

5 V Tolerant Flexible I/O

-Up to 62 contiguous 5 V tolerant GPIO with one priority cross-

bar providing flexibility in pin assignments

Temperature Range: –40 to +85 °C

Supply Voltage: 1.8 to 3.8 V

Analog Peripherals

-12-Bit Analog-to-Digital Converter: Up to 250 ksps 12-bit mode

or 1

Msps 10-bit mode

-10-Bit Current-mode Digital-to-Analog Converter

-2 x Low-current comparators

Digital and Communication Peripherals

-1 x USART with IrDA and ISO7816 Smartcard support

-1 x UART that operates in low power mode

-2 x SPIs, 1 x I2C, 16/32-bit CRC

-128/192/256-bit Hardware AES Encryption

-Encoder/Decoder: Manchester and Three-out-of-Six

-Integrated LCD Controller: up to 160 segments (40x4), auto-

contrast and low power operation

Timers/Counters

-3 x 32-bit or 6 x 16-bit timers with capture/compare

-16-bit, 6-channel counter with capture/compare/PWM and

dead-time controller with differential outputs

-16-bit low power timer/advanced capture counter operational in

the lowest power mode

-32-bit real time clock (RTC) with multiple alarms

-Watchdog timer

-Low power mode advanced capture counter (ACCTR)

Data Transfer Peripherals

-10-Channel DMA Controller

-3 Channel Data Transfer Manager manages complex DMA

transfers without core intervention

On-Chip Debugging

-Serial wire debug (SWD) with serial wire viewer (SWV) or JTAG

(no boundary scan) allow debug and programming

-Cortex-M3 embedded trace macrocell (ETM)

Package Options

-QFN options: 40-pin (6 x 6 mm), 64-pin (9 x 9 mm)

-TQFP options: 64-pin (10 x 10 mm), 80-pin (12 x 12 mm)

2 Rev 1.1

SiM3L1xx

Rev 1.1 3

Table of Contents

1. Related Documents and Conventions...............................................................................5

1.1. Related Documents........................................................................................................5

1.1.1. SiM3L1xx Reference Manual.................................................................................5

1.1.2. Hardware Access Layer (HAL) API Description ....................................................5

1.1.3. ARM Cortex-M3 Reference Manual.......................................................................5

1.2. Conventions ...................................................................................................................5

2. Typical Connection Diagrams ............................................................................................6

2.1. Power .............................................................................................................................6

3. Electrical Specifications......................................................................................................8

3.1. Electrical Characteristics ................................................................................................8

3.2. Thermal Conditions ......................................................................................................30

3.3. Absolute Maximum Ratings..........................................................................................31

4. Precision32™ SiM3L1xx System Overview.....................................................................32

4.1. Power ...........................................................................................................................34

4.1.1. DC-DC Buck Converter (DCDC0)........................................................................34

4.1.2. Three Low Dropout LDO Regulators (LDO0) ......................................................35

4.1.3. Voltage Supply Monitor (VMON0) .......................................................................35

4.1.4. Power Management Unit (PMU)..........................................................................35

4.1.5. Device Power Modes...........................................................................................35

4.1.6. Process/Voltage/Temperature Monitor (TIMER2 and PVTOSC0).......................38

4.2. I/O.................................................................................................................................39

4.2.1. General Features.................................................................................................39

4.2.2. Crossbar ..............................................................................................................39

4.3. Clocking........................................................................................................................40

4.3.1. PLL (PLL0)...........................................................................................................41

4.3.2. Low Power Oscillator (LPOSC0) .........................................................................41

4.3.3. Low Frequency Oscillator (LFOSC0)...................................................................41

4.3.4. External Oscillators (EXTOSC0)..........................................................................41

4.4. Integrated LCD Controller (LCD0)................................................................................42

4.5. Data Peripherals...........................................................................................................43

4.5.1. 10-Channel DMA Controller.................................................................................43

4.5.2. Data Transfer Managers (DTM0, DTM1, DTM2) .................................................43

4.5.3. 128/192/256-bit Hardware AES Encryption (AES0) ............................................43

4.5.4. 16/32-bit Enhanced CRC (ECRC0) .....................................................................44

4.5.5. Encoder / Decoder (ENCDEC0) ..........................................................................44

4.6. Counters/Timers...........................................................................................................45

4.6.1. 32-bit Timer (TIMER0, TIMER1, TIMER2)...........................................................45

4.6.2. Enhanced Programmable Counter Array (EPCA0) .............................................45

4.6.3. Real-Time Clock (RTC0) .....................................................................................46

4.6.4. Low Power Timer (LPTIMER0)............................................................................46

4.6.5. Watchdog Timer (WDTIMER0)............................................................................46

4.6.6. Low Power Mode Advanced Capture Counter (ACCTR0)...................................47

4.7. Communications Peripherals .......................................................................................48

4.7.1. USART (USART0) ...............................................................................................48

SiM3L1xx

4 Rev 1.1

4.7.2. UART (UART0)....................................................................................................48

4.7.3. SPI (SPI0, SPI1) ..................................................................................................49

4.7.4. I2C (I2C0) ............................................................................................................49

4.8. Analog ..........................................................................................................................50

4.8.1. 12-Bit Analog-to-Digital Converter (SARADC0)...................................................50

4.8.2. 10-Bit Digital-to-Analog Converter (IDAC0) .........................................................50

4.8.3. Low Current Comparators (CMP0, CMP1) ..........................................................50

4.9. Reset Sources..............................................................................................................51

4.10.Security ........................................................................................................................52

4.11.On-Chip Debugging .....................................................................................................52

5. Ordering Information.........................................................................................................53

6. Pin Definitions....................................................................................................................55

6.1. SiM3L1x7 Pin Definitions .............................................................................................55

6.2. SiM3L1x6 Pin Definitions .............................................................................................62

6.3. SiM3L1x4 Pin Definitions .............................................................................................69

6.4. TQFP-80 Package Specifications ................................................................................74

6.4.1. TQFP-80 Solder Mask Design.............................................................................77

6.4.2. TQFP-80 Stencil Design ......................................................................................77

6.4.3. TQFP-80 Card Assembly.....................................................................................77

6.5. QFN-64 Package Specifications ..................................................................................78

6.5.1. QFN-64 Solder Mask Design...............................................................................80

6.5.2. QFN-64 Stencil Design ........................................................................................80

6.5.3. QFN-64 Card Assembly.......................................................................................80

6.6. TQFP-64 Package Specifications ................................................................................81

6.6.1. TQFP-64 Solder Mask Design.............................................................................84

6.6.2. TQFP-64 Stencil Design ......................................................................................84

6.6.3. TQFP-64 Card Assembly.....................................................................................84

6.7. QFN-40 Package Specifications ..................................................................................85

6.7.1. QFN-40 Solder Mask Design...............................................................................87

6.7.2. QFN-40 Stencil Design ........................................................................................87

6.7.3. QFN-40 Card Assembly.......................................................................................87

7. Revision Specific Behavior...............................................................................................88

7.1. Revision Identification ..................................................................................................88

Document Change List...........................................................................................................90

Contact Information................................................................................................................91

SiM3L1xx

Rev 1.1 5

1. Related Documents and Conventions

1.1. Related Documents

This data sheet accompanies several documents to provide the complete description of the SiM3L1xx devices.

1.1.1. SiM3L1xx Reference Manual

The Silicon Laboratories SiM3L1xx Reference Manual provides the detailed description for each peripheral on the

SiM3L1xx devices.

1.1.2. Hardware Access Layer (HAL) API Description

The Silicon Laboratories Hardware Access Layer (HAL) API provides C-language functions to modify and read

each bit in the SiM3L1xx devices. This description can be found in the SiM3xxxx HAL API Reference Manual.

1.1.3. ARM Cortex-M3 Reference Manual

The ARM-specific features like the Nested Vectored Interrupt Controller are described in the ARM Cortex-M3

reference documentation. The online reference manual can be found here:

http://infocenter.arm.com/help/topic/com.arm.doc.subset.cortexm.m3/index.html#cortexm3.

1.2. Conventions

The block diagrams in this document use the following formatting conventions:

Figure 1.1. Block Diagram Conventions

SiM3L1xx

6 Rev 1.1

2. Typical Connection Diagrams

This section provides typical connection diagrams for SiM3L1xx devices.

2.1. Power

Figure 2.1 shows a typical connection diagram for the power pins of the SiM3L1xx devices when the dc-dc buck

converter is not used.

Figure 2.1. Connection Diagram with DC-DC Converter Unused

Figure 2.2 shows a typical connection diagram for the power pins of the SiM3L1xx devices when the internal dc-dc

buck converter is in use and I/O are powered directly from the battery.

Figure 2.2. Connection Diagram with DC-DC Converter Used and I/O Powered from Battery

Figure 2.3 shows a typical connection diagram for the power pins of the SiM3L1xx devices when used with an

external radio device like the Silicon Labs EZRadio®or EZRadioPRO®devices.

SiM3L1xx

Rev 1.1 7

Figure 2.3. Connection Diagram with External Radio Device

Figure 2.4 shows a typical connection diagram for the power pins of the SiM3L1xx devices when the dc-dc buck

converter is used and the I/O are powered separately.

Figure 2.4. Connection Diagram with DC-DC Converter Used and I/O Powered Separately

SiM3L1xx

8 Rev 1.1

3. Electrical Specifications

3.1. Electrical Characteristics

Table 3.1. Recommended Operating Conditions

Parameter Symbol Test Condition Min Typ Max Unit

Operating Supply Voltage on

VBAT/VBATDC

VBAT 1.8 — 3.8 V

Operating Supply Voltage on VDC VDC 1.25 — 3.8 V

Operating Supply Voltage on VDRV VDRV 1.25 — 3.8 V

Operating Supply Voltage on VIO VIO 1.8 — VBAT V

Operation Supply Voltage on VIORF VIORF 1.8 — VBAT V

Operation Supply Voltage on VLCD VLCD 1.8 — 3.8 V

System Clock Frequency (AHB) fAHB 0 — 50 MHz

Peripheral Clock Frequency (APB) fAPB 0 — 50 MHz

Operating Ambient Temperature TA–40 — +85 °C

Operating Junction Temperature TJ–40 — 105 °C

Note: All voltages with respect to VSS.

All electrical parameters in all Tables are specified under the conditions listed in Table 3.1, unless stated otherwise.

SiM3L1xx

Rev 1.1 9

Table 3.2. Power Consumption

Parameter Symbol Test Condition Min Typ Max Unit

Digital Core Supply Current

Normal Mode1,2,3,4—Full speed

with code executing from flash,

peripheral clocks ON

IBAT FAHB = 49 MHz,

FAPB = 24.5 MHz

— 17.5 18.9 mA

FAHB = 20 MHz,

FAPB = 10 MHz

— 6.7 7.2 mA

FAHB = 2.5 MHz,

FAPB = 1.25 MHz

— 1.15 1.4 mA

Normal Mode1,2,3,4—Full speed

with code executing from flash,

peripheral clocks OFF

IBAT FAHB = 49 MHz,

FAPB = 24.5 MHz

— 13.3 14.5 mA

FAHB = 20 MHz,

FAPB = 10 MHz

— 5.4 5.9 mA

FAHB = 2.5 MHz,

FAPB = 1.25 MHz

— 980 1.2 μA

Normal Mode1,2,3,4—Full speed

with code executing from flash,

LDOs powered by dc-dc at 1.9 V,

peripheral clocks OFF

IBAT FAHB = 49 MHz,

FAPB = 24.5 MHz

VBAT = 3.3 V

— 9.7 — mA

FAHB = 49 MHz,

FAPB = 24.5 MHz

VBAT = 3.8 V

— 8.65 — mA

FAHB = 20 MHz,

FAPB = 10 MHz

VBAT = 3.3 V

— 4.15 — mA

FAHB = 20 MHz,

FAPB = 10 MHz

VBAT = 3.8 V

— 3.9 — mA

Notes:

1. Currents are additive. For example, where IBAT is specified and the mode is not mutually exclusive, enabling the

functions increases supply current by the specified amount.

2. Includes all peripherals that cannot have clocks gated in the Clock Control module.

3. Includes LDO and PLL0OSC (>20 MHz) or LPOSC0 (<20 MHz) supply current.

4. Internal Digital and Memory LDOs scaled to optimal output voltage.

5. Flash AHB clock turned off.

6. Running from internal LFO, Includes LFO supply current.

7. LCD0 current does not include switching currents for external load.

8. IDAC output current not included.

9. Does not include LC tank circuit.

10. Does not include digital drive current or pullup current for active port I/O. Unloaded IVIO is included in all IBAT PM8

production test measurements.

SiM3L1xx

10 Rev 1.1

Power Mode 11,2,3,4—Full speed

with code executing from RAM,

peripheral clocks ON

IBAT FAHB = 49 MHz,

FAPB = 24.5 MHz

— 13.4 16.6 mA

FAHB = 20 MHz,

FAPB = 10 MHz

— 4.7 — mA

FAHB = 2.5 MHz,

FAPB = 1.25 MHz

— 810 — μA

Power Mode 11,2,3,4—Full speed

with code executing from RAM,

peripheral clocks OFF

IBAT FAHB = 49 MHz,

FAPB = 24.5 MHz

— 9.4 12.5 mA

FAHB = 20 MHz,

FAPB = 10 MHz

— 3.3 — mA

FAHB = 2.5 MHz,

FAPB = 1.25 MHz

— 630 — μA

Power Mode 11,2,3,4—Full speed

with code executing from RAM,

LDOs powered by dc-dc at 1.9 V,

peripheral clocks OFF

IBAT FAHB = 49 MHz,

FAPB = 24.5 MHz

VBAT = 3.3 V

— 7.05 — mA

FAHB = 49 MHz,

FAPB = 24.5 MHz

VBAT = 3.8 V

— 6.3 — mA

FAHB = 20 MHz,

FAPB = 10 MHz

VBAT = 3.3 V

— 2.75 — mA

FAHB = 20 MHz,

FAPB = 10 MHz

VBAT = 3.8 V

— 2.6 — mA

Power Mode 21,2,3,4,5—Core halted

with peripheral clocks ON

IBAT FAHB = 49 MHz,

FAPB = 24.5 MHz

— 7.6 11.3 mA

FAHB = 20 MHz,

FAPB = 10 MHz

— 2.75 — mA

FAHB = 2.5 MHz,

FAPB = 1.25 MHz

— 575 — μA

Table 3.2. Power Consumption (Continued)

Parameter Symbol Test Condition Min Typ Max Unit

Notes:

1. Currents are additive. For example, where IBAT is specified and the mode is not mutually exclusive, enabling the

functions increases supply current by the specified amount.

2. Includes all peripherals that cannot have clocks gated in the Clock Control module.

3. Includes LDO and PLL0OSC (>20 MHz) or LPOSC0 (<20 MHz) supply current.

4. Internal Digital and Memory LDOs scaled to optimal output voltage.

5. Flash AHB clock turned off.

6. Running from internal LFO, Includes LFO supply current.

7. LCD0 current does not include switching currents for external load.

8. IDAC output current not included.

9. Does not include LC tank circuit.

10. Does not include digital drive current or pullup current for active port I/O. Unloaded IVIO is included in all IBAT PM8

production test measurements.

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