Intel Core 2 Duo Processor Manuel utilisateur

Document Number: 320249-001

Intel®CoreTM 2 Duo Processor

and Intel®GM45 Express Chipset

(with DDR3 System Memory)

Development Kit User’s Manual

September 2008

2 Development Kit User’s Manual

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR

IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT

AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY

WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL

PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY,

OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended

for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.

Intel may make changes to specifications and product descriptions at any time, without notice.

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property rights.

Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel

reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from

future changes to them.

Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor

family, not across different processor families. See http://www.intel.com/products/processor_number for details.

The Intel®CoreTM 2 Duo processor and Intel®GM45 Express Chipset may contain design defects or errors known as errata which

may cause the product to deviate from published specifications. Current characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

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Leap ahead. logo, Intel NetBurst, Intel NetMerge, Intel NetStructure, Intel SingleDriver, Intel SpeedStep, Intel StrataFlash, Intel

Viiv, Intel vPro, Intel XScale, IPLink, Itanium, Itanium Inside, MCS, MMX, Oplus, OverDrive, PDCharm, Pentium, Pentium Inside,

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Corporation or its subsidiaries in the United States and other countries.

*Other names and brands may be claimed as the property of others.

Development Kit User’s Manual 3

Contents

1Introduction .....................................................................................................8

1.1 Content Overview...................................................................................8

1.2 Text Conventions ...................................................................................9

1.3 Glossary of Terms and Acronyms............................................................10

1.4 Development Kit Technical Support.........................................................14

1.4.1 Online Support........................................................................14

1.4.2 Additional Technical Support .....................................................14

1.5 Related Documents...............................................................................15

1.5.1 Ordering Hard Copies of Documents...........................................15

2Getting Started...............................................................................................17

2.1 Overview ............................................................................................17

2.2 Development Kit Contents .....................................................................17

2.3 Additional Required Hardware (Not Included in the Development Kit)...........18

2.4 Additional Required Software (Not included in the Development Kit) ............19

2.5 Workspace Preparation..........................................................................19

2.6 System Setup and Power-Up..................................................................20

2.6.1 Using the AC to DC Power Supply (Mobile Power Mode) ................21

2.7 Power Down ........................................................................................22

2.8 System BIOS .......................................................................................22

2.8.1 Configuring the BIOS ...............................................................22

2.8.2 Programming BIOS Using a Bootable USB Device.........................23

3Development Board Features ............................................................................25

3.1 Block Diagram .....................................................................................25

3.2 Mechanical Form Factor.........................................................................25

3.3 Development Board Key Features ...........................................................26

3.4 Software Key Features ..........................................................................29

3.4.1 AMI BIOS ...............................................................................29

3.5 Thermal Management ...........................................................................30

3.6 System Features and Operation..............................................................30

3.6.1 Processor Support ...................................................................30

3.6.2 Processor Voltage Regulators ....................................................30

3.6.3 Front-Side Bus (FSB) ...............................................................30

3.6.4 Processor Power Management ...................................................30

3.6.5 Processor Active Cooling...........................................................31

3.6.6 Manual Processor Voltage ID (VID) Support ................................31

3.6.7 Chipset ..................................................................................31

3.6.8 System Memory ......................................................................31

3.6.9 Video Display..........................................................................32

3.6.10 PCIe Slots ..............................................................................32

3.6.11 PCI Slots................................................................................33

3.6.12 On-Board LAN.........................................................................33

3.6.13 Serial Peripheral Interface (SPI) ................................................33

3.6.14 Soft Audio/Soft Modem ............................................................34

4 Development Kit User’s Manual

3.6.15 SATA Storage .........................................................................34

3.6.16 USB Connectors ......................................................................35

3.6.17 LPC Super I/O (SIO)/LPC Slot ...................................................36

3.6.18 Serial, IrDA ............................................................................36

3.6.19 Intel® 82802 Firmware Hub Device Support ...............................36

3.6.20 System Management Controller (SMC)/Keyboard Controller (KBC)..36

3.6.21 Clocks ...................................................................................37

3.6.22 Real Time Clock ......................................................................37

3.6.23 Thermal Monitoring .................................................................37

3.6.24 Power Supply Solution .............................................................38

3.6.25 Manual VID support for Graphics VR...........................................38

3.6.26 Debug Interfaces.....................................................................39

3.6.27 Board Form-Factor ..................................................................39

3.7 Power Management ..............................................................................39

3.7.1 Power Management States........................................................39

3.8 Testability ...........................................................................................40

3.9 Power Measurement Support..................................................................40

3.10 Power Supply Usage and Recommendation ..............................................45

4Development Board Physical Reference ..............................................................46

4.1 Board Components ...............................................................................46

4.2 Connectors..........................................................................................48

4.2.1 Back Panel Connectors .............................................................48

4.3 Configuration Settings...........................................................................50

4.3.1 Configuration Jumpers/Switches ................................................50

4.3.2 BSEL Jumper Settings ..............................................................52

4.4 Power and Reset Push Buttons ...............................................................53

4.5 Net Detect Button ................................................................................54

4.6 LEDs ..................................................................................................55

4.7 Other Headers .....................................................................................56

4.7.1 H8 Programming Headers.........................................................56

4.7.2 Sideband and Test Headers.......................................................57

Appendix A Add-In Cards..................................................................................................58

A.1 Port 80-83 Add-in Card (Included) ..........................................................58

A.2 PCI Expansion Card (Thimble Peak 2) (Included) ......................................59

A.3 HDMI and Display Port Video Interface Add-In Card (Eaglemont) (Included) .59

A.3.1 Rework to Change Eaglemont Card from HDMI to Display Port .......60

A.3.2 AUX Pull Down Rework.............................................................62

A.4 Intel® High Definition Audio Interposer Card (Mott Canyon 4) (Not Included)63

A.4.1 Mott Canyon 4 Jumper Settings .................................................64

A.5 ExpressCard Module Interposer (Duck Bay 3) (Not Included) ......................66

A.6 PCI Express Mini Card Interposer (Upham IV) (Not Included)......................67

A.7 Docking Connector Card (Saddlestring II) (Not Included) ...........................69

Appendix B Rework Instructions ........................................................................................71

B.1 Internal HDMI Enabling .........................................................................71

B.2 Enabling the Integrated Trusted Platform Module (iTPM) ............................71

B.3 Enabling External HDMI.........................................................................72

B.4 Support for Upham 4 ............................................................................72

B.5 Low Voltage High-Definition (HD) Audio Rework .......................................72

Development Kit User’s Manual 5

Appendix C Programming System BIOS Using a Flash Programming Device .............................74

Appendix D CPU Thermal Solution (Heatsink) Installation ......................................................75

Figures

Figure 1. Development Board Block Diagram.......................................................25

Figure 2. Silver Cascade Development Board Components ....................................46

Figure 3. Back Panel Connectors .......................................................................48

Figure 4. D-Connector to Component Video Cable................................................49

Figure 5. D-Connector to Composite Video Cable .................................................49

Figure 6. D-Connector to S-Video Cable .............................................................49

Figure 7. Location of the Configuration Jumpers/Switches .....................................50

Figure 8. Power On and Reset Buttons ...............................................................54

Figure 9. Net Detect Button ..............................................................................54

Figure 10. Port 80-83 Interposer Card................................................................58

Figure 11. PCI Expansion Card (Thimble Peak 2) .................................................59

Figure 12. Eaglemont Add-in Card .....................................................................60

Figure 13. Location of Resistors for Rework (before Rework) .................................61

Figure 14. Location of Resistors for Rework (after Rework)....................................61

Figure 15. Location of Resistors for Rework.........................................................62

Figure 16. AUX Pull-Down Rework .....................................................................63

Figure 17. Mott Canyon 4 Interposer Card ..........................................................64

Figure 18. Duck Bay 3 Interposer Card...............................................................66

Figure 19. Upham IV Interposer Card.................................................................67

Figure 20. Saddlestring II Docking Connector......................................................69

Figure 21. iHDMI Rework Instruction 1...............................................................71

Figure 22. iHDMI Rework Instruction 2...............................................................71

Figure 23. Low Voltage HD Audio Rework (Always Rail) ........................................72

Figure 24. Low Voltage HD Audio Rework (Sus Rail).............................................73

Figure 25. Step 2 - Heatsink and Backplate.........................................................75

Figure 26. Step 4 - Backplate Pins .....................................................................76

Figure 27. Step 6 - Applying the Thermal Grease.................................................77

Figure 28. Step 7 - Squeezing Activation Arm .....................................................78

Figure 29. Step 8 - Installing the Heatsink..........................................................79

Figure 30. Step 9 - Plugging in the Fan ..............................................................80

Figure 31. Step 10 - Completed Assembly ..........................................................81

6 Development Kit User’s Manual

Tables

Table 1. Text Conventions ..................................................................................9

Table 2. Definitions of Terms ............................................................................10

Table 3. Acronyms ..........................................................................................11

Table 4. Related Documents .............................................................................15

Table 5. Intel Literature Centers........................................................................15

Table 6. Development Board Feature Set Summary .............................................26

Table 7. TV–Out Connections ............................................................................32

Table 8. PCI Express Ports................................................................................33

Table 9. Selection of I/O Voltage for the High Definition Audio...............................34

Table 10. SATA Ports.......................................................................................34

Table 11. USB Ports mapping............................................................................35

Table 12. System Power Management States ......................................................39

Table 13. System Power Management M-States...................................................40

Table 14. Digital Multi-Meter Comparison ...........................................................41

Table 15. System Voltage Rails .........................................................................41

Table 16. Silver Cascade Development Board Components.................................... 47

Table 17. Description of Back Panel Connectors ...................................................48

Table 18. Configuration Jumpers and Switches Settings........................................51

Table 19. BSEL Jumper Settings........................................................................53

Table 20. Power-On and Reset Push buttons .......................................................53

Table 21. LEDs ...............................................................................................55

Table 22. H8 Programming Jumpers ..................................................................57

Table 23. Jumper J1 Configurations ...................................................................58

Table 24. Mott Canyon 4 Configuration Jumper/Switches Settings ..........................65

Table 25. Upham IV Default Jumper/Switches Settings ......................................... 68

Table 26. Board Rework to Support Display Port on Saddlestring ...........................70

Development Kit User’s Manual 7

Revision History

Document

Number Revision

Number Description Revision Date

320249 001 Public launch release September 2008

Note: The differences between the Pillar Rock (DDR2) and Silver Cascade (DDR3) User

Guides are in the DDR2 vs. DDR3 memory controller interface, the Configuration

Jumpers and Switches Settings Table and the Development Board Components Table.

All other components and references are the same between boards.

Introduction

8 Development Kit User’s Manual

1Introduction

This user’s manual describes the use of the Intel®CoreTM 2 Duo Processor and Intel®

GM45 Express Chipset development kit with DDR3 SDRAM system memory. This

manual has been written for OEMs, system evaluators, and embedded system

developers. This document defines all jumpers, headers, LED functions, and their

locations on the development board, along with features of the board’s subsystems.

This manual assumes basic familiarity with installing and configuring hardware and

software in a personal computer system.

There are two development board options available as a part of this kit. The first

option uses DDR2 SDRAM memory. The DDR2 development board is referred to as

Pillar Rock. The second option uses DDR3 SDRAM memory. The DDR3 development

board is referred to as Silver Cascade. All other components and subsystems on the

boards are the same unless explicitly noted. This manual will cover the features and

details of the Silver Cascade development board.

For the latest information about the Intel®CoreTM 2 Duo processor and Intel®GM45

Express Chipset Development Kit, visit:

http://developer.intel.com/design/intarch/devkits/index.htm

For design documents related to the Intel®CoreTM 2 Duo processor and Intel®GM45

Express Chipset please visit:

Processor: http://developer.intel.com/design/intarch/core2duo/tech_docs.htm

Chipset: http://www.intel.com/products/embedded/chipsets.htm

1.1 Content Overview

Chapter 1.0, “About This Manual” — This chapter contains a description of conventions

used in this manual. The last few sections explain how to obtain literature and contact

customer support.

Chapter 2.0, “Getting Started” — This chapter describes the contents of the

development kit. This chapter explains the basics steps necessary to get the board

running. This chapter also includes information on how to update the BIOS.

Chapter 3.0, “Development Board Features” — This chapter provides details on the

hardware features of the development board. It explains the Power Management and

Testability features.

Chapter 4.0, “Development Board Physical Reference” — This chapter provides a list of

major board components and connectors. It gives a descript ion of jumper settings

and functions. The chapter also explains the use of the programming headers.

Appendix A, “Add-In Cards” – This appendix contains information on add-in cards

available from Intel that can be used with the development board.

Introduction

Development Kit User’s Manual 9

Appendix B, “Rework Instructions” – This appendix contains rework instructions for

the development board and for some of the add-in cards to enable additional

supported features and functionality.

Appendix C, “Programming system BIOS using a flash programming device — This

appendix provides step by step instructions on programming the flash using a flash

programming device

Appendix D, “CPU Thermal Solution (Heatsink) Installation Instructions” — This

appendix gives detailed installation instructions for the Intel®CoreTM 2 Duo processor

heatsink.

1.2 Text Conventions

The notations listed in Table 1 may be used throughout this manual.

Table 1. Text Conventions

Notation Definition

# The pound symbol (#) appended to a signal name indicates that the signal

is active low. (e.g., PRSNT1#)

Variables Variables are shown in italics. Variables must be replaced with correct

values.

Instructions Instruction mnemonics are shown in uppercase. When you are

programming, instructions are not case-sensitive. You may use either

uppercase or lowercase.

Numbers Hexadecimal numbers are represented by a string of hexadecimal digits

followed by the character H. A zero prefix is added to numbers that begin

with A through F. (For example, FF is shown as 0FFH.) Decimal and binary

numbers are represented by their customary notations. (That is, 255 is a

decimal number and 1111 is a binary number. In some cases, the letter B

is added for clarity.)

Units of Measure

GByte

KByte

KΩ

MByte

MHz

µA

µF

µs

µW

The following abbreviations are used to represent units of measure:

amps, amperes

gigabytes

kilobytes

kilo-ohms

milliamps, milliamperes

megabytes

megahertz

milliseconds

milliwatts

nanoseconds

picofarads

watts

volts

microamps, microamperes

microfarads

microseconds

microwatts

Introduction

10 Development Kit User’s Manual

Notation Definition

Signal Names Signal names are shown in uppercase. When several signals share a

common name, an individual signal is represented by the signal name

followed by a number, while the group is represented by the signal name

followed by a variable (n). For example, the lower chip-select signals are

named CS0#, CS1#, CS2#, and so on; they are collectively called CSn#.

A pound symbol (#) appended to a signal name identifies an active-low

signal. Port pins are represented by the port abbreviation, a period, and

the pin number (e.g., P1.0).

1.3 Glossary of Terms and Acronyms

Table 2 defines terms used in this document.

Table 2. Definitions of Terms

Term/Acronym Definition

Assisted Gunning

Transceiver Logic+

The front-side bus uses a bus technology called AGTL+, or Assisted

Gunning Transceiver Logic. AGTL+ buffers are open-drain, and require

pull-up resistors to provide the high logic level and termination. AGTL+

output buffers differ from GTL+ buffers with the addition of an active

pMOS pull-up transistor to assist the pull-up resistors during the first clock

of a low-to-high voltage transition.

Asynchronous

GTL+

The processor does not utilize CMOS voltage levels on any signals that

connect to the processor. As a result, legacy input signals such as A20M#,

IGNNE#, INIT#, LINT0/INTR, LINT1/NMI, PWRGOOD, SMI#, SLP#, and

STPCLK# utilize GTL+ input buffers. Legacy output signals (FERR# and

IERR#) and non-AGTL+ signals (THERMTRIP# and PROCHOT#) also

utilize GTL+ output buffers. All of these signals follow the same DC

requirements as AGTL+ signals, however the outputs are not actively

driven high (during a logical 0 to 1 transition) by the processor (the major

difference between GTL+ and AGTL+). These signals do not have setup or

hold time specifications in relation to BCLK[1:0], and are therefore

referred to as “Asynchronous GTL+ Signals”. However, all of the

Asynchronous GTL+ signals are required to be asserted for at least two

BCLKs in order for the processor to recognize them.

Infrared Data

Assoc.

The Infrared Data Association (IrDA) has outlined a specification for serial

communication between two devices via a bi-directional infrared data

port. The development board has such a port and it is located on the rear

of the board between the two USB connectors.

IMVP6+ The Intel Mobile Voltage Positioning specification for the Intel® Core™ 2

Duo Processor. It is a DC-DC converter module that supplies the required

voltage and current to a single processor.

Media Expansion

Card

The Media Expansion Card (MEC) provides digital display options through

the SDVO interface. The MEC card also incorporates video-in via a x1 PCI

Express* port.

Pad The electrical contact point of a semiconductor die to the package

substrate. A pad is only observable in simulations.

Pillar Rock The name of the development board in this development kit that uses

DDR2 SDRAM

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