Intel 6300ESB ICH Manuel utilisateur

Reference Number: 300281-003

Intel®Xeon™ Processor with 800

MHz System Bus, Intel®E7520

Chipset, and Intel®6300ESB ICH

Development Kit

User’s Manual

September 2004

2Intel®Xeon™ Processor, Intel®E7520 Chipset, Intel®6300ESB ICH Development Kit User’s Manual

Contents

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Intel®Xeon™ Processor, Intel®E7520 Chipset, Intel®6300ESB ICH Development Kit User’s Manual 3

Contents

1 Product Overview ............................................................................................................................7

1.1 Related Documents..............................................................................................................7

1.2 Product Contents..................................................................................................................7

1.3 Products Feature List............................................................................................................8

1.4 Block Diagram ......................................................................................................................9

1.4.1 Memory Subsystem...............................................................................................11

1.4.2 DIMM Placement DDR2 400..................................................................................11

1.5 Memory Population Rules and Configurations ...................................................................12

2 Platform Management...................................................................................................................13

2.1 Power Button......................................................................................................................13

2.2 Soft Off................................................................................................................................13

2.3 Sleep States Supported......................................................................................................13

2.3.1 S0 State.................................................................................................................13

2.3.2 S1 State.................................................................................................................14

2.3.3 S2 State.................................................................................................................14

2.3.4 S3 State.................................................................................................................14

2.3.5 S4 State.................................................................................................................14

2.3.6 S5 State.................................................................................................................15

2.3.7 Wake-Up Events....................................................................................................15

2.3.8 Wake-Up from S1 Sleep State...............................................................................15

2.3.9 Wake-Up from S4 and S5 States...........................................................................15

2.4 PCI PM Support..................................................................................................................15

2.5 Platform Management ........................................................................................................15

2.5.1 Processor Thermal Management...........................................................................16

2.6 System Fan Operation........................................................................................................16

3 Equipment Required for CRB Usage.............................................................................................17

3.1 Precautions.........................................................................................................................17

3.2 Driver and OS Requirements..............................................................................................18

3.2.1 Drivers included on CD..........................................................................................18

4 Jumpers and Headers...................................................................................................................21

4.1 Jumpers..............................................................................................................................21

5 System Overview...........................................................................................................................25

5.1 Power Diagrams.................................................................................................................25

5.2 Platform Clocking................................................................................................................26

5.3 Platform Resets ..................................................................................................................27

5.4 SMBus ................................................................................................................................28

5.5 Platform IRQ Routing..........................................................................................................29

5.6 VRD VID Headers...............................................................................................................30

5.7 Miscellaneous Buttons........................................................................................................32

6 Debug Procedure ..........................................................................................................................33

6.1 Level 1 Debug (Port 80/BIOS)............................................................................................33

6.2 Level 2 Debug (Power Sequence)......................................................................................34

4Intel®Xeon™ Processor, Intel®E7520 Chipset, Intel®6300ESB ICH Development Kit User’s Manual

Contents

6.3 Level 3 Debug (Voltage References)..................................................................................34

7 Heatsink Assembly........................................................................................................................35

7.1 Processor Heat Sink Installation Instructions .....................................................................36

Intel®Xeon™ Processor, Intel®E7520 Chipset, Intel®6300ESB ICH Development Kit User’s Manual 5

Contents

Figures

1Intel

®Xeon™ Processor with 800 MHz System Bus and Intel®E7520 and Intel®

6300ESB Customer Reference Board Block Diagram .................................................................9

2 Placement - Top View.................................................................................................................10

3 DDR2 400 Memory - DIMM Ordering.........................................................................................12

4Intel

®Xeon™ Processor with 800 MHz System Bus and Intel®E7520 and Intel®

6300ESB Customer Reference Board Jumper...........................................................................21

5 Power Distribution Block Diagram..............................................................................................25

6 Clock Block Diagram ..................................................................................................................26

7 Platform Reset Diagram .............................................................................................................27

8 SMBus Block Diagram................................................................................................................28

9 IRQ Routing Diagram .................................................................................................................29

10 Power Buttons ............................................................................................................................32

11 Components Requiring Heat Sink Assembly..............................................................................35

12 Inserting Processor in Socket.....................................................................................................36

13 Cleaning the Processor Surface.................................................................................................36

14 Installing the Processor Backplate..............................................................................................37

15 Removing the Protective Covers................................................................................................37

16 Installing the Heatsink.................................................................................................................38

Tables

1 Related Documents......................................................................................................................7

2 Supported DIMM Module Types.................................................................................................11

3 DIMM Placement DDR2 400 ......................................................................................................11

4 Jumper Settings..........................................................................................................................22

5 Processor VRD Settings.............................................................................................................30

6 Level 1 Debug (Port 80/BIOS)....................................................................................................33

7 Level 2 Debug (Power Sequence)..............................................................................................34

8 Level 3 Debug (Voltage References)..........................................................................................34

9 Components Requiring Heat Sink Assembly..............................................................................35

6Intel®Xeon™ Processor, Intel®E7520 Chipset, Intel®6300ESB ICH Development Kit User’s Manual

Contents

Revision History

Date Revision Description

August 2004 003 Changed figures that referenced PCI-X to PCI-X 133 MHz;

changed jumpers on Figure 4; made other miscellaneous

changes.

July 2004 002 Changed code names to public names; clarified illustrations.

December 2003 001 Initial release of this document.

Intel®Xeon™ Processor, Intel®E7520 Chipset, Intel®6300ESB ICH Development Kit User’s Manual 7

Product Overview

Product Overview 1

The Intel®Xeon™ Processor with 800 MHz System Bus, Intel®E7520 Chipset, and Intel®

6300ESB ICH Development Kit comprise an IA-32 based dual-processor platform. This platform

serves as a reference for OEMs development platform. This and other development kits from Intel

provide a fully working product with range of performance options which can be modified or used

immediately for product development.

1.1 Related Documents

Visit http://www.intel.com/platforms/applied/eiacomm/reference_configs.htm for latest updates.

1.2 Product Contents

The Reference Board is shipped with the following components and features:

•Two Intel®Xeon™ processors (2.8 GHz and 3.2 GHz) capable of 800 MT/s

•One 550 W SSI EPS12V power supply

•Two Heat sinks for the two processors

•Two pieces of DDR2 400 [256 Mbytes]

•Blank Hard drive

•CD with necessary drivers

— Red Hat 8.0 Compatible Driver Package Contents

— Red-Hat Advanced Server 2.1 Compatible Driver Package Contents

— Windows* Compatible Driver Package Contents

— ATI Rage* Mobility-M Graphics Accelerator

Table 1. Related Documents

Document/Reference Title Source/Document Number

Intel®E7520 Memory Controller Hub (MCH) Datasheet

Contact your Intel Sales

Representative for access

Intel®E7520 Memory Controller Hub (MCH) Specification Update

Intel®Xeon™ Processor with 800 MHz System Bus Datasheet

Intel 6300ESB I/O Controller Datasheet

Intel®Xeon™ Processor Debug Port Design Guide

Extended Debug Port Design Guide: for UP and DP platforms

Schematics file

8Intel®Xeon™ Processor, Intel®E7520 Chipset, Intel®6300ESB ICH Development Kit User’s Manual

Product Overview

1.3 Products Feature List

•Processor Support

—DualIntel

®Xeon™ Processors

— On-board processor voltage regulators compatible with VRM/EVRD 10.1 Design Guide

•Clocking

— CK409B clock synthesizer that generates all host clock and the PCI Express* interface

clock for the MCH PHY Layer

— DB800 generates the PCI Express differential pair clocks to the onboard PCI Express

components and the dedicated PCI Express slots

•Memory Support

— Registered, ECC, DDR2 400

— Each of the two memory channels on the Intel®E7520 in this CRB supports a maximum

of two DDR2 400 DIMMs per channel

— The maximum supported DDR2 400 memory configuration is 8 Gbyte using different

combinations of single and dual ranked, x4, 1 Gbyte technology DIMMs (limit of up to

four ranks per channel)

— 3.2 Gbytes/s bus per channel bandwidth with DDR2 400

•I/O slot support

— One PCI-X 133 MHz slot from PXH

— Two PCI-X 100 MHz slots from PXH

— One PCI Express x8 slot

— One PCI Express x4 slot

— One 5 V PCI-32/33 slot connected through the Intel®6300ESB I/O Controller

— Two 3.3 V PCI-X 64/66 slots connected through the Intel®6300ESB I/O Controller

•Low Pin Count Bus

— National* LPC 47M172 Super I/O residing on LPC bus

— LPC card header for debug purposes only

— Firmware hub

•IDE ATA 100 support

— Two ATA-100 IDE connectors supported

•S-ATA support

— Two S-ATA connectors

•USB Support (Four Channels)

— Two USB 2.0 connectors

— Two USB 2.0 headers

•Back Panel I/O

Intel®Xeon™ Processor, Intel®E7520 Chipset, Intel®6300ESB ICH Development Kit User’s Manual 9

Product Overview

— Two RS-232 serial ports from the Intel®6300ESB I/O Controller

— Two PS/2 connectors for mouse and keyboard

— On-board VGA Video, ATI Rage Mobility* video controller

— Parallel port

•Dual Watchdog Timer

•Miscellaneous

— National LM93* for fan control and temperature/voltage monitoring

Refer to Figure 1 for complete detailed features of the Intel®Xeon™ Processor with 800 MHz

system bus and Intel®E7520 and Intel®6300ESB Customer Reference Board (CRB).

1.4 Block Diagram

Figure 1. Intel®Xeon™ Processor with 800 MHz System Bus and Intel®E7520 and Intel®

6300ESB Customer Reference Board Block Diagram

Intel

Xeon

Intel

Xeon

ITP

Intel

E7520

MCH

PXH

PCI

X 100MHz

PCI

DDR 266

PCI-E x8PCI-E x4

PCI

DDR2 400

Intel®

6300ESB

ICH

CK409B

PCI

X 66MHz

HI 1.5

PCI

PCI 33MHz

PCI

IDE

S-ATA

ATA

IDE

USB 2.0

UART 1

UART 2

FWH

LPC Debug

SIO

Floppy

UART 3

Parallel

PS2

LM 93

VGA

DB800

DDR2 400

USB 2.0

PCI

133 MHz

10 Intel®Xeon™ Processor, Intel®E7520 Chipset, Intel®6300ESB ICH Development Kit User’s Manual

Product Overview

Figure 2. Placement - Top View

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6300ESB

I/O

Controller

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