Freescale Semiconductor MCF5329 Manuel utilisateur

MCF5329 Reference Manual

Devices Supported:

MCF5327

MCF5328

MCF53281

MCF5329

Document Number: MCF5329RM

Rev. 3

12/2008

How to Reach Us:

Home Page:

www.freescale.com

E-mail:

suppor[email protected]

USA/Europe or Locations Not Listed:

Freescale Semiconductor

Technical Information Center, CH370

1300 N. Alma School Road

Chandler, Arizona 85224

+1-800-521-6274 or +1-480-768-2130

suppor[email protected]

Europe, Middle East, and Africa:

Freescale Halbleiter Deutschland GmbH

Technical Information Center

Schatzbogen 7

81829 Muenchen, Germany

+44 1296 380 456 (English)

+46 8 52200080 (English)

+49 89 92103 559 (German)

+33 1 69 35 48 48 (French)

suppor[email protected]

Japan:

Freescale Semiconductor Japan Ltd.

Headquarters

ARCO Tower 15F

1-8-1, Shimo-Meguro, Meguro-ku,

Tokyo 153-0064, Japan

0120 191014 or +81 3 5437 9125

suppor[email protected]

Asia/Pacific:

Freescale Semiconductor Hong Kong Ltd.

Technical Information Center

2 Dai King Street

Tai Po Industrial Estate

Tai Po, N.T., Hong Kong

+800 26668334

suppor[email protected]

For Literature Requests Only:

Freescale Semiconductor Literature Distribution Center

P.O. Box 5405

Denver, Colorado 80217

1-800-441-2447 or 303-675-2140

Fax: 303-675-2150

LDCForFreescaleSemiconductor@hibbertgroup.com

Information in this document is provided solely to enable system and

software implementers to use Freescale Semiconductor products. There are

no express or implied copyright licenses granted hereunder to design or

fabricate any integrated circuits or integrated circuits based on the

information in this document.

Freescale Semiconductor reserves the right to make changes without further

notice to any products herein. Freescale Semiconductormakes no warranty,

representation or guarantee regarding the suitability of its products for any

particular purpose, nor does Freescale Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation consequential or

incidental damages. “Typical” parameters that may be provided in Freescale

Semiconductordata sheets and/or specifications can and do vary in different

applications and actual performance may vary over time. All operating

parameters, including “Typicals”, must be validated for each customer

application by customer’s technical experts. Freescale Semiconductor does

not convey any license under its patent rights nor the rights of others.

FreescaleSemiconductorproductsarenotdesigned,intended,orauthorized

for use as components insystems intended for surgical implant intothe body,

or other applications intended to support or sustain life, or for any other

application in which the failure of the Freescale Semiconductor product could

create a situation where personal injury or death may occur. Should Buyer

purchase or use Freescale Semiconductor products for any such unintended

or unauthorized application, Buyer shall indemnify and hold Freescale

Semiconductor and its officers, employees, subsidiaries, affiliates, and

distributorsharmless against all claims, costs, damages, and expenses, and

reasonable attorney fees arising out of, directly or indirectly, any claim of

personal injury or death associated with such unintended or unauthorized

use, evenif such claim alleges that Freescale Semiconductor was negligent

regarding the design or manufacture of the part.

Freescale™ and the Freescale logo are trademarks of Freescale

Semiconductor, Inc. All other product or service names are the property

of their respective owners.© Freescale Semiconductor, Inc. 2008. All rights

reserved.

MCF5329RM

Rev. 3

12/2008

Overview

Signal Descriptions

ColdFire Core

Enhanced Multiply-Accumulate Unit (EMAC)

Cache

Static RAM (SRAM)

Clock Module

Power Management

Chip Configuration Module (CCM)

Reset Controller Module

System Control Module (SCM)

Crossbar Switch (XBS)

General Purpose I/O Module

Interrupt Controller Modules

Edge Port Module (EPORT)

Enhanced Direct Memory Access (eDMA)

FlexBus

SDRAM Controller (SDRAMC)

Fast Ethernet Controller (FEC)

Universal Serial Bus Interface – Host Module

Universal Serial Bus Interface – On-The-Go Module

Liquid Crystal Display Controller (LCDC)

FlexCAN

Synchronous Serial Interface (SSI)

Real-Time Clock

Pulse-Width Modulation (PWM) Module

Watchdog Timer Module

Programmable Interrupt Timers (PIT0–PIT3)

DMA Timers (DTIM0–DTIM3)

UART Modules

I2C Interface

Message Digest Hardware Accelerator (MDHA)

Random Number Generator (RNG)

Queued Serial Peripheral Interface (QSPI)

Symmetric Key Hardware Accelerator (SKHA)

IEEE 1149.1 Test Access Port (JTAG)

Revision History

Debug Module

Revision History

Overview

Signal Descriptions

ColdFire Core

Enhanced Multiply-Accumulate Unit (EMAC)

Cache

Static RAM (SRAM)

Clock Module

Power Management

Chip Configuration Module (CCM)

Reset Controller Module

System Control Module (SCM)

Crossbar Switch (XBS)

General Purpose I/O Module

Interrupt Controller Modules

Edge Port Module (EPORT)

Enhanced Direct Memory Access (eDMA)

FlexBus

SDRAM Controller (SDRAMC)

Fast Ethernet Controller (FEC)

Universal Serial Bus Interface – Host Module

Universal Serial Bus Interface – On-The-Go Module

Liquid Crystal Display Controller (LCDC)

FlexCAN

Synchronous Serial Interface (SSI)

Real-Time Clock

Pulse-Width Modulation (PWM) Module

Watchdog Timer Module

Programmable Interrupt Timers (PIT0–PIT3)

DMA Timers (DTIM0–DTIM3)

UART Modules

I2C Interface

Message Digest Hardware Accelerator (MDHA)

Random Number Generator (RNG)

Queued Serial Peripheral Interface (QSPI)

Symmetric Key Hardware Accelerator (SKHA)

IEEE 1149.1 Test Access Port (JTAG)

Debug Module

Freescale Semiconductor v

Contents

Paragraph

Number Title Page

Number

About This Book

Audience ....................................................................................................................... xxix

Organization .................................................................................................................. xxix

Suggested Reading ....................................................................................................... xxxii

Hardware Specification ....................................................................................... xxxii

General Information ............................................................................................ xxxiii

ColdFire Documentation .................................................................................... xxxiii

Conventions ................................................................................................................ xxxiii

Acronyms and Abbreviations .......................................................................................xxxv

Terminology Conventions ........................................................................................... xxxvi

Chapter 1

Overview

1.1 MCF532xDevice Configurations.................................................................................................. 1-1

1.2 Block Diagram ............................................................................................................................... 1-2

1.3 Features .......................................................................................................................................... 1-3

1.3.1 V3 Core Overview...........................................................................................................1-8

1.3.2 Debug Module ................................................................................................................. 1-9

1.3.3 JTAG................................................................................................................................ 1-9

1.3.4 On-chip Memories...........................................................................................................1-9

1.3.5 LCD Controller.............................................................................................................. 1-10

1.3.6 Voice-over-IP (VoIP) System Solution......................................................................... 1-10

1.3.7 SDR/DDR SDRAM Controller ..................................................................................... 1-11

1.3.8 USB Host and OTG Controllers.................................................................................... 1-11

1.3.9 Synchronous Serial Interface (SSI)................................................................................ 1-12

1.3.10 Fast Ethernet Controller (FEC)...................................................................................... 1-12

1.3.11 Cryptography Accelerators............................................................................................ 1-12

1.3.12 FlexCAN........................................................................................................................ 1-13

1.3.13 UARTs........................................................................................................................... 1-13

1.3.14 I2C Bus...........................................................................................................................1-13

1.3.15 QSPI............................................................................................................................... 1-13

1.3.16 Pulse Width Modulation (PWM) Timer........................................................................ 1-13

1.3.17 Real Time Clock............................................................................................................ 1-13

1.3.18 DMA Timers (DTIM0-DTIM3) .................................................................................... 1-13

1.3.19 Software Watchdog Timer............................................................................................. 1-14

MCF5329 Reference Manual, Rev 3

vi Freescale Semiconductor

Contents

Paragraph

Number Title Page

Number

1.3.20 Periodic Interrupt Timers (PIT0–PIT3)......................................................................... 1-14

1.3.21 Clock Module and Phase Locked Loop (PLL).............................................................. 1-14

1.3.22 Interrupt Controllers ...................................................................................................... 1-14

1.3.23 DMA Controller............................................................................................................. 1-14

1.3.24 FlexBus External Interface ............................................................................................ 1-15

1.3.25 Reset Controller Module................................................................................................ 1-15

1.3.26 GPIO.............................................................................................................................. 1-15

1.4 Documentation............................................................................................................................. 1-16

Chapter 2

Signal Descriptions

2.1 Introduction.................................................................................................................................... 2-1

2.2 Signal Properties Summary............................................................................................................ 2-1

2.2.1 Internal Pull-up/Pull-downs Resistors ............................................................................. 2-8

2.3 Signal Primary Functions............................................................................................................... 2-9

2.3.1 Reset Signals.................................................................................................................... 2-9

2.3.2 PLL and Clock Signals .................................................................................................... 2-9

2.3.3 Mode Selection .............................................................................................................. 2-10

2.3.4 FlexBus Signals ............................................................................................................. 2-11

2.3.5 SDRAM Controller Signals........................................................................................... 2-12

2.3.6 External Interrupt Signals.............................................................................................. 2-12

2.3.7 DMA Signals ................................................................................................................. 2-12

2.3.8 LCD Controller Signals ................................................................................................. 2-13

2.3.9 Ethernet Module (FEC) Signals..................................................................................... 2-13

2.3.10 I2C I/O Signals .............................................................................................................. 2-14

2.3.11 FlexCAN Signals...........................................................................................................2-15

2.3.12 Queued Serial Peripheral Interface (QSPI).................................................................... 2-15

2.3.13 Synchronous Serial Interface (SSI) Signals................................................................... 2-15

2.3.14 Universal Serial Bus (USB) Signals.............................................................................. 2-16

2.3.15 Pulse Width Modulation (PWM) Module Signals......................................................... 2-16

2.3.16 UART Module Signals .................................................................................................. 2-17

2.3.17 DMA Timer Signals....................................................................................................... 2-17

2.3.18 Debug Support Signals .................................................................................................. 2-17

2.3.19 Test Signals.................................................................................................................... 2-19

2.3.20 Power and Ground Pins ................................................................................................. 2-19

2.4 External Boot Mode..................................................................................................................... 2-20

MCF5329 Reference Manual, Rev 3

Freescale Semiconductor vii

Contents

Paragraph

Number Title Page

Number

Chapter 3

ColdFire Core

3.1 Introduction.................................................................................................................................... 3-1

3.1.1 Overview.......................................................................................................................... 3-1

3.2 Memory Map/Register Description................................................................................................ 3-4

3.2.1 Data Registers (D0–D7)................................................................................................... 3-6

3.2.2 Address Registers (A0–A6)............................................................................................. 3-6

3.2.3 Supervisor/User Stack Pointers (A7 and OTHER_A7)................................................... 3-6

3.2.4 Condition Code Register (CCR)...................................................................................... 3-7

3.2.5 Program Counter (PC) ..................................................................................................... 3-8

3.2.6 Cache Control Register (CACR) ..................................................................................... 3-8

3.2.7 Access Control Registers (ACRn)................................................................................... 3-9

3.2.8 Vector Base Register (VBR)............................................................................................3-9

3.2.9 Status Register (SR)......................................................................................................... 3-9

3.2.10 Memory Base Address Register (RAMBAR) ............................................................... 3-10

3.3 Functional Description................................................................................................................. 3-10

3.3.1 Version 3 ColdFire Microarchitecture........................................................................... 3-10

3.3.2 Instruction Set Architecture (ISA_A+).......................................................................... 3-11

3.3.3 Exception Processing Overview.................................................................................... 3-12

3.3.4 Processor Exceptions..................................................................................................... 3-15

3.3.5 Instruction Execution Timing........................................................................................ 3-23

Chapter 4

Enhanced Multiply-Accumulate Unit (EMAC)

4.1 Introduction.................................................................................................................................... 4-1

4.1.1 Overview.......................................................................................................................... 4-1

4.2 Memory Map/Register Definition.................................................................................................. 4-3

4.2.1 MAC Status Register (MACSR)...................................................................................... 4-3

4.2.2 Mask Register (MASK)................................................................................................... 4-5

4.2.3 Accumulator Registers (ACC0–3)................................................................................... 4-6

4.2.4 Accumulator Extension Registers (ACCext01, ACCext23)............................................ 4-7

4.3 Functional Description................................................................................................................... 4-8

4.3.1 Fractional Operation Mode............................................................................................ 4-10

4.3.2 EMAC Instruction Set Summary................................................................................... 4-12

4.3.3 EMAC Instruction Execution Times ............................................................................. 4-13

4.3.4 Data Representation....................................................................................................... 4-14

4.3.5 MAC Opcodes ............................................................................................................... 4-14

MCF5329 Reference Manual, Rev 3

viii Freescale Semiconductor

Contents

Paragraph

Number Title Page

Number

Chapter 5

Cache

5.1 Introduction.................................................................................................................................... 5-1

5.1.1 Overview.......................................................................................................................... 5-1

5.2 Memory Map/Register Definition.................................................................................................. 5-2

5.2.1 Cache Control Register (CACR) ..................................................................................... 5-2

5.2.2 Access Control Registers (ACR0–ACR1)....................................................................... 5-4

5.3 Functional Description................................................................................................................... 5-5

5.3.1 Cache Organization.......................................................................................................... 5-5

5.3.2 Cache Operation .............................................................................................................. 5-7

5.3.3 Caching Modes ..............................................................................................................5-10

5.3.4 Cache-Inhibited Accesses.............................................................................................. 5-11

5.3.5 Cache Protocol............................................................................................................... 5-11

5.3.6 Cache Coherency........................................................................................................... 5-13

5.3.7 Memory Accesses for Cache Maintenance.................................................................... 5-13

5.3.8 Cache Locking............................................................................................................... 5-15

5.3.9 Cache Management........................................................................................................ 5-16

5.3.10 Cache Operation Summary............................................................................................ 5-17

Chapter 6

Static RAM (SRAM)

6.1 Introduction.................................................................................................................................... 6-1

6.1.1 Overview.......................................................................................................................... 6-1

6.1.2 Features............................................................................................................................ 6-1

6.2 Memory Map/Register Description................................................................................................ 6-2

6.2.1 SRAM Base Address Register (RAMBAR).................................................................... 6-2

6.3 Initialization/Application Information ........................................................................................... 6-4

6.3.1 SRAM Initialization Code ............................................................................................... 6-4

6.3.2 Power Management ......................................................................................................... 6-5

Chapter 7

Clock Module

7.1 Introduction.................................................................................................................................... 7-1

7.1.1 Block Diagram................................................................................................................. 7-3

7.1.2 Features............................................................................................................................ 7-3

7.1.3 Modes of Operation .........................................................................................................7-3

7.2 Memory Map/Register Definition.................................................................................................. 7-5

MCF5329 Reference Manual, Rev 3

Freescale Semiconductor ix

Contents

Paragraph

Number Title Page

Number

7.2.1 PLL Output Divider Register (PODR) ............................................................................ 7-6

7.2.2 PLL Control Register (PCR)............................................................................................7-6

7.2.3 PLL Modulation Divider Register (PMDR).................................................................... 7-7

7.2.4 PLL Feedback Divider Register (PFDR)......................................................................... 7-8

7.3 Functional Description................................................................................................................... 7-8

7.3.1 PLL Dithered and Non-Dithered Operation .................................................................... 7-8

7.3.2 Dithering Waveform Definition....................................................................................... 7-9

7.3.3 PLL Frequency Multiplication Factor Select................................................................. 7-10

7.3.4 System Clock Modes ..................................................................................................... 7-11

7.3.5 Clock Operation During Reset....................................................................................... 7-11

Chapter 8

Power Management

8.1 Introduction.................................................................................................................................... 8-1

8.1.1 Features............................................................................................................................ 8-1

8.2 Memory Map/Register Definition.................................................................................................. 8-1

8.2.1 Wake-up Control Register ............................................................................................... 8-2

8.2.2 Peripheral Power Management Set Registers (PPMSR0 & PPMSR1) ........................... 8-3

8.2.3 Peripheral Power Management Clear Registers (PPMCR0 & PPMCR1)....................... 8-4

8.2.4 Peripheral Power Management Registers (PPMHR0, PPMHR1, & PPMLR0)..............8-4

8.2.5 Low-Power Control Register (LPCR) ............................................................................. 8-7

8.3 Functional Description................................................................................................................... 8-8

8.3.1 Peripheral Shut Down...................................................................................................... 8-8

8.3.2 Limp mode....................................................................................................................... 8-8

8.3.3 Low-Power Modes........................................................................................................... 8-9

8.3.4 Peripheral Behavior in Low-Power Modes ................................................................... 8-10

8.3.5 Summary of Peripheral State During Low-power Modes ............................................. 8-15

Chapter 9

Chip Configuration Module (CCM)

9.1 Introduction.................................................................................................................................... 9-1

9.1.1 Block Diagram................................................................................................................. 9-1

9.1.2 Features............................................................................................................................ 9-1

9.1.3 Modes of Operation .........................................................................................................9-1

9.2 External Signal Descriptions.......................................................................................................... 9-2

9.2.1 RCON .............................................................................................................................. 9-2

9.2.2 D[9:86:1] (Reset Configuration Override) ...................................................................... 9-2

9.3 Memory Map/Register Definition.................................................................................................. 9-2

MCF5329 Reference Manual, Rev 3

xFreescale Semiconductor

Contents

Paragraph

Number Title Page

Number

9.3.1 Chip Configuration Register (CCR) ................................................................................ 9-3

9.3.2 Reset Configuration Register (RCON)............................................................................ 9-4

9.3.3 Chip Identification Register (CIR) .................................................................................. 9-4

9.3.4 Miscellaneous Control Register (MISCCR).................................................................... 9-5

9.3.5 Clock Divider Register .................................................................................................... 9-6

9.3.6 USB Host Controller Status Register (UHCSR).............................................................. 9-7

9.3.7 USB On-the-Go Controller Status Register (UOCSR).................................................... 9-7

9.4 Functional Description................................................................................................................... 9-9

9.4.1 Reset Configuration......................................................................................................... 9-9

9.4.2 PLL Mode Selection...................................................................................................... 9-11

9.4.3 Oscillator Mode Selection ............................................................................................. 9-11

9.4.4 Boot Device Selection ................................................................................................... 9-11

9.4.5 Output Pad Strength Configuration ............................................................................... 9-11

9.4.6 Chip Select Configuration ............................................................................................. 9-12

Chapter 10

Reset Controller Module

10.1 Introduction.................................................................................................................................. 10-1

10.1.1 Block Diagram............................................................................................................... 10-1

10.1.2 Features.......................................................................................................................... 10-1

10.2 External Signal Description ......................................................................................................... 10-2

10.2.1 RESET ........................................................................................................................... 10-2

10.2.2 RSTOUT........................................................................................................................ 10-2

10.3 Memory Map/Register Definition................................................................................................ 10-2

10.3.1 Reset Control Register (RCR) ....................................................................................... 10-2

10.3.2 Reset Status Register (RSR) .......................................................................................... 10-3

10.4 Functional Description................................................................................................................. 10-4

10.4.1 Reset Sources................................................................................................................. 10-4

10.4.2 Reset Control Flow........................................................................................................ 10-5

10.4.3 Concurrent Resets.......................................................................................................... 10-7

Chapter 11

System Control Module (SCM)

11.1 Introduction.................................................................................................................................. 11-1

11.1.1 Overview........................................................................................................................ 11-1

11.1.2 Features.......................................................................................................................... 11-1

11.2 Memory Map/Register Definition................................................................................................ 11-2

11.2.1 Master Privilege Register 0 (MPR0) ............................................................................. 11-3

MCF5329 Reference Manual, Rev 3

Table des matières

Autres manuels Freescale Semiconductor Matériel informatique

Freescale Semiconductor

Freescale Semiconductor MPC5604P Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor metrowerks CodeWarrior Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor DSP56374 Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor MPC8260 PowerQUICC II Family Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor TWR-K64F120M Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor FRDM-KL25Z Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor 56F827 Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor MSC8144ADS Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor MPC8349E PowerQUICC II Pro Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor TWR-S12GN32 Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor EVB9S12NE64 Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor MC68HC908MR16 Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor i.MX27 PDK 1.0 Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor MED-EKG Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor Windows Embedded CE 6.0/Windows CE 5.0 i.MX31 PDK... Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor TWR-S12G64 Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor Target Interface MMDS0508 Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor PowerQUICC III Instructions d'installation et d'utilisation

Freescale Semiconductor

Freescale Semiconductor MPC8349E PowerQUICC II Pro Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor MCF52277 Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor MPC8309 Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor TWR-MPC8309 Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor M68HC08 series Manuel utilisateur

Freescale Semiconductor

Freescale Semiconductor FRDM-KE06 Manuel utilisateur

Manuels Matériel informatique populaires d'autres marques

EMC2

EMC2 VNX Series Manuel du propriétaire

Panasonic

Panasonic DV0PM20105 Manuel utilisateur

Mitsubishi Electric

Mitsubishi Electric Q81BD-J61BT11 Manuel utilisateur

Gigabyte

Gigabyte B660M DS3H AX DDR4 Manuel utilisateur

Raidon

Raidon iT2300 Manuel utilisateur

National Instruments

National Instruments PXI-8186 Manuel utilisateur

Hauppauge

Hauppauge WinTV-HVR-2250 Manuel utilisateur

Kontron

Kontron CP6002 Manuel utilisateur

Manhattan

Manhattan 702843 Manuel utilisateur

Aphex

Aphex 230 Manuel utilisateur

AMD

AMD Phenom II Manuel d'exploitation

Intel

Intel NUC 12 Pro Manuel utilisateur

dbx

dbx Zone Pro 1260 Manuel utilisateur

Galaxy

Galaxy GHDX2-2430S-24F4D Manuel utilisateur

Intel

Intel AXXRMFBU4 Manuel utilisateur

Kontron

Kontron DIMM-PC/MD Manuel utilisateur

ST X-NUCLEO-SAFEA1B Mode d'emploi

STEINWAY LYNGDORF

STEINWAY LYNGDORF SP-1 Manuel utilisateur