ADLINK Technology NuDAQ PCI-9111DG Manuel utilisateur
Manual Revision: 2.6
Revision Date: March 16, 2022
Part No: 50M-00069-1000
NuDAQ®PCI-9111DG/HR
Multifunction
Data Acquisition Card
User’s Manual
ii
Revision History
Revision Release Date Description of Change(s)
2.50 April 4, 2003 Updated release
2.6 March 16, 2022 Product update release
Preface iii
PCI-9111
Preface
Copyright © 2022 ADLINK Technology, Inc.
This document contains proprietary information protected by copy-
right. All rights are reserved. No part of this manual may be repro-
duced by any mechanical, electronic, or other means in any form
without prior written permission of the manufacturer.
Disclaimer
The information in this document is subject to change without prior
notice in order to improve reliability, design, and function and does
not represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, spe-
cial, incidental, or consequential damages arising out of the use or
inability to use the product or documentation, even if advised of
the possibility of such damages.
Environmental Responsibility
ADLINK is committed to fulfill its social responsibility to global
environmental preservation through compliance with the Euro-
pean Union's Restriction of Hazardous Substances (RoHS) direc-
tive and Waste Electrical and Electronic Equipment (WEEE)
directive. Environmental Protection is a top priority for ADLINK.
We have enforced measures to ensure that our products, manu-
facturing processes, components, and raw materials have as little
impact on the environment as possible. When products are at their
end of life, our customers are encouraged to dispose of them in
accordance with the product disposal and/or recovery programs
prescribed by their nation or company.
Trademarks
Product names mentioned herein are used for identification pur-
poses only and may be trademarks and/or registered trademarks
of their respective companies.
iv Preface
Conventions
Take note of the following conventions used throughout this
manual to make sure that users perform certain tasks and
instructions properly.
NOTE:
NOTE:
Additional information, aids, and tips that help users perform
tasks.
CAUTION:
Information to prevent minor physical injury, component dam-
age, data loss, and/or program corruption when trying to com-
plete a task.
WARNING:
Information to prevent serious physical injury, component
damage, data loss, and/or program corruption when trying to
complete a specific task.
v
PCI-9111
Table of Contents
Revision History...................................................................... ii
Preface.................................................................................... iii
1 Introduction ........................................................................ 1
1.1 Features............................................................................... 1
1.2 Applications ......................................................................... 2
1.3 Specifications....................................................................... 3
1.4 Software Support ................................................................. 5
2 Getting Started ................................................................. 11
2.1 Package Contents ............................................................. 12
2.2 Device Layout and I/O Connectors.................................... 13
2.3 Jumper Settings................................................................. 14
2.4 Connector Pin Assignments .............................................. 15
2.5 Hardware Installation Outline............................................. 18
2.6 Device Installation for Windows Systems .......................... 20
2.7 Daughter Board Connection .............................................. 21
3 Operation Theory ............................................................. 25
3.1 A/D Conversion.................................................................. 26
3.2 Extended Digital I/O Port ................................................... 38
3.3 D/A Conversion.................................................................. 39
3.4 Digital Input and Output ..................................................... 41
3.5 Timer/Counter Operation ................................................... 42
Important Safety Instructions.............................................. 43
Getting Service...................................................................... 47
vi
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Introduction 1
PCI-9111
1 Introduction
The PCI-9111 is an advanced data acquisition card based on the
32-bit PCI bus architecture. High performance designs and state-
of-the-art technology make this card ideal for data logging and sig-
nal analysis applications in areas like medicine and process con-
trol.
1.1 Features
The PCI-9111 PCI bus advanced data acquisition card provides
the following advanced features:
X32-bit PCI bus
X12-bit analog input resolution for PCI-9111DG
16-bit analog input resolution for PCI-9111HR
XAuto-scanning channel selection up to 256 channels
XUp to 100KHz A/D sampling rates
X16 single-ended analog input channels
XBipolar input signals
XProgrammable gain of x1, x2, x4, x8, x16
Input Range: ±10V, ±5V, ±2.5V, ±1.25V, ±0.625V
XOn-chip sample & hold
XOne 12-bit monolithic multiplying analog output channel
X16 digital output and 16 digital input channels
X4 extended digital input and digital output channels on the
37-pin connector
X3 independent programmable 16-bit down counters
XThree A/D trigger modes: software trigger, programmable
pacer trigger, and external pulse trigger
XPre-trigger & Post-trigger Control
XIntegral DC-to-DC converter for stable analog power source
X37-pin D-type connector
XCompact size: half-size PCB
2 Introduction
1.2 Applications
XIndustrial and laboratory ON/OFF control
XEnergy management
XCommunication
X16 TTL/DTL compatible digital input channels
XSecurity controller
XProduct testing
XEvent and frequency counting
XWaveform and pulse generation
XBCD interface driver
Introduction 3
PCI-9111
1.3 Specifications
Analog Input (A/D)
Converter B.B. ADS7805 / ADS7804 or equivalent,
successive approximation type
Resolution 12-bit/16-bit
Input Channels 16 Single-ended
Analog Signal Input Range
(Programmable) Bipolar: ±10V, ± 5V, ±2.5V, ±1.25V, ±0.625V
Conversion Time 8 μsec
Over-voltage Protection Continuous ±35V max.
Accuracy
Gain Range Accuracy (mv)
1 ±10v 1±0.3051
2 ±5v 0.5±0.1525
4 ±2.5v 0.5±0.0763
8 ±1.25v 0.25±0.0381
16 ±0.625v 0.25±0.019
Input Impedance 10 MΩ
Trigger Modes Software, Timer Pacer, and External trigger
Data Transfer Pooling, FIFO half-full Interrupt
Data Throughput 110KHz (maximum)
FIFO Depth 1024 samples
Analog Output (D/A)
Output Channels 1
Resolution 12-bit
Output Range
(jumper selectable)
Unipolar: 0-10V
Bipolar: -10V to +10V
Converter DAC7541 or equivalent, monolithic multiplying
Settling Time 30 μsec
Linearity ±1/2-bit LSB
Output Driving Capability ±5mA max.
4 Introduction
Digital I/O (DIO)
Channels 16 TTL compatible inputs and outputs
Input Voltage Low: Min. 0V, Max. 0.8V
High: Min. +2.0V, Max. 5.5V
Input Load Low: +0.8V at -0.2mA max.
High: +2.7V at +20mA max.
Output Voltage Low: Min. 0V, Max. 0.4V
High: Min. +2.4V, Max. 5.5V
Driving Capacity Low: Max. +0.5V at 8.0mA (Sink)
High: Min. +2.7V at 0.4mA (Source)
Extended Digital I/O (EDIO)
Channels 4 inputs and outputs
Input Voltage Low: +0.8V @ -10μA max.
High: +3.5V @ +10μA max.
Input Load Low: Min: –0.5V; Max. 0.8V
High: Min: +1.7V; Max. 5.75V
Output Driving Capability Low: Max. +0.4V @ 8.0mA (Sink)
High: Min. 2.4V @ 4.0mA (Source)
Programmable Counter
A/D pacer timer 32-bit timer (two 16-bit counters cascaded
together) with a 2MHz time base
Pacer Frequency Range 0.00046 Hz to 100K Hz
Pre-trigger Counter One 16-bit counter for AD Conversion Pulse
General
Connector 37-pin D-type connector
Operating Temperature 0°C to 60°C
Storage Temperature -20°C to 80°C
Humidity 5% to 90% relative humidity, non-condensing
Power Requirement +5 V @ 570 mA typical
Dimensions 105mm (H) X 175mm (L)
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