ADLINK Technology CPCI-9116 Manuel utilisateur

cPCI-9116®/cPCI-9116R®

64 Ch, 16 bit, 250KS/s

Analog input Card

For 3U CompactPCI

User’s Guide

Recycled Paper

Manual Rev. 1.02: JUL 23, 2002

Part No: 50-15002-100

The information in this document is subject to change without prior notice in

order to improve reliability, design and function and does not represent a

commitment on the part of the manufacturer.

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or consequential damages arising out of the use or inability to use the product

or documentation, even if advised of the possibility of such damages.

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Table of Contents•i

Table of Contents

Tables .....................................................................................iii

Figures .....................................................................................iv

How to Use This Guide .............................................................v

Chapter 1 Introduction..............................................................1

1.1 Features .............................................................................1

1.2 Applications ........................................................................2

1.3 Specifications......................................................................3

1.4 Software Support ................................................................5

1.4.1 Programming Library....................................................................5

1.4.2 PCIS-LVIEW: LabVIEW®Driver.................................................6

1.4.3 DAQBenchTM: ActiveX Controls..................................................6

Chapter 2 Installation................................................................7

2.1 What You Have...................................................................7

2.2 Unpacking ..........................................................................8

2.3 cPCI-9116 and cPCI-9116R Layout ......................................9

2.4 PCI Configuration.............................................................. 11

Chapter 3 Signal Connections...............................................12

3.1 Connectors and Pin Assignment ........................................ 12

3.2 Analog Input Signal Connection ......................................... 15

3.2.1 Types of signal sources .............................................................15

3.2.2 Input Configurations....................................................................15

3.3 Digital I/O Connection........................................................ 17

Chapter 4 Registers.................................................................18

4.1 I/O Port Address ............................................................... 18

4.2 Internal Timer/Counter Register ......................................... 20

4.3 General Purpose Timer/Counter Register ........................... 21

4.4 General Purpose Timer/Counter Control Register................ 22

4.5 A/D Data Registers............................................................ 23

ii •Table of Contents

4.6 Channel Gain Queue Register ........................................... 24

4.7 A/D & FIFO Control Register.............................................. 25

4.8 A/D & FIFO Status Register ............................................... 27

4.9 Digital I/O register ............................................................. 28

4.10 A/D Trigger Mode Register ................................................ 29

4.11 Interrupt Control Register................................................... 31

4.12 Interrupt Status Register.................................................... 33

Chapter 5 Operation Theory...................................................34

5.1 A/D Conversion................................................................. 34

5.1.1 A/D Conversion Procedure........................................................34

5.1.2 Software conversion with polling data transfer acquisition

mode (Software Polling).............................................................35

5.1.2.1 Specifying Channels, Gains, and input

configurations in the Channel Gain Queue..........36

5.1.3 Programmable scan acquisition mode....................................36

5.1.3.1 Scan Timing and Procedure...................................36

5.1.3.2 Specifying Channels, Gains, and input

configurations in the Channel Gain Queue..........38

5.1.3.3 Trigger Modes...........................................................39

5.1.4 A/D Data Transfer Modes..........................................................47

5.2 Digital Input and Output ..................................................... 48

5.3 General Purpose Timer/Counter Operation ......................... 49

Chapter 6 Software Utility & Calibration...............................51

6.1 Running 9116util.exe program ........................................... 51

6.2 Calibration........................................................................ 52

6.2.1 What do you need.......................................................................52

6.2.2 VR Assignment............................................................................53

6.2.3 A/D Adjustment............................................................................53

6.2.3.1 PGA offset Calibration.............................................54

6.2.3.2 Bipolar input Calibration..........................................54

6.2.3.3 Unipolar input Calibration........................................54

6.3 Functional Testing............................................................. 54

Warranty Policy........................................................................56

Tables •iii

Tables

Table 1. Legend of J1 Connector ......................................... 14

Table 2. I/O Port Address.................................................... 19

Table 3. Timer/Counter Register Address............................. 20

Table 4. General Purpose Timer/Counter Register................ 21

Table 5. General Purpose Timer/Counter Control Register .... 22

Table 6.GPTC0’s Mode selection........................................ 23

Table 7. A/D Data Registers ................................................ 23

Table 8. Channel Gain Queue Register................................ 24

Table 9. Gain Selection Bits ................................................ 24

Table 10. A/D & FIFO Control Register .................................. 25

Table 11. A/D & FIFO Status Register.................................... 27

Table 12. Digital I/O register (Read)....................................... 28

Table 13. Digital I/O register (Write) ....................................... 29

Table 14. A/D Trigger Mode Register..................................... 29

Table 15. Trigger Mode Selection Bits.................................... 30

Table 16. Interrupt Control Register ....................................... 31

Table 17. Interrupt Status Register ........................................ 33

Table 18. Functions of VRs ................................................... 53

iv •Figures

Figures

Figure 1: PCB Layout of the cPCI-9116...................................9

Figure 2: PCB Layout of cPCI-9116R and Rear I/O adaptor.... 10

Figure 3: J1 Pin Assignments ............................................... 13

Figure 4: Single-ended Mode and Floating sources................ 15

Figure 5: Ground-referenced source and differential input....... 16

Figure 6: Floating source and differential input ....................... 16

Figure 7: Ground-referenced source and User Common Mode

connections........................................................... 17

Figure 8: Digital I/O Connection ............................................ 17

Figure 9: Scan Timing .......................................................... 37

Figure 10: Pre-trigger (trigger occurs after M scans)................. 40

Figure 11: Pre-trigger (trigger with scan is in progress)............. 40

Figure 12: Pre-trigger with M_enable = 0................................. 41

Figure 13: Pre-trigger with M_enable = 1................................. 42

Figure 14: Middle trigger with M_enable = 1............................ 43

Figure 15: Middle trigger (trigger with scan is in progress)........ 44

Figure 16: Post trigger............................................................ 44

Figure 17: Delay trigger.......................................................... 45

Figure 18: Post trigger with re-trigger ...................................... 46

Figure 19: General-purpose Timer/Counter model ................... 49

Figure 20: Mode 0 Operation.................................................. 50

Figure 21: Mode 1 Operation.................................................. 50

Figure 22: CPCI-9116 Utility Main Screen ............................... 52

Figure 23: A/D Adjustment menu Screen................................. 53

Figure 24: cPCI-9116 Function Testing Screen........................ 55

How to Use This Guide•v

How to Use This Guide

This manual is designed to help you use the 9116 series. The manual

describes how to modify various settings on the card to meet your

requirements. It is divided into seven chapters:

Chapter1, “Introduction”, gives an overview of the product features,

applications, and specifications.

Chapter 2, “Installation”, describes how to install the 9116 series.

The layout of 9116 series is shown.

Chapter 3, “Signal Connection”, describes the connectors' pin

assignment and how to connect external signal and devices

to the9116 series card.

Chapter 4, “Registers”, describes the details of the registers and its

structure. This information is important for programmers who

want to control the hardware with low-level programming.

Chapter 5, “Operation theory”, describes the working theory of the

9116 series card. The A/D, DIO and timer/counter

functions are introduced. Also, some programming concepts

are specified.

Chapter 6, “Software Utility & Calibration”, describes how to run the

utility program included in the software CD and how to

calibrate the9116 series card for accurate measurements.

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