Toradex Apalis Series Mode d’emploi

Apalis Computer Module

Carrier Board Design Guide

Apalis Carrier Board Design Guide

Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l info@toradex.com

Page | 2

Issued by:

Toradex

Document Type:

Carrier Board Design Guide

Purpose:

This document is a guideline for developing a carrier board that conforms to the specifications

for the Apalis®Computer Module

Document

Version:

1.7

Revision History

Date

Version

Remarks

8 April 2013

V1.0

Initial Release: Preliminary Version

27 August 2013

V1.1

Correction in section 4.3

26 November 2013

V1.2

Correction in Figure 23

Correction in Table 10, Table 11, Table 12, and Table 13: signals

USBH_OC# and USBH_EN pin numbers

Correction in Table 16: Description of the pins 282-302

13 April 2015

V1.3

Remove layout guide section (available in a separate document), add

descriptions of low-speed interfaces, minor corrections

Correction of mSATA schematics (Figure 15)

9 June 2016

V1.4

Section 3.5: add information about current consumption budget

16 June 2016

V1.5

Section 2.1.1: update information about preferred interfaces

Section 2.12: add recommendation using MMC1 instead of SD1 as

preferred interface

Section 0: add suitable spacer

Add information about CSI, DSI, and recovery mode

29 June 2016

V1.6

Section 2.5.2.1: Add information about incompatible USB 3.0 OTG

cables

09 October 2018

V1.7

Add missing WAKE1_MICO# pull up resistors in examples

Section 2.4: Add recommendation for TVS diodes in PoE designs

Section 2.4.2: Update recommendation for center tap voltage

Section 2.8.2.2: Correct locations of pull resistors in description

Section 2.13: Clarify 1.8V bus voltage of SD cards

Section 2.13: Add recommendation for SD card power switching

Section 2.19: Clarify and correct Audio AGND recommendations

Section 2.23.2: Update recommendation for unused touch signals

Section 3.2: Correct of POWER_ENABLE_MOCI pull down resistor

Section 3.5: Clarify POWER_ENABLE_MOCI pull down resistor

Section 4.1: Add information regarding alternate module connectors

Section 4.3: Clarify operating temperature range

 
 
Apalis Carrier Board Design Guide 
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1Introduction ....................................................................................................................... 6 
1 Overview............................................................................................................................. 6 
2 Additional Documents .......................................................................................................... 6 
2.1Layout Design Guide.................................................................................................6 
2.2 Apalis Module Datasheets .........................................................................................6 
2.3 Apalis Module Definition ............................................................................................6 
2.4 Toradex Developer Centre.........................................................................................6 
2.5 Apalis Evaluation Board Schematics...........................................................................7 
2.6 Pinout Designer ........................................................................................................7 
3 Abbreviations....................................................................................................................... 7 
2Interfaces......................................................................................................................... 10 
1 Architecture....................................................................................................................... 10 
1.1 Standard Interfaces.................................................................................................11 
1.2 Type-specific Interfaces...........................................................................................12 
1.3 Pin Numbering ........................................................................................................12 
2 PCI Express ...................................................................................................................... 13 
2.1 PCIe Signals...........................................................................................................13 
2.2 Reference Schematics.............................................................................................14 
2.3 Unused PCIe Signals Termination............................................................................19 
3 SATA................................................................................................................................ 19 
3.1 SATA Signals..........................................................................................................19 
3.2 Reference Schematics.............................................................................................19 
3.3 Unused SATA Signals Termination...........................................................................22 
4 Ethernet............................................................................................................................ 22 
4.1 Ethernet Signals......................................................................................................22 
4.2 Reference Schematics.............................................................................................22 
4.3 Unused Ethernet Signals Termination.......................................................................25 
5 USB.................................................................................................................................. 25 
5.1 USB Signals ...........................................................................................................25 
5.2 Reference Schematics.............................................................................................27 
5.3 Unused USB Signal Termination ..............................................................................32 
6 Parallel RGB LCD Interface................................................................................................ 33 
6.1 Parallel RGB LCD Signals .......................................................................................33 
6.2 Color Mapping.........................................................................................................34 
6.3 Reference Schematics.............................................................................................35 
6.4 Unused Parallel RGB Interface Signal Termination....................................................37 
7 LVDS LCD Interface........................................................................................................... 38 
7.1 LVDS Signals..........................................................................................................38 
7.2 Compatibility between LVDS Configurations..............................................................38 
7.3 Reference Schematics.............................................................................................41 
7.4 Unused LVDS Interface Signal Termination ..............................................................41 
8 HDMI/DVI.......................................................................................................................... 41 
8.1 HDMI/DVI Signals ...................................................................................................42 
8.2 Reference Schematics.............................................................................................42 
8.3 Unused HDMI/DVI Signal Termination......................................................................44 
9 Analogue VGA................................................................................................................... 44 
9.1 VGA Signals ...........................................................................................................44 
9.2 Reference Schematics.............................................................................................45 
9.3 Unused VGA Interface Signal Termination ................................................................45 
10 Display Serial Interface (MIPI/DSI)...................................................................................... 45 
11 Parallel Camera Interface................................................................................................... 46 
11.1 Parallel Camera Signals .......................................................................................46 
11.2 Unused Parallel Camera Interface Signal Termination............................................46 
12 Camera Serial Interface (MIPI/CSI-2).................................................................................. 46 
13 SD/MMC/SDIO .................................................................................................................. 46 
13.1 SD/MMC/SDIO Signals ........................................................................................47 

 
 
Apalis Carrier Board Design Guide 
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13.2 Reference Schematics .........................................................................................48 
13.3 Unused SD/MMC/SDIO Interface Signal Termination .............................................49 
14 I2C.................................................................................................................................... 49 
14.1 I2C Signals ..........................................................................................................49 
14.2 Real-Team Clock (RTC) recommendation .............................................................49 
14.3 Unused I2C Signal Termination .............................................................................50 
15 UART................................................................................................................................ 50 
15.1 UART Signals......................................................................................................50 
15.2 Reference Schematics .........................................................................................51 
15.3 Unused UART Signal Termination.........................................................................53 
16 SPI ................................................................................................................................... 53 
16.1 SPI Signals..........................................................................................................54 
16.2 Unused SPI Signal Termination ............................................................................54 
17 CAN.................................................................................................................................. 54 
17.1 CAN Signals........................................................................................................54 
17.2 Reference Schematics .........................................................................................54 
17.3 Unused CAN Interface Signal Termination.............................................................55 
18 PWM................................................................................................................................. 55 
18.1 PWM Signals.......................................................................................................55 
18.2 Reference Schematics .........................................................................................55 
18.3 Unused PWM Signal Termination..........................................................................56 
19 Analogue Audio ................................................................................................................. 56 
19.1 Analogue Audio Signals .......................................................................................56 
19.2 Reference Schematics .........................................................................................56 
19.3 Unused Analogue Audio Signal Termination ..........................................................57 
20 Digital Audio...................................................................................................................... 57 
20.1 Digital Audio Signals ............................................................................................57 
20.2 Reference Schematics .........................................................................................57 
20.3 Unused Digital Audio Interface Signal Termination .................................................58 
21 S/PDIF (Sony-Philips Digital Interface I/O)........................................................................... 58 
21.1 S/PDIF Signals ....................................................................................................58 
21.2 Reference Schematics .........................................................................................58 
21.3 Unused S/PDIF Interface Signal Termination.........................................................59 
22 Touch Panel Interface ........................................................................................................ 59 
22.1 Resistive Touch Signals .......................................................................................59 
22.2 Reference Schematics .........................................................................................59 
22.3 Unused Touch Panel Interface Signal Termination .................................................60 
23 Analogue Inputs................................................................................................................. 60 
23.1 Analogue Input Signals.........................................................................................60 
23.2 Unused Analogue Inputs Signal Termination..........................................................60 
24 Clock Output ..................................................................................................................... 60 
24.1 Clock Output Signals............................................................................................60 
24.2 Schematic and Layout Considerations...................................................................60 
24.3 Unused Clock Output Signal Termination ..............................................................61 
25 GPIO ................................................................................................................................ 61 
25.1 GPIO Signals.......................................................................................................61 
25.2 Unused GPIO Termination....................................................................................61 
26 Module Recovery............................................................................................................... 62 
3Power Management........................................................................................................... 63 
1 Power Signals ................................................................................................................... 63 
1.1 Digital Supply Signals..............................................................................................63 
1.2 Analogue Supply Signals .........................................................................................63 
1.3 Power Management Signals ....................................................................................63 
2 Power Block Diagram......................................................................................................... 64 
3 Power States..................................................................................................................... 64 
4 Power Sequences.............................................................................................................. 66 

Apalis Carrier Board Design Guide

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3.5 Reference Schematics ....................................................................................................... 69

4Mechanical and Thermal Consideration............................................................................... 71

4.1 Module Connector.............................................................................................................. 71

4.2 Fixation of the Module........................................................................................................ 71

4.3 Thermal Solution................................................................................................................ 73

4.4 Module Size ...................................................................................................................... 74

4.5 Connector and MXM SnapLock Land Pattern Requirements................................................. 75

4.6 Carrier Board Space Requirements..................................................................................... 76

5Appendix A –Physical Pin Definition and Location............................................................... 79

Apalis Carrier Board Design Guide

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1 Introduction

1.1 Overview

This document is designed to guide users through the development of a customized carrier board

for the Apalis Computer module. It describes the different interfaces and contains reference

schematics. This document reflects only the standardized primary function of the Apalis modules.

The type-specific interfaces and secondary functions are not guaranteed to be compatible between

different Apalis modules. These interfaces are described in the datasheet of each computer

module. Some Apalis modules do not feature the full set of standard interfaces. Therefore, it is

strongly recommended to read the datasheets of the modules that are intended to be used with

the carrier board.

The Apalis Computer module features new high-speed interfaces such as PCI Express, SATA, HDMI

and LVDS which require special layout considerations regarding trace impedance and length

matching. Please read carefully the Toradex Layout Design Guide for additional information to the

routing of these interfaces.

1.2 Additional Documents

1.2.1 Layout Design Guide

This document contains layout requirement specifications for the high-speed signals and helps to

avoid problems related with the layout.

http://developer.toradex.com/hardware-resources/arm-family/carrier-board-design

1.2.2 Apalis Module Datasheets

For every Apalis Module, there is a datasheet available. Among other things, this document

describes the type-specific interfaces and the secondary function of the pins. Before starting the

development of a customized carrier board, please check in this document whether the required

interfaces are really available on the selected modules.

https://www.toradex.com/products/apalis-arm-computer-modules

1.2.3 Apalis Module Definition

This document describes the Apalis Module standard. It provides additional information about the

interfaces.

http://docs.toradex.com/100240-apalis-module-specification.pdf

1.2.4 Toradex Developer Centre

You can find a lot of additional information in the Toradex Developer Centre, which is updated

with the latest product support information on a regular basis.

Please note that the Developer Centre is common for all Toradex products. You should always

check to ensure if information is valid or relevant for the Apalis modules.

http://www.developer.toradex.com

Apalis Carrier Board Design Guide

Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l info@toradex.com

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1.2.5 Apalis Evaluation Board Schematics

We provide the completed schematics plus the Altium project file for the Apalis Evaluation Board

for free. This is a great help when designing your own Carrier Board.

http://developer.toradex.com/hardware-resources/arm-family/carrier-board-design

1.2.6 Pinout Designer

This is an interactive and useful tool for configuring the pin muxing of the Colibri and Apalis

modules. It can be really helpful in custom carrier board development on Toradex modules and

checking compatibility of existing carrier boards with our modules.

http://developer.toradex.com/knowledge-base/pinout-designer

1.3 Abbreviations

Abbreviation

Explanation

ADC

Analogue to Digital Converter

AGND

Analogue Ground, separate ground for analogue signals

Auto-MDIX

Automatically Medium Dependent Interface Crossing, a PHY with Auto-MDIX f is able to detect whether

RX and TX need to be crossed (MDI or MDIX)

CAD

Computer-Aided Design, in this document is referred to PCB Layout tools

CAN

Controller Area Network, a bus that is manly used in automotive and industrial environment

CDMA

Code Division Multiplex Access, abbreviation often used for a mobile phone standard for data

communication

CEC

Consumer Electronic Control, HDMI feature that allows to control CEC compatible devices

CPU

Central Processor Unit

CSI

Camera Serial Interface

DAC

Digital to Analogue Converter

DDC

Display Data Channel, interface for reading out the capability of a monitor, in this document DDC2B

(based on I2C) is always meant

DRC

Design Rule Check, a tool for checking whether all design rules are satisfied in a CAD tool

DSI

Display Serial Interface

DVI

Digital Visual Interface, digital signals are electrical compatible with HDMI

DVI-A

Digital Visual Interface Analogue only, signals are compatible with VGA

DVI-D

Digital Visual Interface Digital only, signals are electrical compatible with HDMI

DVI-I

Digital Visual Interface Integrated, combines digital and analogue video signals in one connector

EDA

Electronic Design Automation, software for schematic capture and PCB layout (CAD or ECAD)

EDID

Extended Display Identification Data, timing setting information provided by the display in a PROM

EMI

Electromagnetic Interference, high frequency disturbances

eMMC

Embedded Multi Media Card, flash memory combined with MMC interface controller in a BGA package,

used as internal flash memory

ESD

Electrostatic Discharge, high voltage spike or spark that can damage electrostatic- sensitive devices

FPD-Link

Flat Panel Display Link, high-speed serial interface for liquid crystal displays. In this document also called

LVDS interface.

GBE

Gigabit Ethernet, Ethernet interface with a maximum data rate of 1000Mbit/s

GND

Ground

GPIO

General Purpose Input/Output, pin that can be configured being an input or output

GSM

Global System for Mobile Communications

HDA

High Definition Audio (HD Audio), digital audio interface between CPU and audio codec

HDCP

High-Bandwidth Digital content Protection, copy protection system that is used by HDMI beside others

HDMI

High-Definition Multimedia Interface, combines audio and video signal for connecting monitors, TV sets or

Projectors, electrical compatible with DVI-D

I2C

Inter-Integrated Circuit, two wire interface for connecting low-speed peripherals

Apalis Carrier Board Design Guide

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Abbreviation

Explanation

I2S

Integrated Interchip Sound, serial bus for connecting PCM audio data between two devices

IrDA

Infrared Data Association, infrared interface for connecting peripherals

JTAG

Joint Test Action Group, widely used debug interface

LCD

Liquid Crystal Display

LSB

Least Significant Bit

LVDS

Low-Voltage Differential Signaling, electrical interface standard that can transport very high-speed signals

over twisted-pair cables. Many interfaces like PCIe or SATA use this interface. Since the first successful

application was the Flat Panel Display Link, LVDS became a synonymous for this interface. In this

document, the term LVDS is used for the FPD-Link interface.

MIPI

Mobile Industry Processor Interface Alliance

MDI

Medium Dependent Interface, physical interface between Ethernet PHY and cable connector

MDIX

Medium Dependent Interface Crossed, an MDI interface with crossed RX and TX interfaces

mini PCIe

PCI Express Mini Card, card form factor for internal peripherals. The interface features PCIe and USB 2.0

connectivity

MMC

MultiMediaCard, flash memory card

MSB

Most Significant Bit

mSATA

Mini-SATA, a standardized form factor for small solid state drive, similar dimensions as mini PCIe

MXM3

Mobile PCI Express Module (second generation), graphic card standard for mobile device, the Apalis form

factor uses the physical connector but not the pin-out and the PCB dimensions of the MXM3 standard.

N/A

Not Available

N/C

Not Connected

Open Drain

OTG

USB On-The-Go, a USB host interface that can also act as USB client when connected to another host

interface

OWR

One Wire (1-Wire), low-speed interface which needs just one data wire plus ground

PCB

Printed Circuit Board

PCI

Peripheral Component Interconnect, parallel computer expansion bus for connecting peripherals

PCIe

PCI Express, high-speed serial computer expansion bus, replaces the PCI bus

PCM

Pulse-Code Modulation, digitally representation of analogue signals, standard interface for digital audio

Pull-Down Resistor

PHY

Physical Layer of the OSI model

PMIC

Power Management IC, integrated circuit that manages amongst others the power sequence of a system

Pull-up Resistor

PWM

Pulse-Width Modulation

RGB

Red Green Blue, color channels in common display interfaces

RJ45

Registered Jack, common name for the 8P8C modular connector that is used for Ethernet wiring

RS232

Single ended serial port interface

RS422

Differential signaling serial port interface, full duplex

RS485

Differential signaling serial port interface, half duplex, multi drop configuration possible

R-UIM

Removable User Identity Module, identifications card for CDMA phones and networks, an extension of the

GSM SIM card

S/PDIF

Sony/Philips Digital Interconnect Format, optical or coaxial interface for audio signals

SATA

Serial ATA, high-speed differential signaling interface for hard drives and SSD

Secure Digital, flash memory card

SDIO

Secure Digital Input Output, an external bus for peripherals that uses the SD interface

SIM

Subscriber Identification Module, identification card for GSM phones

SMBus

System Management Bus (SMB), two wire bus based on the I2C specifications, used specially in x86

design for system management.

SoC

System on a Chip, IC which integrates the main component of a computer on a single chip

SPI

Serial Peripheral Interface Bus, synchronous four wire full duplex bus for peripherals

TIM

Thermal Interface Material, thermal conductive material between CPU and heat spreader or heat sink

TMDS

Transition-Minimized Differential Signaling, serial high-speed transmitting technology that is used by DVI

and HDMI

TVS Diode

Transient-Voltage-Suppression Diode, diode that is used to protect interfaces against voltage spikes

Apalis Carrier Board Design Guide

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Abbreviation

Explanation

UART

Universal Asynchronous Receiver/Transmitter, serial interface, in combination with a transceiver a RS232,

RS422, RS485, IrDA or similar interface can be achieved

USB

Universal Serial Bus, serial interface for internal and external peripherals

VCC

Positive supply voltage

VGA

Video Graphics Array, analogue video interface for monitors

Table 1: Abbreviations

Apalis Carrier Board Design Guide

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2 Interfaces

2.1 Architecture

The block diagram in Figure 1 shows the basic architecture of the Apalis module, depicting the

standard interfaces and some examples of type-specific interfaces.

Standard interfaces are interfaces that are compatible between different Apalis modules. The pins

are reserved for this specific function and are not used for other purpose. This guarantees electrical

compatibility between carrier board designs which only uses the standard interfaces. This helps to

ensure longevity of carrier board designs and provides support for future modules. Some modules

may not feature all the standard interfaces. In this case, for the GPIO compatible interfaces, GPIO

functionality is provided. Other interfaces on the module might be left disconnected.

Type-specific interfaces are interfaces which are not guaranteed to be functionally or electrically

compatible between modules. If a carrier board design uses such interfaces, then it is possible that

other modules in the Apalis module family do not provide these interfaces and instead provide

another interface on the associated pins. These interfaces might be electrically incompatible. In this

case, the carrier board will be restricted for use only with certain Apalis modules.

Analogue and Resistive

Touch

24 Bit Parallel LCD

Parallel Camera

Digital Audio

I2C (x3)

SPI (x2)

SATA (x1)

PCI Express (x1)

Analogue Audio

PWM (x4)

CAN (x2)

Gigabit Ethernet

USB

(2 x USB3.0)

(2 x USB2.0)

(1x USB client shared)

MMC (8 bit) SDIO (4 bit)

UART (x4)

SPDIFVGA

HDMI/DVI

Dual Channel LVDS

Display Serial Interface

(DSI)

Camera Serial Interface

(CSI)

PCI Express (x4)

Apalis Module

Function is standard: Reserved on every module (however, not necessarily

implemented on every module). Will only be used for this purpose or GPIO.

Function is type specific: May only be present on specific modules and is

not guaranteed to be electrically or functionality compatible on different

modules; the pins may be used for as yet undefined interfaces

GPIO (x8)

(dedicated, many more

available)

Figure 1: Apalis Module Architecture

Table des matières

Autres manuels Toradex Unité de contrôle

Toradex

Toradex Verdin Manuel utilisateur

Toradex

Toradex Colibri PXA270 Manuel utilisateur

Toradex

Toradex Colibri T30 Mode d’emploi

Manuels Unité de contrôle populaires d'autres marques

Festo

Festo Compact Performance CP-FB6-E Manuel de la liste des pièces

Elo TouchSystems

Elo TouchSystems DMS-SA19P-EXTME Manuel utilisateur

JS Automation

JS Automation MPC3034A Manuel utilisateur

JAUDT

JAUDT SW GII 6406 Series Guide rapide

Spektrum

Spektrum Air Module System Manuel utilisateur

BOC Edwards

BOC Edwards Q Series Manuel utilisateur

KHADAS

KHADAS BT Magic Manuel utilisateur

Etherma

Etherma eNEXHO-IL Manuel utilisateur

PMFoundations

PMFoundations Attenuverter Manuel utilisateur

GEA

GEA VARIVENT Manuel utilisateur

Walther Systemtechnik

Walther Systemtechnik VMS-05 Manuel utilisateur

Altronix

Altronix LINQ8PD Instructions de montage

Eaton

Eaton Powerware Series Manuel utilisateur

WAGO

WAGO 750-407/040-000 Manuel utilisateur

Sony

Sony CCU-590 Manuel utilisateur

Graco

Graco 25D614 Manuel utilisateur

Task Force Tips

Task Force Tips YE-RF-900 Manuel de programmation

Shini

Shini SPV-U Series Manuel utilisateur