Sony CMOS CXP854P60 Manuel utilisateur

Description

The CXP854P60 are a highly integrated micro-

computers composed of a 8-bit CPU, PROM, RAM,

and I/O ports. These chips feature many other high-

performance circuits in a single-chip CMOS design,

including an A/D converter, serial interface,

timer/counter, time-base timer, vector interrupt, on-

screen display function, I2C bus interface, PWM

generator, remote control receiver, HSYNC counter,

and watchdog timer.

Also, the CXP854P60 provides power-on reset

and sleep functions. The designers have ensured

low power consumption for these powerful micro-

computers.

Incorporating a one-time PROM, the CXP854P60

has an equivalent function to the CXP85460 and

character ROM for OSD can be written. Therefore, it

is suitable for evaluation in system development

and for the production of small amounts.

Features

•Instruction set which supports a wide array of data types-213 types of instructions which include 16-bit

calculations, multiplication and division arithmetic, and boolean operations.

•Minimum instruction cycle 0.5µs/8MHz

•On-chip PROM 60K bytes (For program)

10K bytes (For OSD)

•On-chip RAM 960 bytes

•On-screen display function 12 ×18 dots, 384 types, 12lines of 32 characters

Black frame output, half blanking, shadow, background color on full screen

Double scanning mode supported includes jitter elimination circuit

•I2C bus interface

•14-bit PWM output, 8-bit PWM output (8 channels)

•Remote control receiver circuit

•8-bit A/D converter (4 channels, 20µs conversion time/4MHz, 8MHz)

•HSYNC counter (2channels)

•Watchdog timer

•8-bit synchronized serial I/O

•8-bit timer, 8-bit timer/counter, 19-bit time-base timer

•General purpose input/output 32-line I/O (bit-selectable input/output), also 6-line input, 10-line output (internal

8-line Nch-O/D)

•Interrupts 13 factors, 13 vectors, multiple interrupt possible

•Standby mode SLEEP

•Package 64-pin plastic SDIP/QFP

Purchase of Sony's I2C components conveys a license under the Philips I2C Patent Rights to use these components

in an I2C system, provided that the system conforms to the I2C Standard Specifications as defined by Philips.

– 1 –

CXP854P60

E95109A16-PS

CMOS 8-bit Single-chip Microcomputer

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by

any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the

operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

64 pin SDIP (PIastic) 64 pin QFP (PIastic)

Structure

Silicon gate CMOS IC

– 2 –

CXP854P60

ON SCREEN DISPLAY

SERIAL I/O

TIMER/COUNTER

REMOCON FIFO

A/D CONVERTER

I2C

INTERFACE UNIT

WATCH DOG TIMER

14BIT PWM 8 BIT PWM

8CH

CLOCK GEN./

SYSTEM CONTROL

RAM

960 BYTES

SPC700

CPU CORE

PROM

60K

PRESCALER/

TIME BASE TIMER

PORT A

PORT B

PORT C

PORT D

PORT E

PORT F

RST

XTAL

EXTAL

PD0/INT2

PE1/INT1

PE0/INT0

PF0/PWM0

PF7/PWM7

INTERRUPT

CONTROLLER

PE6/PWM

PA0 to PA7

PB0 to PB7

PC0 to PC7

PD0 to PD7

PE0 to PE5

PE6 to PE7

PF0 to PF7

XLC

EXLC

PA7/HSYNC

PA6/VSYNC

PD3/SI

PD2/SO

PD1/SCK

PD7/EC

PE7/TO

PD6/RMC

PD4/HS0

PD5/HS1

PE2/AN0

PE5/AN3

PF4/SCL0

PF5/SCL1

PF6/SDA0

PF7/SDA1

HSYNC COUNTER 0

HSYNC COUNTER 1

Vpp

Block Diagram

–3 –

CXP854P60

HSYNC/PA7

VSYNC/PA6

PA5

PA4

PA3

PA2

PA1

PA0

PB7

PB6

PB5

PB4

PB3

PB2

PB1

PB0

PC7

PC6

PC5

PC4

PC3

PC2

PC1

PC0

EC/PD7

RMC/PD6

HS1/PD5

HS0/PD4

SI/PD3

SO/PD2

SCK/PD1

VSS

VDD

Vpp

VSS

PF0/PWM0

PF1/PWM1

PF2/PWM2

PF3/PWM3

PF4/PWM4/SCL0

PF5/PWM5/SCL1

PF6/PWM6/SDA0

PF7/PWM7/SDA1

EXLC

XLC

PE0/INT0

PE1/INT1

PE2/AN0

PE3/AN1

PE4/AN2

PE5/AN3

PE6/PWM

PE7/TO

RST

EXTAL

XTAL

PD0/INT2

32 33

Pin Assignment (Top View)

20 21 22 23 24 25 26 27 28 30

31 32

64 61

PA1

PA0

PB7

PB6

PB5

PB4

PB3

PB2

PB1

PB0

PC7

PC6

PC5

PC4

PC3

PC2

PC1

PC0

EC/PD7

PF3/PWM3

PF4/PWM4/SCL0

PF5/PWM5/SCL1

PF6/PWM6/SDA0

PF7/PWM7/SDA1

EXLC

XLC

PE0/INT0

PE1/INT1

PE2/AN0

PE3/AN1

PE4/AN2

PE5/AN3

RMC/PD6

HS1/PD5

HS0/PD4

SI/PD3

SO/PD2

SCK/PD1

VSS

INT2/PD0

XTAL

EXTAL

RST

TO/PE7

PWM/PE6

PA2

PA3

PA4

PA5

PA6/VSYNC

PA7/HSYNC

VSS

VDD

Vpp

PF0/PWM0

PF1/PWM1

PF2/PWM2

Note) 1. Vpp pin 63 must be connected to VDD.

2. Vss pins 32 and 62 must have a common GND.

3. MP pin 61 must be connected to GND.

Note) 1. Vpp pin 56 must be connected to VDD.

2. Vss pins 26 and 58 must have a common GND.

3. MP pin 55 must be connected to GND.

–4 –

CXP854P60

(Port A)

Single bit selectable 8-bit port.

(8 lines)

(Port B)

Single bit selectable 8-bit port.

(8 lines)

(Port C)

Single bit selectable 8-bit port.

(8 lines)

(Port D)

Single bit selectable

8-bit port.

12mA sink current

drive possible.

(8 lines)

(Port E)

8-bit port, lower

6 bits for input,

upper 2 bits for

output.

(8 lines)

(Port F)

8-bit output port

with large current

(12mA) N-ch open

drain output.

Lower 4 bits middle

voltage tolerance

(12V), upper 4 bits

5V suppression.

(8 lines)

CRT display 6-bit output pin.

Pin Functions

Pin Name

PA0 to PA5

PA6/VSYNC

PA7/HSYNC

PB0 to PB7

PC0 to PC7

PD0/INT2

PD1/SCK

PD2/SO

PD3/SI

PD4/HS0

PD5/HS1

PD6/RMC

PD7/EC

PE0/INT0

PE1/INT1

PE2/AN0

PE5/AN3

PE6/PWM

PE7/TO

PF0/PWM0

PF3/PWM3

PF4/PWM4/

SCL0

PF5/PWM5/

SCL1

PF6/PWM6/

SDA0

PF7/PWM7/

SDA1

R, G, B, I, YS, YM

I/O

I/O/Input

I/O

I/O/Input

I/O/I/O

I/O/Output

I/O/Input

Input/Input

Output/Output

Output/Output/

I/O

Output/Output/

I/O

Output

I/O Function

CRT display vertical synchronization signal input pin.

CRT display horizontal synchronization signal input pin.

Input pin for external interrupt request.

Active on falling edge.

Serial clock pin.

Serial data output pin.

Serial data input pin.

HSYNC counter (CH0) input pin.

HSYNC counter (CH1) input pin.

Remote control receiver circuit input pin.

External event timer/counter input pin.

Input pin for external interrupt request.

Active falling edge.

(2 lines)

Analog input pin for A/D converter.

(4 lines)

14-bit PWM output pin.

(CMOS output)

Square wave output for timer 1.

(50% duty cycle)

8-bit PWM output pin.

(8-lines)

I2C bus interface transfer clock I/O pin.

I2C bus interface transfer data I/O pin.

–5 –

CXP854P60

Pin Name

EXLC

XLC

EXTAL

XTAL

RST

Vpp

VDD

Vss

Input

Output

Input

Output

I/O

Input

CRT display clock oscillator I/O pin.

Oscillator frequency is determined external L, C circuit.

System clock oscillator crystal connection pin. When using an external

clock, input to EXTAL pin and leave XTAL pin open.

"L" level active system reset. This pin also acts as an I/O pin during

power up. While internal power-on reset function is talking place a

"L" level is output.

Test mode input pin. Must be connected to GND.

Positive power supply pin for incorporated PROM writing.

Under normal operating conditions, connect to VDD.

Positive supply voltage pin.

GND. Both Vss pins should be connected to common GND.

I/O Function

–6 –

CXP854P60

Data bus

(Port A, B, C)

Input protection

circuit

AAAA

Port A data

Port B data

Port C data

AAAA

Port A direction

Port B direction

Port C direction

Data bus

RD (Port A)

Schmitt input

AAAA

Port A direction

AAAA

Port A data

Input protection

circuit

AAAA

Input multiplexer

VSYNC

HSYNC

Data bus

RD (Port D)

AAAA

Port D direction

AAAA

Port D data

Large current

source 12mA

INT2, SI, HS0, HS1, RMC, EC Schmitt input

Pin Equivalent I/O Circuit

Port A

Port B

Port C

Port A

Port D

22 lines

2 lines

6 lines

Hi-Z

When reset

Circuit format

PA0 to PA5

PB0 to PB7

PC0 to PC7

PA6/VSYNC

PA7/HSYNC

PD0/INT2

PD3/SI

PD4/HS0

PD5/HS1

PD6/RMC

PD7/EC

–7 –

CXP854P60

Data bus

RD (Port D)

AAAA

Port D direction

AAAA

Port D data

Large current

source 12mA

Schmitt input

SCK only

SCK or SO

Output enable

RD (Port E)

Data bus

Schmitt input

(To interrupt circuit)

Input multiplexer

To A/D converter

RD (Port E)

Data bus

TO, PWM

AAAAA

Port E selection

AAAAA

Port E data

Port D

Port E

2 lines

4 lines

2 lines

When reset

Circuit format

PE0/INT0

PE1/INT1

Port E

Hi-Z

H level

PE2/AN0

PE5/AN3

PD1/SCK

PD2/SO

PE6/PWM

PE7/TO

–8 –

CXP854P60

SCL, SDA

AAAAA

Port F selection

AAAAA

Port F data

Large current

source 12mA

PWM

I2C output enable

Schmitt input

SCL, SDA

(To I2C circuit) To other I2C pins

BUS SW

PWM

AAAAA

Port F selection

AAAAA

Port F data

12V voltage torelance

Large current

source 12mA

Port F

4 lines

6 lines

2 lines

When reset

Circuit format

PF4/PWM4/

SCL0

PF5/PWM5/

SCL1

PF6/PWM6/

SDA0

PF7/PWM7/

SDA1

Hi-Z

Oscillation

halted

PF0/PWM0

PF3/PWM3

EXLC

XLC

R, G, B, I, YS, YM

To output polarity register

Writing data to port register brings output

from high impedance to active

AAAA

Output polarity

Oscillator control

EXLC

CRT display clock

XLC

–9 –

CXP854P60

2 lines

1 line

When reset

Circuit format

RST

Oscillation

L level

EXTAL

XTAL

EXTAL

XTAL

•Diagram indicates equivalent

circuit during oscillation

•Feedback resistor is disconnected

during STOP

Schmitt input

Pull-up resistor

From power-on reset circuit

–10 –

CXP854P60

∗1VIN and VOUT should not exceed VDD + 0.3V.

∗2The large current driver for the PD and PF ports is a N-ch transistor.

Note) Usage exceeding absolute maximum ratings may permanently impair the LSI. Normal operation should

better take place under the recommended operating conditions. Exceeding those conditions may

adversely affect the reliability of the LSI.

Supply voltage

Input voltage

Output voltage

Medium voltage tolerance output voltage

High level output current

High level total output current

Low level output current

Low level total output current

Operating temperature

Storage temperature

Allowable power dissipation

VDD

Vpp

VIN

VOUT

VOUTP

IOH

∑IOH

IOL

IOLC

∑IOL

Topr

Tstg

–0.3 to +7.0

–0.3 to +13.0

–0.3 to +7.0∗1

–0.3 to +15.0

–5

–50

130

–10 to +75

–55 to +150

1000

600

°C

Incorporated PROM

Pins PF0 to PF3

Total of all output pins

Excludes large current output

Large current output∗2

Total of all output pins

SDIP

QFP

Item Symbol Ratings Unit Remarks

Absolute Maximum Ratings (Vss = 0V)

Supply voltage

High level

input voltage

Low level

input voltage

Operating temperature

5.5

VDD

VDD + 0.3

0.3VDD

0.2VDD

0.4

+75

°C

Item Symbol Min. Max. Unit Remarks

4.5

3.5

2.5

0.7VDD

0.8VDD

VDD –0.4

–0.3

–10

Vpp

VIH

VIHS

VIHEX

VIL

VILS

VILEX

Topr

Safe operating range

Safe operating range for low speed data∗1

Safe operating range for data retention during STOP

∗5

I2C Schmitt input included∗2

CMOS Schmitt input∗3

EXTAL pin∗4

I2C Schmitt input included∗2

CMOS Schmitt input∗3

EXTAL pin∗4

VDD

∗1Rating for 1/16 frequency mode and sleep mode.

∗2Normal input port (All pins PA, PB, PC, PE2 to PE5), PF4 to PF7 pins.

∗3Includes PD0/INT2, PD1/SCK, PD2, PD3/SI, PD4/HS0, PD5/HS1, PD6/RMC, PD7/EC, PE0/INT0, PE1/INT1,

HSYNC, VSYNC, RST pins.

∗4Rating applies to external clock input only.

∗5Vpp and VDD should be set to a same voltage.

Recommended Operating Conditions (Vss =0V)

Vpp = VDD

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