Renesas R9A02G011 Instructions d'installation et d'utilisation

APPLICATION NOTE

BCD-ISG-19-5034 Rev.1.0 Page 1 of 17

Apr 04, 2019

R9A02G011

Board Design Guide

Introduction

This document describes guidelines for designing boards using Renesas Electronics USB Power Delivery

devices. These guidelines offer Renesas Electronics’ recommendations with no guarantee of results.

This document only guides designing around the R9A02G011, refer to the document of power management

IC for designing around the power IC.

Target Device

R9A02G011

Related Document

R9A02G011 Data Sheet: R19DS0088EJ

R9A02G011 User’s Manual: R19UH0102EJ

RTK-251-BuckBoostConverter2 Instruction Manual: R19AN0057EJ

RTK-251-1PowerBank3 Instruction Manual: R19AN0056EJ

RTK-251-DRPEVB Instruction Manual: R19AN0059EJ

R9A02G011 Board Design Guide

BCD-ISG-19-5034 Rev.1.0 Page 2 of 17

Apr 04, 2019

Contents

1. Consideration to design a PCB on the R9A02G011.................................................................3

1.1 Analog input pin connection ....................................................................................................................3

1.2 Via under E-pad.......................................................................................................................................4

1.3 Decoupling capacitor and “VDD”, “REGC” and “REGCTX” power lines.................................................5

1.4 Rd resister and decoupling capacitor for CC line....................................................................................6

1.5 Load switch for supplying VCONN power...............................................................................................7

2. Design check list......................................................................................................................8

2.1 Check list for source-only device.............................................................................................................8

2.2 Check list for DRP device......................................................................................................................11

2.3 Check list for sink-only device...............................................................................................................14

Revision History............................................................................................................................17

R9A02G011 Board Design Guide

BCD-ISG-19-5034 Rev.1.0 Page 3 of 17

Apr 04, 2019

1. Consideration to design a PCB on the R9A02G011

It is necessary to have several considerations if design a PCB on the R9A02G011.

1.1 Analog input pin connection

Put 0.1 uF near each “ANI” pin individually (P20, P21 and P22 are ANI).

Figure 1-1 Analog input pin connection

R9A02G011

0.1uF for

ANI8

ANI9

AN10

R9A02G011 Board Design Guide

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Apr 04, 2019

1.2 Via under E-pad

Make φ 0.3 mm via under E-pad as following pattern.

Figure 1-2 Via under E-pad

R9A02G011

via

R9A02G011 Board Design Guide

BCD-ISG-19-5034 Rev.1.0 Page 5 of 17

Apr 04, 2019

1.3 Decoupling capacitor and “VDD”, “REGC” and “REGCTX” power lines

Each Decoupling capacitor should be put on near each pin (VDD, REGC, REGCTX) individually.

Make these traces connected to "VDD", "REGC" and "REGCTX" thick enough. Because ""VDD", "REGC"

and "REGCTX" are power pins.

Figure 1-3 Decoupling capacitor

R9A02G011

Decoupling capacitors

1uF

4.7uF

"VDD", "REGC" and "REGCTX"

R9A02G011 Board Design Guide

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Apr 04, 2019

1.4 Rd resister and decoupling capacitor for CC line

Put 5.1 kohm near RD1, RD2 pin individually, and put 330 pF near CC1, CC2 pin individually.

Figure 1-4 Rd resister and decoupling capacitor for CC line

R9A02G011

5.1k

for Rd

330pF

R9A02G011 Board Design Guide

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Apr 04, 2019

1.5 Load switch for supplying VCONN power

Do not make a stub on CC trace by VCONN power supply. Put on Load Switch near CC trace.

Figure 1-5 Load switch for suppling VCONN power

CC1

CC2

Load Switch

R9A02G011 Board Design Guide

BCD-ISG-19-5034 Rev.1.0 Page 8 of 17

Apr 04, 2019

2. Design check list

Following checklists are written based on Renesas Reference Design Note which are designed by Renesas

recommended guideline. The result of design by using following checklists is no guarantee. Use them for

reference only.

Note The information of reference design is available in Renesas web site.

2.1 Check list for source-only device

(1) Power / Data Role check

Power Role

SRC

Data Role

UFP DFP DRD

(2) Power supply and USB Type-C™ check

Section Sub-section Description Check

Power supply

System Reset

Operating Range Check "VDD" is supplied from the power source within 3.0 V - 5.5 V

Power

Stabilization Check 4.7 uF decoupling capacitor is put on near "REGCTX" pin.

Check 1 uF decoupling capacitor is put on near "REGC" pin.

Reset Check "RESETB" pin is pulled up VDD via 10 kohm resistor.

USB Type-C VBUS Check VBUS leakage impedance is more than "72.4 kohm" on USB Type-C

Receptacle (VBUS) pin.

Check VBUS capacitance is less than "10 uF" on USB Type-C Receptacle

(VBUS) pin.

CC trace Connect "CC1" and "CC2" to USB Type-C Receptacle (CC1/CC2) pin.

Check 330 pF is put on near "CC1" and "CC2" pins individually.

Check "RD1" and "RD2" are open individually.

Check VCONN source is connected to "CC1" and "CC2" individually.

R9A02G011 Board Design Guide

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Apr 04, 2019

(3) GPIOs check

Section

Sub-section

Function

Description

Check

GPIOs

P20/ANI8

VBUSM

Pull-up to VBUS via 100 kohm (1%) and pull-down to GND

via 15 kohm (1%)

Check 0.1 uF decoupling capacitor and clipping diodes are

put on near "P20/ANI8/VBUSM" pin.

P21/ANI9

ANI9

Check 0.1 uF decoupling capacitor and clipping diodes are

put on near "P21/ANI9" pin.

Unused

Output: Open

P22/ANI10

ANI10

Check 0.1 uF decoupling capacitor and clipping diodes are

put on near "P22/ANI10" pin.

Unused

Output: Open

P31/MSTSDA

MSTSDA

Connect to I2C slave serial data pin with 4.7 kohm pull-up

resistor.

Unused

Output: Open

P30/MSTSCL

MSTSCL

Connect to I2C slave serial clock pin with 4.7 kohm pull-up

resistor.

Unused

Output: Open

P40/TOOL0

TOOL0

Pull-up to VDD via 1 kohm resistor

Unused

Input: Pull-up to VDD via the resistor.

Output: Open

P61/SLVSDA

SLVSDA

Connect to I2C master serial data pin with 4.7 kohm pull-

up resistor.

Unused

Output: Open

P60/SLVSCL

SLVSCL

Connect to I2C master serial clock pin with 4.7 kohm pull-

up resistor.

Unused

Output: Open

P62/SLVSALTB

SLVSALTB

Connect to I2C master input (GPIO, INT or other) with 10

kohm pull-up resistor.

Unused

Output: Open

P137/MSTSALTB

MSTSALTB

Connect to I2C slave input (GPIO, INT or other) with 10

kohm pull-up resistor.

Unused

Input: Pull-up to VDD via the resistor.

P16, P17, P32

P50, P51, P70,

P71, P72, P73,

P80, P81, P82,

P121, P122

Refer to “Configurable function” check

R9A02G011 Board Design Guide

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Apr 04, 2019

(4) Configurable function check

Following list is based on the RTK-251-BuckBoostConverter2. Refer to the RTK-251-BuckBoostConverter2

Instruction Manual (R19AN0057EJ), if you have detail information.

Port

Function

Description

Check

P16

VCONN1_DRV

Output: Connect to VCONN source load switch circuit of CC1

P17

VCONN2_DRV

Output: Connect to VCONN source load switch circuit of CC2

P32

Not used

Output: Open

P50

Not used

Output: Open

P51

Not used

Output: Open

P70

Not used

Output: Open

P71

AGATE

Output: Connect to VBUS load switch circuit

P72

DISCHG

Output: Connect to VBUS discharge circuit

P73

Not used

Output: Open

P80

Not used

Output: Open

P81

LED_CTRL

Output: Connect to LED circuit

P82

Not used

Output: Open

P121

SLVADDR0

Input: Connect to VDD or GND via resister

P122

SLVADDR1

Input: Connect to VDD or GND via resister

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