Phytec PhyCORE-TC1775 Manuel utilisateur

A product of a PHYTEC Technology Holding company

TC1775

Hardware Manual

Edition July 2006

phyCORE-TC1775

©PHYTEC Messtechnik GmbH 2006 L-538e_3

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PHYTEC Messtechnik GmbH.

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3rd Edition: July 2006

Table of Contents

©PHYTEC Messtechnik GmbH 2006 L-538e_3

Preface 1

1 Introduction.........................................................................................3

1.1 Block Diagram .............................................................................6

1.2 View of the phyCORE-TC1775...................................................7

2 Pin Description....................................................................................9

3 Jumpers..............................................................................................23

4 Power System and Reset Behavior..................................................31

5 Boot Characteristics..........................................................................33

6 System Memory.................................................................................35

6.1 Memory Model following Reset................................................35

6.2 Runtime Memory Model............................................................35

6.3 Flash Memory ............................................................................37

6.3.1 Burst-Mode Flash (U9, U11) ........................................37

6.3.2 Standard Flash (U14, U15) ...........................................38

6.4 Serial Memory, EEPROM/FRAM/SRAM (U13)......................39

7 Serial Interfaces.................................................................................43

7.1 RS-232 Interface ........................................................................43

7.2 CAN Interface ............................................................................44

7.3 On-Chip Debug Support.............................................................45

8 CS8900A Ethernet Controller .........................................................47

8.1 I/O and Mode..............................................................................47

8.2 Addressing and Bus Configuration............................................47

8.3 Interrupt Control.........................................................................48

8.4 Hardware Standby......................................................................48

8.5 MAC Address.............................................................................48

8.6 Configuration Data in EEPROM (U10).....................................49

8.7 10Base-T Interface.....................................................................49

9 Real-Time Clock RTC-8564 (U24)..................................................50

10 Standby Power Supply......................................................................51

11 debugCORE-TC1775........................................................................53

11.1 Components of the debugCORE................................................53

11.2 Connecting an Emulator.............................................................55

12 Technical Specifications ...................................................................57

13 Hints for Handling the phyCORE-TC1775....................................60

phyCORE-TC1775

©PHYTEC Messtechnik GmbH 2006 L-538e_3

14 The phyCORE-TC1775 on the

phyCORE-TriCORE Development Board.....................................61

14.1 Concept of the phyCORE Development Board.........................61

14.2 phyCORE-TriCORE Development Board Connectors and

Jumpers ...................................................................................... 63

14.2.1 Connectors .................................................................... 63

14.2.2 Jumpers on the phyCORE-TriCORE

Development Board ...................................................... 65

14.3 Functional Components on the phyCORE-TriCORE

Development Board ................................................................... 67

14.3.1 Power Supply at X1 ...................................................... 67

14.3.2 Activating the Bootstrap Loader................................... 68

14.3.3 First Serial Interface at Socket P1A.............................. 70

14.3.4 Second Serial Interface at Socket P1B .........................72

14.3.5 First CAN Interface at Plug P2A.................................. 74

14.3.6 Second CAN Interface at Plug P2B..............................77

14.3.7 RJ45 Ethernet Connector X7........................................ 80

14.3.8 Programmable LED D3 ................................................ 80

14.3.9 Pin Assignment Summary of the phyCORE, the

Expansion Bus and the Patch Field............................... 81

14.3.10 DS2401 Silicon Serial Number..................................... 92

14.3.11 Pin Header Connectors X4 and X5...............................93

15 debugCORE-TC1775 on the Development Board.........................95

16 Revision History................................................................................ 99

A.1 Release Notes........................................................................... 100

Table of Contents

©PHYTEC Messtechnik GmbH 2006 L-538e_3

Index of Figures

Figure 1: Block Diagram phyCORE-TC1775 ........................................6

Figure 2: View of the phyCORE-TC1775 (Controller Side)..................7

Figure 3: View of the phyCORE-TC1775 (Connector Side)..................8

Figure 4: Pinout of the phyCORE-Connector (Connector Side) ..........11

Figure 5: Numbering of the Jumper Pads .............................................23

Figure 6: Location of the Jumpers (Controller Side)and Default

Settings (phyCORE-TC1775 Standard Version)...................23

Figure 7: Location of the Jumpers (Connector Side) and Default

Settings (phyCORE-TC1775 Standard Version)...................24

Figure 8: I2C Slave Address of the Serial Memory ..............................40

Figure 9: Positions of the Additional Components on the

debugCORE-TC1775 ............................................................54

Figure 10: Connecting an Emulator........................................................55

Figure 11: Physical Dimensions..............................................................57

Figure 12: Modular Development and Expansion Board Concept with

the phyCORE-TC1775..........................................................62

Figure 13: Location of Connectors on the phyCORE-TriCORE

Development Board...............................................................63

Figure 14: Numbering of Jumper Pads ...................................................65

Figure 15: Location of the Jumpers (View of the Component Side)......65

Figure 16: Default Jumper Settings of the phyCORE-TriCORE

Development Board with Standard phyCORE-TC1775 .......66

Figure 17: Connecting the Supply Voltage at X1...................................67

Figure 18: Pin Assignment of the DB-9 Socket P1A as First RS-232

(Front View)..........................................................................70

Figure 19: Pin Assignment of the DB-9 Socket P1A as Second

RS-232 (Front View).............................................................72

Figure 20: Pin Assignment of the DB-9 Plug P2A (CAN Transceiver

on phyCORE-TC1775, Front View) .....................................74

Figure 21: Pin Assignment of the DB-9 Plug P2A (CAN Transceiver

on Development Board).........................................................75

phyCORE-TC1775

©PHYTEC Messtechnik GmbH 2006 L-538e_3

Figure 22: Pin Assignment of the DB-9 Plug P2A (CAN Transceiver

on Development Board with Galvanic Separation) ..............76

Figure 23: Pin Assignment of the DB-9 Plug P2B (CAN Transceiver

on phyCORE-TC1775, Front View).....................................77

Figure 24: Pin Assignment of the DB-9 Plug P2B (CAN Transceiver

on Development Board) ........................................................78

Figure 25: Pin Assignment of the DB-9 Plug P2B (CAN Transceiver

on Development Board with Galvanic Separation) ..............79

Figure 26: Pin Assignment Scheme of the Expansion Bus ....................82

Figure 27: Pin Assignment Scheme of the Patch Field ..........................82

Figure 28: Connecting the DS2401 Silicon Serial Number....................92

Figure 29: Pin Assignment of the DS2401 Silicon Serial Number........92

Figure 30: Positions of the Additional Components on the

debugCORE-TC1775............................................................95

Table of Contents

©PHYTEC Messtechnik GmbH 2006 L-538e_3

Index of Tables

Table 1: Pinout of the phyCORE-Connector X1......................................21

Table 2: Jumper Settings ..........................................................................30

Table 3: Runtime Memory Map...............................................................36

Table 4: Flash Memory Types and Manufacturers ..................................38

Table 5: Memory Device Options for U13...............................................40

Table 6: I2C Addresses for Serial Memory ..............................................41

Table 7: OCDS1 Connector X3 Pin Assignment.....................................46

Table 9: JP28 Configuration of the Boot Button.....................................68

Table 10: JP22, JP23, JP34 Configuration of Boot via RS-232................69

Table 11: Improper Jumper Settings for Boot via RS-232.........................69

Table 12: Jumper Configuration for the First RS-232 Interface................70

Table 13: Improper Jumper Settings for DB-9 Socket P1A as

First RS-232 ...............................................................................71

Table 14: Jumper Configuration for the Second RS-232 Interface............72

Table 15: Improper Jumper Settings for DB-9 Socket P1A as

Second RS-232...........................................................................73

Table 16: Jumper Configuration for CAN Plug P2A Using the

CAN Transceiver on the phyCORE-TC1775 ............................74

Table 17: Jumper Configuration for CAN Plug P2A Using the

CAN Transceiver on the Development Board...........................75

Table 18: Jumper Configuration for CAN Plug P2A Using the

CAN Transceiver on the Development Board with

Galvanic Separation ...................................................................76

Table 19: Jumper Configuration for CAN Plug P2B Using the

CAN Transceiver on the phyCORE-TC1775 ............................77

Table 20: Jumper Configuration for CAN Plug P2B Using the

CAN Transceiver on the Development Board...........................78

Table 21: Jumper Configuration for CAN Plug P2B Using the

CAN Transceiver on the Development Board with

Galvanic Separation ...................................................................79

phyCORE-TC1775

©PHYTEC Messtechnik GmbH 2006 L-538e_3

Table 23: JP29, JP30 Configuration of the Ethernet Interface.................. 80

Table 24: JP17 Configuration of the Programmable LED D3.................. 80

Table 25: Pin Assignment Data Bus for the phyCORE-TC1775 /

Development Board / Expansion Board (Class B Pins

Nominal 2.5 V, 3.3 V Tolerant)................................................. 83

Table 26: Pin Assignment Address Bus for the phyCORE-TC1775 /

Development Board / Expansion Board (Class B Pins

Nominal 2.5 V, 3.3 V Tolerant)................................................. 84

Table 27: Pin Assignment Port P3, P4, P5 Dedicated Port Pins on the

phyCORE-TC1775/ Development Board / Expansion Board

(Class B Pins Nominal 2.5 V, 3.3 V Tolerant) .......................... 85

Table 28: Pin Assignment Analog Ports P6, P7 for the

phyCORE-TC1775 / Development Board /

Expansion Board (Maximum Voltage 5 V)............................... 86

Table 29: Pin Assignment Analog Ports P8, P9 for the

phyCORE-TC1775 / Development Board /

Expansion Board (Class A Pins Nominal 3.0 V to 5.25 V)....... 87

Table 30: Pin Assignment Analog Ports P10, P11 for the

phyCORE-TC1775 / Development Board /

Expansion Board (Class A Pins Nominal 3.0 V to 5.25 V)....... 88

Table 31: Pin Assignment Analog Ports P12, P13 for the

phyCORE-TC1775 / Development Board /

Expansion Board (Class A Pins Nominal 3.0 V to 5.25 V)....... 89

Table 32: Pin Assignment Interface Signals for the

phyCORE-TC1775 / Develop. Board / Expansion Board

(Level According to Signal Type) ............................................. 90

Table 33: Pin Assignment Control & Misc. Signals for the

phyCORE-TC1775 / Development Board /

Expansion Board........................................................................ 90

Table 34: Freely Configurable Pins on the Optional PLD at U16............. 90

Table 35: Pin Assignment Power Supply for the phyCORE-TC1775 /

Development Board / Expansion Board .................................... 91

Table 36: Unused Pins on the phyCORE-TC1775 /

Development Board / Expansion Board .................................... 91

Table 37: JP16 Jumper Configuration for Silicon Serial Number Chip.... 92

Table of Contents

©PHYTEC Messtechnik GmbH 2006 L-538e_3

Table 38: Activating the Wiggler...............................................................96

phyCORE-TC1775

©PHYTEC Messtechnik GmbH 2006 L-538e_3

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