Texas Instruments ADS8372EVM Manuel utilisateur

User's GuideSLAU160 – July 2005

ADS8372EVM

This user's guide describes the characteristics, operation, and use of the ADS837216-bit, 600 kHz, high speed, serial interface Analog-to-Digital converter EvaluationBoard (EVM). A complete circuit description, schematic diagram, and bill of materialsare included.

The following related documents are available on the TI web site at www.ti.com .

Data Sheets: Literature Numbers:ADS8372 SLAS451REF1004C-2.5 SBVS002SN74AHC1G125 SCLS377THS4131 SLOS318OPA627AU SBOS165

Contents1 EVM Overview ............................................................................................................... 22 Analog Interface .............................................................................................................. 23 Digital Interface .............................................................................................................. 44 Power Supplies .............................................................................................................. 55 Using the EVM ............................................................................................................... 56 ADS8372EVM Bill Of Materials ............................................................................................ 78 Board Layers ................................................................................................................. 99 Schematics .................................................................................................................. 11

List of Figures

1 Input Buffer Circuit ........................................................................................................... 32 Top Layer ..................................................................................................................... 93 Power Plane .................................................................................................................. 94 Ground Plane ............................................................................................................... 105 Bottom Layer ................................................................................................................ 10

List of Tables

1 Analog Input Connector ..................................................................................................... 22 Jumper Setting ............................................................................................................... 43 Pinout for Serial Control Connector P2 ................................................................................... 44 Power Supply Test Points .................................................................................................. 55 Power Connector (J3) Pin Out ............................................................................................. 57 ADS8372EVM Bill of Materials ............................................................................................. 7

SLAU160 – July 2005 ADS8372EVM 1

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1 EVM Overview

1.1 Features

2 Analog Interface

2.1 Signal Conditioning

EVM Overview

•Full-featured evaluation board for the ADS8372 16-bit, 600 kHz, single channel, high-speedserial-interface analog-to-digital converter (ADC)•On board signal conditioning•On board reference•Input and output digital buffer

The ADS8372EVM ships with buffer U13 configured in a unity-gain, single-ended to differential outconfiguration. The common-mode voltage pin of the THS4131 is factory set to 2.0 V on the evaluationmodule, and can be adjusted using potentiometer RP1. The potentiometer connects between the output ofreference buffer U3 and ground. The single-ended input signal can be applied at pin-connector P1 pin 2 orvia SMA connectors J2 (non-inverting input). The buffer circuit can be reconfigured for a fully differentialinput by installing resistors R4 and R31 and removing R16. The inverting leg of the differential signal canbe connected to connector P1 pin 1 or SMA connector J1 (inverting input). See Table 1 for the pinout ofthe analog connector, P1. See Section 9 for the EVM schematic diagrams.

The analog-to-digital converter accepts a pseudo-bipolar differential input. A pseudo-bipolar differentialsignal is a differential signal that has a common-mode voltage such that each leg is always equal to orabove zero volts. The common mode voltage should be half the reference voltage. The peak-to-peakamplitude on each input leg can be as large as the reference voltage.

Table 1. Analog Input Connector

Description Signal Name Connector pin# Signal Name Description

Inverting Input –IN P1.1 P1.2 +IN Non-inverting InputReserved N/A P1.3 P1.4 N/A ReservedReserved N/A P1.5 P1.6 N/A ReservedReserved N/A P1.7 P1.8 N/A ReservedPin tied to Ground AGND P1.9 P1.10 N/A ReservedPin tied to Ground AGND P1.11 P1.12 N/A ReservedReserved N/A P1.13 P1.14 N/A ReservedPin tied to Ground AGND P1.15 P1.16 N/A ReservedPin tied to Ground AGND P1.17 P1.18 N/A ReservedReserved N/A P1.19 P1.20 REF+ External Reference Input

It is a recommended practice to buffer the analog input to any SAR-type converter with a high-speed,low-noise amplifier with fast settling time. The amplifier circuit shown in Figure 1 is the buffer circuit usedon the ADS8372EVM. This circuit consists of the THS4131, a high-speed, low-noise, fully differentialamplifier configured as a single-ended in to differential out, unity gain buffer. This circuit was optimized toachieve the AC specifications (i.e., SNR, THD, SFDR, etc.) listed in the ADS8372 data sheet.

The type of input capacitors used in the signal path can make a few decibels of difference in ACperformance. Polypropylene or C0G-type capacitors are recommended for the input signal path.

ADS8372EVM 2 SLAU160 – July 2005

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−

1 F

0.1 F

1 F

0.1 F

VCC

−VCC

2.048 V

1 k

68 pF

C0G

1 k

68 pF

C0G

1 k

VIN

THS4131

25 

6800 pF

C0G

(+) IN

(−) IN

2.2 Reference Voltage

Analog InterfacePolypropylene capacitors cause the least distortion of the input signal and have excellent long-termstability, but are expensive and bulky. C0G ceramic capacitors cost less, come in smaller packages andperform as well as polypropylene capacitors in many applications, but are not as stable over time andtemperature. The 68 pF and 6800 pF capacitors installed on the EVM are low-cost C0G type,manufactured by TDK Corporation.

Figure 1. Input Buffer Circuit

The EVM allows the designer to select internal, on-board, or user-supplied reference-voltage sources. Theinternal reference is a 4.096 V reference voltage generated by the ADS8372 on pin 9. The on-boardreference can be either a REF3040 (U1) or REF1004-2.5 (U14). The EVM ships with the REF1004-2.5installed. The reference amplifier, U3, is set for a gain of 1.6, enabling it to take a 2.5 V input and output4.1 V for use with the converter, or as part of the common-mode voltage circuit for the input buffer (U13).The user-supplied reference voltage is applied to connector P1 pin 20, and can be routed through thereference buffer and filtered, if desired. The EVM allows a number of configurations. Refer to Table 1 forjumper settings, or the full schematic in Section 9 for more information. The common footprint for U14allows users to evaluate this converter with various reference ICs.

The EVM ships with the internal reference tied directly to the reference pin of the converter.

SLAU160 – July 2005 ADS8372EVM 3

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3 Digital Interface

Digital Interface

Table 2. Jumper Setting

Reference Pins/PadsDescriptionDesignator

1-2 2-3

SJP1 Buffer onboard reference (REF1004-2.5) Shorted

(1)

OpenBuffer user supplied reference voltage applied at P1 pin 20. Open ShortedSJP2 Connect external reference directly to SJP4 Shorted

(1)

OpenConnect buffered external reference to SJP4 Open ShortedSJP3 Connect U3 negative supply to ground Shorted OpenConnect U3 negative supply to –VCC Open Shorted

(1)

SJP4 Connect internal reference to REFIN Shorted

(1)

OpenConnect external reference to REFIN Open ShortedSJP5 Connect common-mode voltage to VOCM pin of THS4131 Shorted

(1)

N/AW1 Connect +5VD to BVDD Shorted

(1)

OpenConnect +3.3VD to BVDD Open ShortedW3 Set power down signal (PD) high Shorted N/AW4 Set frame sync signal (FS) high Shorted N/AW5 Set chip select signal (CS) low Shorted

(1)

N/A

(1)

Factory Installed

The ADS8372EVM is designed for easy interfacing to multiple platforms. Samtec plug and socketconnectors provide a convenient dual row header/socket combination at P1 and P2 to plug into prototypeboards or ribbon cable over to user system boards.

The digital input and output signals for the converter is available at connector P2 on the ADS8372EVM,see Table 3 for the connector pinout.

Table 3. Pinout for Serial Control Connector P2

Description Signal Name Connector Pin Signal Name Description

Chip Select CS P2.1 P2.2 N/A ReservedSerial Clock SCLK P2.3 P2.4 DGND GroundReserved N/A P2.5 P2.6 N/A ReservedFrame Sync FS P2.7 P2.8 N/A ReservedReserved N/A P2.9 P2.10 N/A ReservedReserved N/A P2.11 P2.12 N/A ReservedSerial Data Out SDO P2.13 P2.14 N/A ReservedBUSY BUSY P2.15 P2.16 N/A ReservedConvert Start CONVST P2.17 P2.18 DGND GroundPower down PD P2.19 P2.20 N/A Reserved

ADS8372EVM 4 SLAU160 – July 2005

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4 Power Supplies

5 Using the EVM

5.1 Reference Design

Power Supplies

The EVM accepts four power supplies•A differential ( ±) dc supply for the dual-supply op amps. The maximum recommended voltage is ±15Vdc

•A single +5.0 V dc supply for the analog section of the board (A/D + Reference).•A single +5.0 V or +3.3 V dc supply for digital section of the board (A/D + buffers).

There are two ways to provide these voltages. The first is to connect the voltages to the test points listedin Table 4 .

Table 4. Power Supply Test Points

Test Point Signal Description

TP1 +VA Connect +15.0 V dc supply for amplifierTP2 –VA Connect –15.0 V dc supply for amplifierTP3 +BVDD Apply +3.3 V dc or +5.0 V dc. See ADC data sheet for full range.TP4 +AVCC Apply +5.0 V dc

The second is to use the power connector J3, and derive the voltages elsewhere. Table 5 gives the pinoutfor J3. If using this connector, set W1 jumper to connect +3.3VD or +5VD from J3 to +BVDD. Shunt pins1-2 to select +5VD, or pins 2-3 to select +3.3VD as the source for the digital-buffer-voltage supply(+BVDD).

Table 5. Power Connector (J3) Pin Out

Signal J1 Pin Signal

+VA(+15V) 1 2 –VA(–15 V)+5VA 3 4 N/CDGND 5 6 AGNDN/C 7 8 N/C+3.3VD 9 10 +5VD

The ADS8372EVM serves three functions:1. As a reference design2. As a prototype board3. As a software test platform

As a reference design, the ADS8372EVM contains the essential circuitry to showcase the analog-to-digitalconverter. This essential circuitry includes the input amplifier, reference circuit, and buffers. The EVManalog-input circuit is optimized for a 100-kHz input signal; therefore, users may need to adjust theresistor and capacitor values to accommodate higher frequencies. In ac-type applications where signaldistortion is concern, polypropylene or C0G type capacitors are recommended for use in the signal path.

Typical fully-differential amplifiers configured for single-ended in to differential out can distort the signal inan attempt to equalize the input pins. This distortion is specially evident when step inputs are applied.Therefore, users who will be applying a step input to the converter should use discrete amplifiers for thesingle-ended-to-differential conversion of the signal. The Differential Input, Differential Output Configur-ation circuit shown in the Theory of Operation section of the ADS8372 datasheet (literature numberSLAS451) can be used. In applications where the input is continuous, the single amplifier solution usingthe THS4131, can effectively drive the converter inputs.

SLAU160 – July 2005 ADS8372EVM 5

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5.2 Prototype Board

5.3 Software Test Platform

Using the EVM

As a prototype board, the buffer circuit has resistor pads for configuring the input as either single-ended orfully differential input. The input circuit can be modified to accommodate user prototype needs, whether itbe evaluating another differential amplifier or limiting noise for best performance. The analog, power, anddigital connectors can be made to plug into a standard 0.1” breadboard or ribbon cables to interfacedirectly to FPGAs or processors.

As a software test platform, connectors P1 and P2 plug into the serial interface connectors of the 5-6Kinterface card. The 5-6K interface card plugs into the C5000 and C6000 Digital Signal Processor starterkits (DSK). Refer to the 5-6K Interface Card User’s Guide (SLAU104 ) for more information.

ADS8372EVM 6 SLAU160 – July 2005

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6 ADS8372EVM Bill Of Materials

ADS8372EVM Bill Of Materials

The following table contains a complete bill of materials for the ADS8372EVM. The schematic diagram isalso provided for reference. Contact the Product Information Center or email [email protected] forquestions regarding this EVM.

Table 7. ADS8372EVM Bill of MaterialsReference Manufacturer'sQTY Value Footprint Manufacturer DescriptionDesignators Part Number

1 49.9 R1 603 Panasonic - ECG or ERJ-3EKF49R9V RES 49.9 Ω1/16 W 1% 0603 SMDAlternate

1 1.2 k ΩR2 603 Yageo America or 9C06031A1201FKHFT RES 1.20 k Ω1/10 W 1% 0603 SMDAlternate

4 NI R3 R4 R5 R31 805 NOT INSTALLED NOT INSTALLED

8 100 ΩR6 R21 R22 603 Panasonic - ECG or Alter- ERJ-3EKF1000V RES 100 Ω1/16 W 1% 0603 SMDR23 R24 R25 nateR26 R27

1 100 ΩR7 805 Panasonic - ECG or ERJ-6ENF1000V RES 100 Ω1/10 W 1% 0805 SMDAlternate

7 10 k ΩR8 R10 R11 603 Panasonic - ECG or ERJ-3EKF1002V RES 10.0K Ω1/16 W 1% 0603 SMDR12 R13 R32 AlternateR39

1 910 ΩR14 805 Panasonic - ECG or ERJ-6GEYJ911V RES 910 Ω1/8 W 5% 0805 SMDAlternate

3 1 k ΩR15 R16 R17 805 Panasonic - ECG or ERJ-6ENF1001V RES 1.00 k Ω1/10 W 1% 0805 SMDAlternate

1 768 ΩR18 603 Panasonic - ECG or ERJ-3EKF7680V RES 768 Ω1/16 W 1% 0603 SMDAlternate

2 0 ΩR19 R36 603 Panasonic - ECG or ERJ-3GEY0R00V RES ZERO Ω1/16 W 5% 0603 SMDAlternate

2 1 k ΩR28 R29 603 Panasonic - ECG or ERJ-3EKF1001V RES 1.00 k Ω1/16 W 1% 0603 SMDAlternate

1 NI R30 603 NOT INSTALLED NOT INSTALLED

2 24.9 ΩR33 R34 805 Panasonic - ECG or ERJ-6ENF24R9V RES 24.9 Ω1/10 W 1% 0805 SMDAlternate

1 49.9 k ΩR35 805 Panasonic - ECG or ERJ-6ENF4992V RES 49.9 k Ω1/10 W 1% 0805 SMDAlternate

2 0 R37 R38 1206 Panasonic - ECG or ERJ-8GEY0R00V RES 0 Ω1/4 W 5% 1206 SMDAlternate

1 47 µF C1 1206 TDK Corporation or C3216X5R0J476M CAP CER 47 µF 6.3 V X5R 20% 1206Alternate

5 1 µF C2 C3 C4 C5 805 TDK Corporation or C2012X7R1E105K CAP CER 1.0 µF 25 V X7R 0805 T/RC45 Alternate

3 1 µF C6 C7 C44 603 TDK Corporation or C1608X5R1A105KT CAP CER 1.0 µF 10 V X5R 10% 0603Alternate

15 0.1 µF C8 C9 C10 603 TDK Corporation or C1608X7R1E104K CAP CER 0.10 µF 25 V X7R 10% 060C11 C12 C13 AlternateC17 C18 C19C20 C21 C22C23 C26 C28

5 2.2 µF C14 C15 C24 603 TDK Corporation or C1608X5R1A225MT CAP CER 2.2 µF 6.3 V X5R 20% 0603C25 C27 Alternate

5 NI C29 C42 603 NOT INSTALLED NOT INSTALLED

9 0.01 µF C35 C36 C37 603 TDK Corporation or C1608X7R1H103KT CAP CER 10000 pF 50 V X7R 10% 0603C38 C39 C40 AlternateC41 C55 C58

1 10 µF C34 3528 Kemet or Alternate T491B106K016AS CAPACITOR TANT 10 µF 16 V 10% SMD

1 6800 µF C46 C43 C63 805 TDK Corporation or C2012C0G1H682J CAP CER 6800 pF 50 V C0G 5% 0805Alternate

4 10 µF C47 C48 C49 1206 TDK Corporation or C3216X5R1C106KT CAP CER 10 µF 16 V X5R 20% 1206C50 Alternate

4 10 µF C51 C52 C53 6032 Pansonic - ECG or ECS-T1EC106R CAP 10 µF 25 V Tantalum TE SMDC54 Alternate

2 68 pF C32 C33 603 TDK Corporation or C1608C0G1H680J CAP CER 68 pF 50 V C0G 5% 0603Alternate

2 0.01 µF C56 C57 1206 TDK Corporation or C3216X7R1H103KT CAP 10000 pF 50 V CERAMIC X7R 1206Alternate

4 1000 pF C59 C60 C61 603 TDK Corporation or C1608C0G1H102KT CAP CER 1000 pF 50 V C0G 0603 T/RC62 C64 Alternate

2 NI C30 C31 805 NOT INSTALLED NOT INSTALLED 1/10 W 0805 Chip resistor

SLAU160 – July 2005 ADS8372EVM 7

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ADS8372EVM Bill Of Materials

Table 7. ADS8372EVM Bill of Materials (continued)Reference Manufacturer'sQTY Value Footprint Manufacturer DescriptionDesignators Part Number

1 10 k ΩRP1 BOURNS_3296Y Bourns Inc. 3296Y-1-103 POT 10 k Ω3/8" SQ CERM SL MT

4 L1 L2 L3 L4 805 TDK Corporation MMZ2012R601A FERRITE CHIP 600 Ω500 mA 0805

2 NI U1 U2 3-SOT-23 NOT INSTALLED NOT INSTALLED REF3040 50 ppm/ °C, 50 µA in SOT23-3CMOS voltage reference

1 U3 8-SOP(D) Texas Instruments OPA627AU DiFet amplifier

7 U5 U6 U7 U8 5-SOT(DBV) Texas Instruments SN74AHC1G125DBVR Single bus buffer gate/line driver with 3-stateU9 U10 U11 output

1 ADS8372 U12 28-PQFP(QFN) Texas Instruments ADS8372IBRHPT ADS8372 16-bit serial 600 ksps

1 THS4131 U13 8-SOP(D) Texas Instruments THS4131ID High-speed low noise, fully differential I/Oamplifiers

1 REF1004-2.5 U14 8-SOP(D) Texas Instruments REF1004C-2.5 2.5 V Micropower voltage reference

1 3POS_JUMPER W1 3pos_jump Samtec TSW-103-07-L-S 3 Position jumper _ 0.1" spacing

3 2POS_JUMPER W3 W4 W5 2pos_jump Samtec TSW-102-07-L-S 2 Position jumper _ 0.1" spacing

1 SJP2 SJP5 SJP2 NOT INSTALLED NOT INSTALLED Pad 2 position jumper

4 SJP3 SPJ1 SPJ2 SJP3 NOT INSTALLED NOT INSTALLED Pad 3 position jumperSPJ3 SPJ4

2 SMA_PCB_MT J1 J2 SMA_JACK Johnson Components Inc. 142-0701-301 Right angle SMA connector

1 Power supply J3 5x2x0.1_ Samtec SSW-105-22-S-D-VS 0.025" SMT socket - bottom side of PWBSMT_SOCKET

1 Samtec TSM-105-01-T-D-V-P 0.025" SMT plug - top side of PWB

2 10x2x0.1 P1 P2 10x2x0.1_ Samtec SSW-110-22-S-D-VS 0.025" SMT socket - bottom side of PWBSMT_LPUG_

&_SOCKET

2 Samtec TSM-110-01-T-D-V-P 0.025" SMT plug - top side of PWB

10 TP_0.025 TP1 TP2 TP3 test_point2 Keystone Electronics 5000K-ND Test point PC MINI 0.040"D blackTP4 TP5 TP6TP7 TP8 TP11TP12

4 TP_0.25 TP10 TP13 test_point2 Keystone Electronics 5001K-ND Test point PC MINI 0.040"D blackTP9 TP14

ADS8372EVM 8 SLAU160 – July 2005

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8 Board Layers

Board Layers

Figure 2. Top Layer

Figure 3. Power Plane

SLAU160 – July 2005 ADS8372EVM 9

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Board Layers

Figure 4. Ground Plane

Figure 5. Bottom Layer

ADS8372EVM 10 SLAU160 – July 2005

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