NXP Semiconductors Harpoon Manuel utilisateur

Harpoon User's Guide

NXP Semiconductors Document identifier: HRPNUG

User Guide Rev. EAR 2.1.0, 30 June 2022

Contents

Chapter 1 Overview............................................................................................... 3

1.1 Architecture............................................................................................................................... 3

1.2 Hardware resource partitioning................................................................................................. 4

Chapter 2 Building Harpoon Yocto images............................................................6

2.1 i.MX Yocto................................................................................................................................. 6

2.2 Real-time Edge Yocto................................................................................................................6

Chapter 3 Hardware Setup.................................................................................... 7

3.1 i.MX Reference Boards............................................................................................................. 7

3.2 Audio use case hardware..........................................................................................................9

3.3 Industrial use case hardware...................................................................................................12

Chapter 4 Running Harpoon Reference Applications.......................................... 14

4.1 Basic setup..............................................................................................................................14

4.2 Starting Linux kernel................................................................................................................14

4.3 Audio application..................................................................................................................... 15

4.4 Industrial application................................................................................................................19

4.5 rt_latency application...............................................................................................................31

Chapter 5 Known Issues......................................................................................35

Chapter 6 Technical Details on Harpoon Applications.........................................36

6.1 Description...............................................................................................................................36

6.2 Manual build............................................................................................................................ 36

6.3 Starting an RTOS application with Jailhouse.......................................................................... 38

6.4 Developing a Harpoon Application.......................................................................................... 38

Chapter 7 Revision History.................................................................................. 42

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Chapter 1

Overview

This document presents the Harpoon release (EAR) 2.1 for i.MX 8M device family, using the Arm Cortex-A53 processor

(Armv8-A architecture).

Harpoon provides an environment for developing real-time demanding applications on an RTOS running on one (or several)

Cortex-A core(s) in parallel of a Linux distribution, leveraging the 64-bit Arm architecture for higher performance.

The system starts on Linux and the Jailhouse hypervisor partitions the hardware to run both Linux and the guest RTOS in parallel.

The hardware partitioning is configurable and depends on the use case. This release includes an audio application, an industrial

application and a real-time latency measurement application, all available both for FreeRTOS as well as Zephyr (some application

feature limitations exist depending on the selected platform and RTOS).

This release supports the following software and hardware:

• NXP Linux Yocto

— i.MX LF 5.15.32_2.0.0: For more information, see i.MX Yocto Project User's Guide.

— Real-time Edge Rev. 2.3: For more information, see Real-time Edge Yocto Project User Guide.

• i.MX 8M Series

—i.MX 8M Mini LPDDR4 EVKB

—i.MX 8M Nano LPDDR4 EVK

—i.MX 8M Plus LPDDR4 EVK

• Jailhouse hypervisor

• FreeRTOS V10.4.3 kernel

— Cortex-A53 port, uniprocessor

— Guest OS running on Jailhouse cell

• Zephyr RTOS 3.0.0

— Cortex-A53 port, SMP

— Guest OS running on Jailhouse cell

• MCUXpresso SDK 2.11

— GIC, Timer and MMU Cortex-A53 drivers

— CAN, ENET, ENET_QOS, GPT, I2C, SAI, and UART SoC drivers

— Audio Codec drivers

— Phy drivers

• RTOS Applications

— Audio reference application

— Industrial reference application

— Real-time latency measurement application

1.1 Architecture

The following figure shows the architecture of the Harpoon solution.

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Figure 1. Harpoon solution architecture

The i.MX 8M box shows the hardware partitioning between Jailhouse cells.

The boxes in dark orange (group 1) show the main hardware blocks allocated to the Linux OS.

The boxes in blue (group 3) show the main hardware blocks allocated to the RTOS.

The boxes in light orange (group 2) show the main hardware blocks shared between Linux and the RTOS.

Harpoon-apps is the real-time application running on Jailhouse's inmate cell. It is built on top of the FreeRTOS and

MCUXpresso drivers.

1.2 Hardware resource partitioning

Jailhouse hypervisor is used to run an RTOS in parallel with Linux: FreeRTOS and Zephyr are supported in this release.

Jailhouse is a simple hypervisor that assigns hardware resources to a guest OS instead of virtualising them. For instance, a CPU

core is statically assigned to a specific guest and is not shared with other guests.

In Jailhouse terms, the RTOS (inmate) runs in a cell. A configuration file describes which hardware resources are assigned to this

cell. This configuration file contains descriptions of the following:

• CPU cores assigned to the cell

• Interrupt lines assigned to the cell

• Memory regions assigned to the cell

• Virtual PCI devices used for communication between cells

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There is also a root cell configuration that describes the hardware prior to the hardware partitioning.

The source files of the cell configurations are embedded through patches in the Jailhouse recipe of the Harpoon meta-layer, at

the following locations:

•configs/arm64/imx8m*-freertos.c for the FreeRTOS rt_latency use case’s cell configuration

•configs/arm64/imx8m*-zephyr.c for the Zephyr rt_latency use case’s cell configuration

•configs/arm64/imx8m*-freertos-audio.c for the FreeRTOS audio use case’s cell configuration

•configs/arm64/imx8m*-zephyr-audio.c for the Zephyr audio use case’s cell configuration

•configs/arm64/imx8m*-freertos-industrial.c for the FreeRTOS industrial use case’s cell configuration

•configs/arm64/imx8m*-zephyr-industrial.c for the Zephyr industrial use case’s cell configuration

•configs/arm64/imx8m*.c for the root cell configuration

The CPU core allocated to the RTOS forms a bitmap in the cpu structure. Here, CPU core 3 is assigned to the cell:

.cpus = {

0b1000,

For a multicore (SMP) cell, two cores can be used, for instance:

.cpus = {

0b1100,

Memory regions assigned to the inmate cell are listed in the mem_regions structure. Memory regions can be reserved for the

inmate cell or shared with the Linux root cell.

Memory regions can be DDR chunks for the inmate cell use as well as device memory mapped regions such as UART or SAI.

Interrupts are mapped to the cell with the irqchips structure.

Virtual PCI devices are defined with the pci_devices structure. These virtual devices are used by Jailhouse to implement

IVSHMEM v2 communication channels.

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Chapter 2

Building Harpoon Yocto images

As mentioned in the overview section, Harpoon is compatible with both i.MX Yocto and Real-time Edge Yocto. Each distribution

is addressed in a separate section below.

2.1 i.MX Yocto

To build this release, fetch its Yocto manifest and get the meta-layers:

$ mkdir yocto

$ cd yocto

$ repo init -u https://source.codeaurora.org/external/imx/imx-manifest -b imx-linux-hardknott -m

imx-5.15.35-2.0.0_harpoon-v2.xml

$ repo sync

Then, prepare the environment with the following command:

$ DISTRO=fsl-imx-xwayland MACHINE=<machine> source imx-harpoon-setup-release.sh -b build.<machine>

Where, <machine> is one of the following:

•imx8mm-lpddr4-evk for i.MX 8M Mini EVKB board

•imx8mn-lpddr4-evk for i.MX 8M Nano EVKB board

•imx8mp-lpddr4-evk for i.MX 8M Plus EVK board

The end user license agreement must be accepted to continue.

Then build the image with the following command:

$ bitbake imx-image-core

The image is then available in subdirectory tmp/deploy/images/<machine>/.

Copy the disk image to a micro-SD card. For example, assuming the card is recognized as /dev/mmcblk0 by your host machine:

$ bzip2 -d -c imx-image-core-<machine>.wic.bz2 | sudo dd of=/dev/mmcblk0 bs=1M

The micro-SD card now contains the release.

2.2 Real-time Edge Yocto

Please refer to the Real-time Edge Yocto Project User Guide to build Harpoon and prepare an SD card for supported boards.

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Chapter 3

Hardware Setup

3.1 i.MX Reference Boards

This Harpoon release supports the following development boards:

[1]

Figure 2. i.MX 8M Mini EVK

[1] https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/evaluation-kit-for-the-i

mx-8m-mini-applications-processor:8MMINILPD4-EVK

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[2]

Figure 3. i.MX 8M Nano EVK

[3]

Figure 4. i.MX 8M Plus EVK

[2] https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/evaluation-kit-for-the-i

mx-8m-nano-applications-processor:8MNANOD4-EVK

[3] https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/i-mx-8m-plus-evaluation

kit-enabling-power-measurement:8MPLUSLPD4-PEVK

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3.2 Audio use case hardware

Harpoon's audio application uses the I2S HiFiBerry audio card

DAC+ ADC Pro

[4]

Figure 5. HiFiBerry DAC+ ADC Pro (picture from HiFiBerry's website)

The HiFiBerry DAC+ ADC Pro is an audio card designed for the Raspberry Pi, but it can be connected to EVK boards using the

40-pin connector, provided a few adaptations are made.

The following pins on the EVK's 40-pin connector must be connected to the following HiFiBerry's pins:

Table 1. EVK - HiFiBerry transposition

EVK HiFiBerry Function

2 2 5V

3 3 I2C SDA

5 5 I2C SCK

6 6 GND

35 40 I2S TX

36 12 I2S clock

37 35 I2S word select for RX and TX

38 38 I2S RX

[4] https://www.hifiberry.com/shop/boards/hifiberry-dac-adc-pro/

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Figure 6. Handmade transposer

A complete setup, with a handmade transposer to respect above pinout, is shown as follows.

Figure 7. i.MX 8M Mini EVK with HiFiBerry audio card

The audio card has both an ADC (PCM1863) to record audio and a DAC (PCM5122) for audio playback.

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