Intel Cougar Canyon 2 Instructions de montage

3rd Generation Intel®Core™

Processor with Mobile Intel®

HM76/QM77 Express Chipset

Customer Reference Board

Platform Guide

September 2014

Document Number: 331208-001

Introduction

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3rd Gen Intel®Core™ Processors with Mobile Intel®HM76/QM77 Express Chipsets

Platform Guide September 2014

2Document Number: 331208-001

Introduction

Contents

1Introduction...................................................................................................... 5

1.1 Purpose................................................................................................. 5

1.2 Intended Audience.................................................................................. 5

1.3 Related Documents................................................................................. 5

1.4 Conventions........................................................................................... 5

1.5 Acronyms and Terminology...................................................................... 6

2Intel®3rd Generation Intel®Core™ Processor with Mobile Intel®HM76/QM77 Express

Chipset Hardware Platform ................................................................................. 7

2.1 Intel®Firmware Support Package ............................................................. 8

3Customer Reference Board ................................................................................. 9

4Example Boot Loader ........................................................................................11

4.1 Example Boot Loader Design...................................................................11

4.2 Boot Loader Development Environment ....................................................11

4.3 Preparing the Coreboot Build Environment................................................12

5Building the Example Boot Loader.......................................................................13

6Updating the Firmware......................................................................................15

6.1 Programming the Firmware.....................................................................15

6.1.1 Connecting the SF100 to the Reference Platform ..........................16

6.2 Creating a Firmware Backup....................................................................19

6.3 Replacing the SPI-0 Contents..................................................................20

6.4 Programming a Boot Loader Firmware Image in SPI-1................................21

6.4.1 If Boot Loader Image Is Less Than 8 MB......................................22

6.5 Booting the Example Boot Loader ............................................................22

7Creating Custom Images ...................................................................................24

7.1 Edit Coreboot Image Specifications ..........................................................24

7.2 Binary Configuration Tool........................................................................24

Figures

Figure 1. Hardware Platform ................................................................................................... 8

Figure 2. Customer Reference Board Block Diagram................................................................... 9

Figure 3. Serial Port Location .................................................................................................10

Figure 4. SF100 Programmer .................................................................................................15

Figure 5. DediProg* Cable......................................................................................................16

Figure 6. CRB Headers and Jumpers........................................................................................17

Figure 7. J2E1 Header Location ..............................................................................................18

Figure 8. Jumper Locations ....................................................................................................19

Figure 9. Power (Top) and Reset Buttons.................................................................................22

3rd Gen Intel®Core™ Processors with Mobile Intel®HM76/QM77 Express Chipsets

September 2014 Platform Guide

Document Number: 331208-001 3

Introduction

Revision History

Date Revision Description

September 2014 001 Initial release.

3rd Gen Intel®Core™ Processors with Mobile Intel®HM76/QM77 Express Chipsets

Platform Guide September 2014

4Document Number: 331208-001

Introduction

1Introduction

1.1 Purpose

The purpose of this document is to provide information about the 3rd Generation

Intel®Core™ Processor with Mobile Intel®HM76/QM77 Express Chipset Customer

Reference Board (CRB) code named Cougar Canyon 2 (hereafter referred to as "the

CRB"), with guidance for building an example boot loader for the CRB that is based on

the Intel®Firmware Support Package (FSP).

1.2 Intended Audience

This document is targeted at all platform and system developers who intend to use an

FSP-based boot loader for the firmware solution for their overall design. This group

includes, but is not limited to, system BIOS developers, boot loader developers, and

system integrators.

1.3 Related Documents

•Intel®Firmware Support Package: Introduction Guide – available at

http://www.intel.com/fsp

•3rd Generation Intel®Core™ Processor with Mobile Intel®HM76/QM77 Express

Chipset Integration Guide – included in the corresponding FSP kit – available at

http://www.intel.com/fsp

•Binary Configuration Tool for Intel®Firmware Support Package – available at

http://www.intel.com/fsp

1.4 Conventions

To better illustrate some of its points, this document may provide code snippets. Such

code snippets follow the GNU C Compiler and GNU Assembler syntax.

3rd Gen Intel®Core™ Processors with Mobile Intel®HM76/QM77 Express Chipsets

September 2014 Platform Guide

Document Number: 331208-001 5

Introduction

1.5 Acronyms and Terminology

AMT Advanced Management Technology

AVT Advanced Vector Extensions

BCT Binary Configuration Tool

BSP Boot Strap Processor

BWG BIOS Writer’s Guide

CRB Customer Reference Board

DMI Direct Media Interface

FDI Flexible Display Interface

FSP Firmware Support Package

FSP API Firmware Support Package Application Programming Interface

ME Management Engine

FWG Firmware Writer’s Guide

PCD Platform Configuration Database

PCH Platform Controller Hub

SMI System Management Interrupt

SMM System Management Mode

SMRAM System Management RAM

SPI Serial Peripheral Interface

TSEG Top Segment, a reserved segment of memory at the top of its address space to

be used as SMRAM

3rd Gen Intel®Core™ Processors with Mobile Intel®HM76/QM77 Express Chipsets

Platform Guide September 2014

6Document Number: 331208-001

Intel® 3rd Generation Intel® Core™ Processor with Mobile Intel® HM76/QM77 Express Chipset

Hardware Platform

2Intel®3rd Generation Intel®

Core™ Processor with Mobile

Intel®HM76/QM77 Express

Chipset Hardware Platform

The CRB is based on the Intel®3rd Generation Intel®Core™ Processor with Mobile

Intel®HM76/QM77 Express Chipset Hardware platform, code named Chief River

(hereafter referred to as "the hardware platform"). The hardware platform is built on

22 nm process technology.

Some of the features of the hardware platform are the following:

•Integrated graphics

•Low power consumption

•PCIe* Gen 3.0 Graphics (PEG) port

•Flexible display interface

•Full integration of CPU, GPU, and memory controller

•Proactive security and manageability with Intel®Advanced Management

Technology (Intel® AMT) 8.0

•Intel®Advanced Vector Extensions (Intel®AVX v1.0)

Figure 1 illustrates the hardware platform’s major components.

3rd Gen Intel®Core™ Processors with Mobile Intel®HM76/QM77 Express Chipsets

September 2014 Platform Guide

Document Number: 331208-001 7

Intel® 3rd Generation Intel® Core™ Processor with Mobile Intel® HM76/QM77 Express Chipset

Hardware Platform

Figure 1. Hardware Platform

2.1 Intel®Firmware Support Package

An Intel®Firmware Support Package (FSP) is a firmware component provided in

binary form that contains initialization code for a specific Intel platform. Engineers

building systems that are based on a particular platform can integrate the

corresponding FSP with the boot loader of their choice.

The FSP for the hardware platform handles the initialization of the processor, memory,

and the Platform Controller Hub (PCH) for hardware designs based on this hardware

platform.

3rd Gen Intel®Core™ Processors with Mobile Intel®HM76/QM77 Express Chipsets

Platform Guide September 2014

8Document Number: 331208-001

Customer Reference Board

3Customer Reference Board

The CRB is based on the hardware platform as illustrated in Figure 2.

Figure 2. Customer Reference Board Block Diagram

Note: The CRB provides both a serial console and graphics output capabilities. If you are

developing a boot loader for which all user interaction is performed through the serial

console, use the DB-9 serial port located on the back edge of the board, directly above

the VGA port, as illustrated in Figure 3.

3rd Gen Intel®Core™ Processors with Mobile Intel®HM76/QM77 Express Chipsets

September 2014 Platform Guide

Document Number: 331208-001 9

Customer Reference Board

Figure 3. Serial Port Location

Connect a null modem cable between a development host system and the board.

The default serial communication parameters for the serial console are as follows:

•115,200 baud

•8-N-1 bit configuration

•No flow control

3rd Gen Intel®Core™ Processors with Mobile Intel®HM76/QM77 Express Chipsets

Platform Guide September 2014

10 Document Number: 331208-001

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