Analog Devices EVAL-AD5761RSDZ Manuel utilisateur

EVAL-AD5761RSDZ User Guide

UG-1151

One Technology Way •P. O. Box 9106 •Norwood, MA 02062-9106, U.S.A. •Tel: 781.329.4700 •Fax: 781.461.3113 •www.analog.com

Evaluating the AD5761R 16-Bit Serial Input, Voltage Output DAC

with Single/Dual Supply

PLEASE SEE THE LAST PAGE FOR AN IMPORTANT

WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 17

FEATURES

Fully featured evaluation board for the AD5761R with the

ADP5070 power solution

Power solution generated from single 3 V supply

PC control in conjunction with the Analog Devices, Inc.,

EVAL-SDP-CB1Z SDP-B

PC software for control

GENERAL DESCRIPTION

This user guide supports the EVAL-AD5761RSDZ evaluation

board, Revision D. The UG-751 user guide supports previous

revisions of the evaluation board.

The EVAL-AD5761RSDZ is a fully featured evaluation board that

allows the user to easily evaluate all the features of the AD5761R

16-bit, voltage output digital-to-analog converter (DAC). The

AD5761R pins are accessible at on-board connectors for external

connection. The evaluation board can be controlled by two means:

via the on-board peripheral module (PMOD) connector (J5), or

via the system demonstration platform (SDP) connector (J1).

The evaluation board also integrates a power solution utilizing

the ADP5070 switching regulator and linear regulators (ADP7142,

ADP7182) to generate a bipolar supply of up to −13 V and +23.2 V

from a single supply as low as +3 V. The 3 V input voltage is

supplied with a linear power supply via the on-board connector

(PVIN_3V–15V), through the USB port connector (USB_

POWER), or from the SDP-B controller board. The bipolar supply

generated by the power solution allows the DAC to operate in any

of the available eight different output ranges. Alternatively, the

DAC can be supplied with a linear power supply via the on-board

connector (J4).

The EVAL-SDP-CB1Z SDP-B board allows the EVAL-

AD5761RSDZ to be controlled through the USB port of a

Windows® based PC featuring Windows XP or later, using the

AD5761R evaluation software.

The AD5761R is a single channel, 16-bit serial input, voltage output

DAC. The device operates from single supply voltages from

+4.75 V up to +30 V, or dual supply voltages from −16.5 V to

0 V (VSS) and +4.75 V to +16.5 V (VDD). The nominal full-scale

output range is software or hardware selectable. The integrated

output amplifiers, reference buffers, and power-up/power-down

control circuitry provide an easy to use, universal solution.

Complete specifications for the AD5761R are available in the

AD5761R data sheet, which should be consulted in conjunction

with this user guide when using this evaluation board.

EVALUATION BOARD PHOTOGRAPH

16044-001

Figure 1.

UG-1151 EVAL-AD5761RSDZ User Guide

Rev. 0 | Page 2 of 17

TABLE OF CONTENTS

Features .............................................................................................. 1

General Description......................................................................... 1

Evaluation Board Photograph......................................................... 1

Revision History ............................................................................... 2

Evaluation Board Hardware............................................................ 3

Power Supplies and Default Link Options ................................ 3

Power Solution (ADP5070)—Single-Supply Option............... 4

Bench Power Supply—Dual-Supply Option............................. 4

On-Board Connectors ..................................................................6

Evaluation Board Software...............................................................7

Software Installation .....................................................................7

Software Operation.......................................................................7

Main Window ................................................................................7

Evaluation Board Schematics and Artwork................................ 10

Ordering Information.................................................................... 16

Bill of Materials........................................................................... 16

REVISION HISTORY

8/2017—Revision 0: Initial Version

EVAL-AD5761RSDZ User Guide UG-1151

Rev. 0 | Page 3 of 17

EVALUATION BOARD HARDWARE

POWER SUPPLIES AND DEFAULT LINK OPTIONS

The E VA L -AD5761RSDZ evaluation board can be powered

using the on-board ADP5070 from a single voltage. The voltage

sources available are an external single supply via the PVIN_

3V–15V connector, the USB_POWER connector, and a supply

sourced from the SDP-B controller board (LK2 inserted).

Alternatively, the J4 connector can provide power to the board,

instead of the ADP5070, and it is intended for use with well-

regulated bench supplies. See Figure 2 for a functional block

diagram of the evaluation board.

With any of the possible options, set the link options on the

evaluation board for the required operating setup first before

supplying the board.

Each supply is decoupled to the relevant ground plane with

10 µF and 0.1 µF capacitors. Each device supply pin is again

decoupled with a 10 µF and 0.1 µF capacitor pair to the relevant

ground plane.

The analog and digital planes are connected at one location

close to the DAC. To avoid ground loop problems, do not

connect AGND and DGND elsewhere in the system.

Table 1. Quick Start Jumper Configuration for On-Board ADP5070, Bench Supply, and USB Port

Link No. ADP5070 with LDOs ADP5070 Bench Supply with LDOs Bench Supply

LK7 Removed Inserted Not applicable Not applicable

LK8 Removed Inserted Not applicable Not applicable

LK14

Removed

Inserted

LK_AVDD

LK_AVSS A B A B

LK_DVCC A B A B

LK_REF B B B B

LK_VOUT+ B B A A

LK_VOUT- B B A A

AD5761R

REFIN

REFOUT

PVIN_3V-15V

LK7

LK8 ON: –11V

LK8 OFF: –13V

LK7 ON: +21.1V

LK7 OFF: +23.2V

PVIN

PGND

USB_POWER

SDP-B BOARD

CONNECTION

+VD

AGND

–VS

A B

LK8

LK2

+5V

+21V

–11V

+2.5V V

REFIN

REFOUT

ADP5070

ADP7142 ADP7142

LK_DV

LK_V

OUT+

LK_V

OUT–

ADP7142

LK_AV

LK_V

REF

ADP7142

LK_AV

16044-002

Figure 2. Powering the EVAL-AD5761RSDZ Evaluation Board

UG-1151 EVAL-AD5761RSDZ User Guide

Rev. 0 | Page 4 of 17

POWER SOLUTION (ADP5070)—SINGLE-SUPPLY

OPTION

The EVAL-AD5761RSDZ is populated with an ADP5070 switching

regulator. This regulator is preceded by voltage regulators

(ADP7142, ADP7182) that can be bypassed if required. The

supplies generated from the ADP5070 alone or with the addition of

the voltage regulators are −11 V and +21.1 V from a single supply

as low as +3 V. These generated voltages allow the AD5761R to

output any of the eight available ranges within the DAC. Note

that Link LK7 and Link LK8 must be inserted when the voltage

regulators are bypassed to avoid surpassing the absolute

maximum ratings of the AD5761R DAC.

The circuit was designed using the Analog Devices®

ADIsimPower™ toolset, which selects the components and

generates the schematic and bill of materials, and displays the

performance specifications. Visit the ADP5070 product page to

download the design tools.

The ADP5070 requires a minimum voltage supply of 3 V for

correct operation. Following the jumper configuration in Table 1

for the on-board ADP5070 or the ADP5070 with low dropout

regulators (LDOs) options, the board can be supplied in three

alternative ways: external 3 V to 15 V single supply, USB port

supply, and SDP-B controller board supply.

External 3 V to 15 V Single Supply

The EVAL-AD5761RSDZ board is supplied with a voltage in the

range of 3 V to 15 V, via the PVIN_3V–15V connector.

Note that Link LK2 must be removed for the power supply to be

driving the minimum 3 V. Also note that Link LK14 must be

removed to enable both the positive and negative outputs on the

ADP5070. See Table 2 for full link options.

USB Port Supply

The EVAL-AD5761RSDZ is supplied through the USB_POWER

connector via a USB mini-B cable. No extra voltage supplies are

required for the board to operate.

Note that the LK2 link must be removed for the USB port to be

the only supply source. Also note that Link LK14 must be

removed to enable both the positive and negative outputs on the

ADP5070. Refer to Table 2 for full link options.

SDP-B Controller Board Supply

Alternatively, the EVAL-AD5761RSDZ can be supplied with 5 V

coming from the Blackfin® on the SDP-B board.

Note that Link LK2 must be inserted for the 5 V supply to be

available on the EVAL-AD5761RSDZ. Also note that Link LK14

must be removed to enable both positive and negative outputs

on the ADP5070. Refer to Table 2 for full link options.

BENCH POWER SUPPLY—DUAL-SUPPLY OPTION

The EVAL-AD5761RSDZ can be powered using a bench supply

to allow all output voltage ranges of the AD5761R. A headroom

and footroom of at least 1 V is required on the dual supply. It is

important that the voltage across VDD to VSS does not exceed the

absolute maximum rating of 34 V. Otherwise, device reliability

may be affected.

Following the jumper configuration in Table 1 for the bench

supply or bench supply with LDOs options, supply the board

with a dual supply of −Vs = −11 V and +Vs = +21 V via the

J4 connector.

Note that Link LK14 must be inserted to disable both positive and

negative outputs on the ADP5070. This configuration avoids

any possible noise to be coupled to the power solution when a

supply is simultaneously applied to the ADP5070 switching

regulator. Refer to Table 2 for full link options.

EVAL-AD5761RSDZ User Guide UG-1151

Rev. 0 | Page 5 of 17

Table 2. Link Options

Link No. Description

LK2 This link selects the 5 V single voltage from the Blackfin on the SDP-B controller board to supply the ADP5070 switching

regulator.

An inserted link selects the 5 V voltage supply sourced from the SDP-B.

A removed link does not select the 5 V voltage supply sourced from the SDP-B.

LK7 This link selects the voltage measured before the regulation stage (at the V+ test point).

An inserted link selects a voltage of 21.1 V.

A removed link selects a voltage of 23.2 V.

LK8 This link selects the voltage measured before the regulation stage (at the V− test point).

An inserted link selects a voltage of −11 V.

A removed link selects a voltage of −13 V.

LK14 This link selects whether the ENx pins of the ADP5070 are connected to Resistor R40.

An inserted link disables the outputs of the ADP5070 switching regulator and avoids unexpected noise to be coupled to the

power solution.

A removed link enables the outputs of the ADP5070 switching regulator.

LK_AVDD This link selects the voltage source for the positive analog supply, VDD.

Position A selects the source from the positive voltage generated by the ADP5070 and adjusted by an ADP7142 regulator.

Note that Link LK7 must be inserted to avoid surpassing the absolute maximum ratings of the AD5761R DAC.

Position B selects the source from the positive voltage generated by the ADP5070 when the LK_VOUT+ link is shorted to

Position B. If the LK_VOUT+ link is shorted to Position A, the source comes from an externally applied voltage at +VS of J4.

LK_AVSS This link selects the voltage source for the negative analog supply, VSS.

Position A selects the source from the negative voltage generated by the ADP5070 and adjusted by an ADP7182 regulator.

Note that Link LK8 must be inserted to avoid surpassing the Absolute Maximum Ratings of the AD5761R DAC.

Position B selects the source from the negative voltage generated by the ADP5070 when the LK_VOUT− link is shorted to

Position B. If the LK_VOUT− link is shorted to Position A, the source comes from an externally applied voltage at −VS of J4.

LK_DVCC This link selects the source of the digital power supply, DVCC.

Position A selects the source from the positive voltage generated by the ADP5070 and adjusted by an ADP7142 regulator.

Note that Link LK7 must be inserted to avoid surpassing the Absolute Maximum Ratings of the AD5761R DAC.

Position B selects the source from the USB port bus or alternatively from an externally applied voltage at the PVIN_3V–15V

connector.

LK_REF This link selects the source of the external reference voltage.

Position A selects the source from the on-board ADR4525 reference.

Position B selects the source from the voltage applied to the VREFIN/VREFOUT connector.

LK_VOUT+ This link selects the voltage source for the positive analog supply, VDD, at the preregulation stage.

Position A selects the source from the voltage externally applied at +VS of J4.

Position B selects the source from the positive voltage generated by the ADP5070.

LK_VOUT- This link selects the voltage source for the positive analog supply, VSS, at the preregulation stage.

Position A selects the source from the voltage externally applied at −VS of J4.

Position B selects the source from the negative voltage generated by the ADP5070.

SL6 This link selects the ADP5070 VPOS/VNEG start-up sequence control.

An open link selects a manual startup.

Position A selects a sequenced startup.

Position B selects a simultaneous startup.

SL9 This link selects the ADP5070 frequency setting and synchronization input.

An open link and an external clock connected to SYNC_IN synchronizes the switching frequency.

Position A sets the switching frequency to 1.2 MHz.

Position B sets the switching frequency to 2.4 MHz.

SL10 This link selects the ADP5070 driver stage slew rate control.

An open link selects the fastest slew rate.

Position A selects the slowest slew rate.

Position B selects a normal slew rate.

UG-1151 EVAL-AD5761RSDZ User Guide

Rev. 0 | Page 6 of 17

ON-BOARD CONNECTORS

There are eight connectors on the EVAL-AD5761RSDZ, as

shown in Table 3.

Table 3. On-Board Connectors

Connector Function

J1 Connection for the EVAL-SDP-CB1Z SDP-B

board

J4 Supplies AVDD and AVSS externally

J5 Peripheral module (PMOD) connection pins

PVIN_3V–15V Supplies a voltage in the range of 3 V to 15 V

externally

SYNC_IN Switching frequency synchronization

connector

VOUT DAC output connector

VREFIN/VREFOUT Internal reference voltage output and

external reference voltage input connector

USB_POWER USB port connector

PMOD Connector (J5) Pin Configuration and

Descriptions

123456

7 8 9 10 11 12

16044-003

Figure 3. Jumper J5 Pin Configuration

Table 4. Connector J5 Pin Descriptions

Pin No. Description

1 SYNC

2 SDIN/MOSI

3 SDO/MISO

4 SCLK

5 DGND

6 +3.3 V

7 NC1

8 RESET

9 LDAC

10 CLR

11 DGND

12 +3.3 V

1NC means no connection.

EVAL-AD5761RSDZ User Guide UG-1151

Rev. 0 | Page 7 of 17

EVALUATION BOARD SOFTWARE

SOFTWARE INSTALLATION

The AD5761R evaluation kit includes self installing evaluation

software on a CD. The evaluation software is compatible with

Windows XP or later Windows based PCs. If the setup file does

not run automatically, run setup.exe from the CD.

Install the evaluation software before connecting the evaluation

board and SDP-B board to the USB port of the PC to ensure

that the evaluation system is correctly recognized when

connected to the PC.

After installation from the CD is complete, power up the

EVAL-AD5761RSDZ evaluation board as described in the Power

Supplies and Default Link Options section. Connect the SDP-B

board (Connector A) to the evaluation board and then to the USB

port of your PC using the supplied cable.

When the evaluation system is detected, proceed through any

dialog boxes that appear to complete the installation.

SOFTWARE OPERATION

To launch the evaluation software, complete the following steps:

1. From the Start menu, click Analog Devices > AD5761R >

AD5761R Evaluation Software. The main window of the

software opens (see Figure 7).

2. If the evaluation system is not connected to the USB port

when the software is launched, a connectivity error

displays (see Figure 4). Connect the evaluation board to

the USB port of the PC, wait a few seconds, and click

Rescan. Follow the instructions that appear.

16044-004

Figure 4. Connectivity Error Alert

MAIN WINDOW

The main window of the evaluation software is divided into two

tabs: Configure and DAC.

Begin by choosing the device to evaluate: the AD5761R (16-bit

resolution) or the AD5721R (12-bit resolution). Note that clicking

the AD5721R option allows the user to evaluate the AD5761R as a

12-bit DAC; there is no separate evaluation setup for the AD5721R.

A dialog box appears for this selection, as shown in Figure 5.

16044-005

Figure 5. Device Selection

AD5761R Configuration

The Configure tab allows access to the control register and the

mode of the daisy-chain functionality of the device. Figure 7

shows the Configure tab in the main window.

The AD5761R requires an initial command to write to the

control register to remove the output clamp to ground. A dialog

box appears as a reminder to write to the control register (see

Figure 6). During the same write, configure the AD5761R as

necessary to modify the default values for the power-up voltage

(Power Up Voltage), voltage output range (Output Range),

clear voltage (CLEAR Voltage), overrange (OVR), bipolar

range coding (B2C), thermal shutdown alter (ETS), and

internal reference mode (IRO). (See Figure 7.)

16044-006

Figure 6. First Write Reminder

AD5761R DAC

The DAC tab programs the input and DAC registers with a

hexadecimal value entered in the Input Data 16 bit (HEX) field

(see Figure 8). Also available in this tab are the following options:

Hardware Control to modify the RESET PIN, CLR PIN, and

LDAC PIN values; Software Reset options; and Read-back

Input Register and Read-back DAC Register options.

UG-1151 EVAL-AD5761RSDZ User Guide

Rev. 0 | Page 8 of 17

16044-007

Figure 7. Evaluation Software Main Window, Configure Tab

EVAL-AD5761RSDZ User Guide UG-1151

Rev. 0 | Page 9 of 17

16044-008

Figure 8. Evaluation Software Main Window, DAC Tab

UG-1151 EVAL-AD5761RSDZ User Guide

Rev. 0 | Page 10 of 17

EVALUATION BOARD SCHEMATICS AND ARTWORK

R11 0Ω

R13 0Ω

R9 0Ω

R6 0Ω

R8 0Ω

R14 0Ω

R16 0Ω

TP9

TP7

TP3

TP1

TP4

TP6

TP5

ALERT

2CLEAR

3RESET

REFIN

REFOUT

5AGND

OUT

DNC

10 SDO

11 LDAC

12 SDI

13 SYNC

14 SCLK

16 DGND

AD5761RBRUZ

TP10 VREFIN/VREFOUT

C27

0.1µF

+VIN

6VOUT

GND

ADR4525BRZ

TP2 VOUT

TP8

ALERT

C13

0.1µF

C12

10µF

C6 0.1µF

C9 0.1µF

C36

10nF

R41 10kΩ

LK_REF

TP11

TP12

TP13

R19

0Ω

TP14 TP15

R20

1kΩ

R15

0Ω

C10 10µF

C5 10µF

SYNC

SCLK

SDIN

SDO

LDAC

CLR

RESET

DGND

AVDD

AVSS

DVCC

DGND

DVCC

DVCC1

16044-009

Figure 9. Schematic of the AD5761R Circuitry

Table des matières

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