Alinx AV4075 Manuel utilisateur

FPGA Video Processing

Development Platform

AV4075

User Manual

FPGA Video Processing Development Platform AV4075 User Manual

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Version Record

Version

Date

Release By

Description

Rev 1.0

2019-05-01

Rachel Zhou

First Release

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Table of Contents

Version Record.......................................................................................... 2

Part 1: FPGA Development Board Introduction......................................... 6

Part 2: Function realization........................................................................ 8

Part 2.1: Video Input............................................................................8

Part 2.2: Video Output.......................................................................11

Part 3: AC4075 core board...................................................................... 12

Part 3.1: AC4075 Core Board Introduction........................................13

Part 3.2: DDR2 DRAM ......................................................................13

Part 3.3: SPI Flash ............................................................................16

Part 3.4: FPGA Power Supply...........................................................17

Part 3.5: Expansion Ports..................................................................19

Part 3.6: Powe interface on Core Board............................................22

Part 3.7: Crystal oscillator on Core Board .........................................23

Part 3.8: LED Light on Core Board....................................................25

Part 3.9: Structure Diagram...............................................................28

Part 4: Carrier Board ................................................................................29

Part 4.1: Carrier Board Introduction ..................................................29

Part 4.2: VGA Display Interface.........................................................30

Part 4.3: HDMI Output Interface........................................................33

Part 4.4: HDMI Input Interface...........................................................35

Part 4.5: Video input interface...........................................................37

Part 4.6: Gigabit Ethernet Interface...................................................39

Part 4.7: ARM Controller ...................................................................42

Part 4.8: Camera Module Interface ...................................................49

Part 4.9: Expansion Header ..............................................................50

Part 4.10: JTAG Interface..................................................................52

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Part 4.11: Buttons..............................................................................53

Part 4.12: Power Supply....................................................................54

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Professional ALTERA FPGA Video Processing development platform

(module: AV4075) adopts the core board + carrier board mode, which is

convenient for users to use the core board for secondary development.

This FPGA video image processing development platform is derived from

the improvement of our company's ALTERA video development board AX822.

In terms of hardware design, we added HDMI input, Gigabit Ethernet, CMOS

Camera interface and Micro in the original design. This greatly enriches the

functions of the video image processing board, not only satisfies the functions

of FPGA video image processing, but also provides network communication for

video image storage and video images. Therefore, this development platform

can be called "professional" and "all-round". Such a product is very suitable for

students, engineers and other groups engaged in FPGA video image

processing or video image communication and storage.

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Part 1: FPGA Development Board Introduction

The entire structure of the AV4075 FPGA development board is inherited

from our consistent core board + carrier board model. A high-speed inter-board

connector is used between the core board and the carrier board.

The core board is mainly composed of FPGA+ 2DDR2+ FLASH. It

undertakes the core algorithm of video image processing, fully utilizes the

parallel processing capability of FPGA, and the high-speed data reading and

writing between FPGA and DDR2. The bandwidth of the whole system is up to

8.5Gb/s (266.7M*32bit); In addition, DDR2 capacity is up to 2Gbit, which meets

the need for high buffers during video processing. The selected FPGA is the

high-speed FPGA chip of EP4CE75F23C8 of ALTERA CYCLONE IV series.

The FPGA is packaged in BGA484. The FPGA and two DDR2 chips are

connected to form a 32-bit bus width. The communication frequency between

FPGA and DDR2 is 133.3Mhz, and the internal frequency of DDR2 is

266.7Mhz. This high frequency and high bandwidth design fully meets the

needs of four 1080p video processing.

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ALTERA

EP4CE75F23

ARM

DDR2

TW2867

视频

输入

接口

视频

输入

接口

视频

输入

接口

视频

输入

接口

ADV7123

VGA输出

SiI9134

HDMI输出

SiI9013

HDMI输入

RTL8211E

以太网网

口CMOS接口

CP2102

USB UART SD Card

40PIN Connector

DDR2

Figure 1-1-1: The Schematic Diagram of the AV4075

Through this diagram, you can see the interfaces and functions that the

AV4075 FPGA Development Board contains:

4-channel video input

Select Techwell TW2867, can input 4 composite video signals,

PAL/NTSC/SECAM automatic identification, output BT656,

multiplexable bus, FPGA-side demultiplexing, saving IO

1-channel VGA Output

The ADV7123, a three-channel, 10-bit DAC converter from Analog

Devices, supports RGB digital input and VGA output. Supports

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conversion rates up to 240MSPS, up to 1080p@60Hz video image

output

1-channel HDMI Output

Select Silion Image SIL9134 HDMI encoding chip, support up to

1080P@60Hz output, support 3D output.

1-channel HDMI Input

Select Silion Image SIL9013 HDMI decoder chip, support up to

1080P@60Hz input, support different formats of data output

1-channel 10/100M/1000M Ethernet with RJ-45 interface

The Gigabit Ethernet interface chip uses Realtek's RTL8211EG

Ethernet PHY chip to provide network communication services to users.

The RTL8211EG chip supports 10/100/1000 Mbps network

transmission rate;

1-channel CMOS Input

CMOS camera interface, can be connected to ALINX 5 megapixel

OV5640 camera module

On the FPGA carrier board, an ARM chip (STM32F103) is mounted on the

board, and each interface chip and FPGA on the board are configured through

I2C.

Part 2: Function realization

Part 2.1: Video Input

The video development board can input 4 composite video signals through

TW2867, PAL/NTSC/SECAM automatically recognizes and output BT656; or

through SIL9013, can input HDMI video signals; or through CMOS interface,

can input image signals acquired by CMOS camera. Therefore, there are many

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video sources available for development boards, such as:

1)Surveillance cameras

Through the FPGA development board, it is possible to realize

four-channel surveillance camera through the display (VGA/DVI/HDMI

interface, which can realize 1080p) for split-screen display. Our development

board is equivalent to the digital video host in the Figure below.

Figure 2-1-1: Split Screen Display Surveillance cameras

2)Set top box

The video source obtained by connecting the HDMI output of the set-top

box can be used to implement picture-in-picture (PIP) function through FPGA

development platform.

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Figure 2-1-2: Set top box

3)Camera Module

CMOS camera interface, plug in ALINX 30 megapixel camera module or 5

megapixel camera module, real-time display 1080P video image on VGA

display or HDMI display.

Figure 2-1-3: 5 megapixel camera module AN5640

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