VORAGO PEB1 Manuel utilisateur
PEB1 USER MANUAL
Evaluation board for VA416x0 MCU from VORAGO
JUNE 20, 2020
VORAGO TECHNOLOGIES
VA41620/VA41630 Evaluation Board User’s Manual
V1.0
1
Contents
1 Introduction ........................................................................................................................... 2
1.1 Purpose of Document .................................................................................................... 2
1.2 Overview of Hardware and Software components ........................................................ 2
1.3 Key components included on the PEB1 evaluation kit (subject to change depending on
availability). ................................................................................................................................ 2
1.4 PEB1 MCU board component placement diagram ........................................................ 5
1.5 Connector pin assignment table for MCU board ........................................................... 6
1.6 Materials List .................................................................................................................. 7
1.7 Board connectivity ......................................................................................................... 7
1.8 Connector pin assignment table for GPIO board ........................................................... 8
1.9 Support ......................................................................................................................... 13
2 Software Setup ..................................................................................................................... 13
2.1 Required Downloads .................................................................................................... 14
3 Hardware check ................................................................................................................... 17
3.1 Powering up the board ................................................................................................. 17
4 Command line control of the EVK ........................................................................................ 17
4.1 J-Link OB and RTT (Real Time Terminal) ....................................................................... 20
5 Starting an IDE and building a program ............................................................................... 23
5.1 Keil IDE – ....................................................................................................................... 23
5.2 Programming procedure (Keil Specific) ........................................................................ 31
6 Software Development Kit ................................................................................................... 33
6.1 Project organization ..................................................................................................... 33
6.2 CMSIS compatible driver .............................................................................................. 34
6.3 Preprocessor directives ................................................................................................ 34
7 Commonly asked questions ................................................................................................. 35
8 Other resources for VA416x0 code ...................................................................................... 36
9 Revision history .................................................................................................................... 36
VA41620/VA41630 Evaluation Board User’s Manual
V1.0
2
1 Introduction
1.1 Purpose of Document
This document provides instructions on how to use the features of the VORAGO PEB1
evaluation kit (EVK) and provides a working platform for software development for either the
VA41620 or VA41630 MCUs from VORAGO. The VA41630 has an integrated, internal 2Mb NVM
memory device that contains the user’s program loaded into the MCU at boot. In all other
ways, the VA41620 and VA41630 MCU devices are identical.
1.2 Overview of Hardware and Software components
The PEB1 evaluation kit comprises three printed circuit boards.
• The PEB1 MCU board (top board)
• The PEB1 GPIO board
• The PEB1 EBI/Ethernet board
1.3 Key components included on the PEB1 evaluation kit (subject to change depending
on availability).
• The PEB1 MCU board
o VORAGO VA416x0 MCU
o IDT 501MLFT PLL clock multiplier
o Cypress FM25V20A FRAM
o ST Micro STM32F103C4 MCU0
o Three voltage regulators
• The PEB1 GPIO board
o Two TI isolated CAN transceivers
o Cypress FM25V20A FRAM
o ST Micro LIS2DE12TR accelerometer
• The PEB1 EBI/Ethernet board
o Two TI isolated CAN transceivers
o Microchip KSZ8041TL Ethernet PHY
o Cypress CY7C1041GE SRAM
o Cypress FM22L16 FRAM
1.3.1 The PEB1 MCU board
The PEB1 MCU board includes a SEGGER JTAG Probe, the J-Link OB interface. A separate JTAG
debug pod is not required however a dedicated connector is provided if a different tool is
preferred. SEGGER Microcontroller is VORAGO’S preferred supplier of hardware and software
VA41620/VA41630 Evaluation Board User’s Manual
V1.0
3
development tools. The J-Link OB allows the board to be connected directly to the USB port of
a PC to allow:
- Power supplied from the USB 5V source supply
- JTAG communications for debug and programming
- Terminal communications to allow data transfer between a PC terminal window and
the VA416x0 MCU.
A block diagram of the MCU evaluation board is shown in Figure 1. The MCU evaluation board
conveniently stacks on to resource boards for maximum development flexibility. If compact size
is preferred, the MCU board may be used standalone with full JTAG and includes a UART for
background communication.
Figure 1 - Block diagram of PEB1
1.3.2 The PEB1 GPIO board
The PEB1 GPIO board provides additional connectivity to the VA416x0 MCU. Access to all 104
GPIO pins are available on the various convenient headers. Header pins located on the GPIO
board as well provide access to integrated board resources, ADC inputs, DAC outputs, I2C
interfaces, CAN interfaces with transceivers, and a connector for a SpaceWire interface. An
accelerometer is provided on the board as well, with access via one of the three I2C interfaces.
An external SPI accessible FRAM device is also included on the board. Four PMOD connectors
are available for the I2C, UART, and SPI peripherals.
VA41620/VA41630 Evaluation Board User’s Manual
V1.0
4
Figure 2 - Block diagram of PEB1 GPIO board
1.3.3 The PEB1 EBI/Ethernet board
The PEB1 EBI/Ethernet board provides additional connectivity to the VA416x0 MCU. To suit
another example of port expansion, covering a different set of peripherals, the External Bus
Interface (EBI)/Ethernet interface board provides access to 41 GPIO pins as well as access to
ADC inputs, DAC outputs, I2C interfaces, CAN interfaces with transceivers, and a connector to
the SpaceWire interface. Two high speed parallel memory devices, an SRAM and a FRAM are
included. The VA416x0 Ethernet peripheral is connected to an external Ethernet physical layer
transceiver device and an RJ-45 connector.
Figure 3 - Block diagram of PEB1 EBI-Ethernet board
VA41620/VA41630 Evaluation Board User’s Manual
V1.0
5
1.4 PEB1 MCU board component placement diagram
VA41620/VA41630 Evaluation Board User’s Manual
V1.0
6
Figure 2 - Photo of PEB1 MCU board with functional circuits identified
1.5 Connector pin assignment table for MCU board
The schematics for the three boards are included in PEB1 download package. To assist with
quickly finding which pins are tied to the various connectors on the board, the following set of
tables are provided.
Table 1 - PEB1 MCU Board Connector designations
The PLL clock source provided on the MCU board is clocked with a 20MHz crystal oscillator. The
default setting on the board will provide a 40MHz clock input to the MCU. JP8 pins 7 and 8 are
VA41620/VA41630 Evaluation Board User’s Manual
V1.0
7
tied together. Additional jumpers placed on JP8 can configure a different clock frequency for
the MCU as follows.
Table 2 - PEB1 MCU Board Connector designations for clock selection
1.6 Materials List
• PEB1 evaluation boards – Programmed with demonstration program
• 36” Micro USB cable
• Insert card with component placement picture and URL
• 10 jumpers and several wires
1.7 Board connectivity
This photo shows the PEB1 MCU board mounted onto the PEB1 GPIO board. The connection
between these two boards is made by aligning the plastic pins on the lower board with the
holes on the upper board. Similar connectivity is achieved with the PEB1 MCU board and the
PEB1 EBI/Ethernet board.
VA41620/VA41630 Evaluation Board User’s Manual
V1.0
8
1.8 Connector pin assignment table for GPIO board
The GPIO board has two large 0.1in headers, labeled J21 and J22. The connections to the MCU
are as follows.
VA41620/VA41630 Evaluation Board User’s Manual
V1.0
9
Table 3 - PEB1 GPIO Board Connector designations
Table des matières
Autres manuels VORAGO Carte mère
Manuels Carte mère populaires d'autres marques
Telit Wireless Solutions
Telit Wireless Solutions SL869-3DR Manuel utilisateur
Gigabyte
Gigabyte GA-9IVDT Manuel utilisateur
Texas Instruments
Texas Instruments ADS8372EVM Manuel utilisateur
Commell
Commell MS-C73 Manuel utilisateur
IBT Technologies
IBT Technologies MB860 Manuel utilisateur
Nvidia
Nvidia TEGRA DG-04927-001_V01 Manuel utilisateur
