VMIC VMIVME-7487A Manuel utilisateur

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VMIVME-7487A

486 PC/ATVMEbus CPUWITH

DUAL-PORT MEMORY, PC/104,

AND CACHE

PRODUCT MANUAL

DOCUMENT NO. 500-107487-000 C

Revised July 21, 1997

VME MICROSYSTEMS INTERNATIONAL CORPORATION

12090 SOUTH MEMORIAL PARKWAY

HUNTSVILLE, AL 35803-3308

(205) 880-0444

(800) 322-3616

FAX NO.: (205) 882-0859

to be entirely reliable. While all reasonable efforts to ensure accuracy have been taken in the preparation of

this manual,VMIC assumes no responsibility resulting from omissions or errors in this manual, or from the use

of information contained herein.

VMIC reserves the right to make any changes, without notice, to this or any of VMIC’s products to improve

reliability, performance, function, or design.

VMIC does not assume any liability arising out of the application or use of any product or circuit described

herein; nor does VMIC convey any license under its patent rights or the rights of others.

For warranty and repair policies, refer to VMIC’s Standard Conditions of Sale.

AMXbus



, BITMODULE



, COSMODULE



, DMAbus



, IOWorks



, IOWorks Access



, IOWorks

Foundation



, IOWorks man ﬁgure™, IOWorks Manager™, IOWorks Server™, MAGICWARE



MEGAMODULE



, PLC ACCELERATOR (ACCELERATION)



, Quick Link



, Soft Logic Link



, SRTbus



TESTCAL



, “The Next Generation PLC”



, The PLC Connection



, TURBOMODULE



, UCLIO



, UIOD



UPLC



, Visual IOWorks



, Visual Soft Logic Control(ler)™,

VMEaccess



VMEmanager



VMEmonitor



VMEnet



, VMEnet II



, and

VMEprobe



are trademarks of VME Microsystems International Corporation.

The I/O man ﬁgure, UIOC®

the VMIC logo, and

WinUIOC

® are registered trademarks of VME

Microsystems International Corporation.

Microsoft, Microsoft Access, MS-DOS, Visual Basic, Visual C++, Win32, Windows, and XENIX are

registered trademarks and Windows NT is a trademark of Microsoft Corporation.

Pentium is a registered trademark of Intel Corporation.

Other registered trademarks are the property of their respective owners.

VME Microsystems International Corporation

This document shall not be duplicated, nor its contents used for any

purpose, unless granted express written permission from VMIC.

UIOC



(VMIC logo)

WinUIOC



(I/O man figure)

(IOWorks man figure)

VMIVME-7487A Error Notiﬁcation

Because of a recently discovered design ﬂaw in the VIC64 (Cypress

Semiconductor) used to implement the VMEbus interface on the

VMIVME-7487A, VMIC warns users that a malfunction may occur. The

following paragraphs below provide information from Cypress concerning

the conditions that must be present to cause this malfunction.

Cypress Erratum:

The following paragraphs came directly from the 6/13/97 Cypress Erratum (Reference No.95):

Lword and A7-A1 are driven on the VMEbus by a VIC64 slave that is not the addressed slave to the D64

transaction in progress thus corrupting the data of the transaction.The following condition must be met to see

this failure:

1. Deﬁning this misbehaving VIC64 as the “failing slave” and the transaction in which the failure is

noted the “current transaction.”

2. The failing slave was the addressed slave to the transaction immediately preceding the current

transaction.We deﬁne this transaction to be the “preceding transaction.”

3. The preceding transaction was a D64 slave read from the failing slave.

4. The current transaction must be a D64 transaction.

5. The preceding transaction exhibits a local “read ahead” cycle which extends (local PAS+ signal is

asserted) beyond the address broadcast phase (ﬁrst VMEbus DS1/0 deassertion after AS*

assertion) of the current transaction.

Work around, Hardware:

PAS* must be deasserted before DSB (later deassertion of either DS1/0) of the address broadcast cycle of

the current transaction deasserts.

VMIC’s Response:

These conditions may arise if:

1. You have more than one device that may be slave to 64-bit block transfers and at least one has a

VIC64 chip.

2. Block transfer master(s) can reassert AS* and execute a BLT 64 Address Broadcast quickly (less

than about 100 ns AS* hightime).

The VIC64 as used on the VMIVME-7487A does not cause trouble during Master Mode. In other words, the

VMIVME-7487A can safely do master BLT 64 transactions under all conditions. The described malfunction

only occurs when the VIC64 is a BLT 64

slave

(read

from/by

master)

and

the slave transaction is rapidly

followed by

another

BLT 64 slave transaction

another slave.

RECORD OF REVISIONS

REVISION

LETTER DATE PAGES INVOLVED CHANGE NUMBER

VME MICROSYSTEMS INT’L CORP.

12090 South Memorial Parkway

Huntsville, AL 35803-3308 • (205) 880-0444

REV LTR PAGE NO.

iii

DOC. NO. 500-107487-000

A 01/25/96 Release 96-0110

B 05/01/96 Cover and Page ii 96-0313

C 07/21/97 Cover and Page iii 97-0538

VMIC

SAFETY SUMMARY

THE FOLLOWING GENERAL SAFETY PRECAUTIONS MUST BE OBSERVED DURING ALL PHASES

OF THE OPERATION, SERVICE, AND REPAIR OF THIS PRODUCT. FAILURE TO COMPLY WITH

THESE PRECAUTIONS OR WITH SPECIFIC WARNINGS ELSEWHERE IN THIS MANUAL VIOLATES

SAFETY STANDARDS OF DESIGN, MANUFACTURE, AND INTENDED USE OFTHIS PRODUCT. VME

MICROSYSTEMS INTERNATIONAL CORPORATION ASSUMES NO LIABILITY FOR THE

CUSTOMER'S FAILURETO COMPLY WITHTHESE REQUIREMENTS.

GROUNDTHE SYSTEM

To minimize shock hazard, the chassis and system cabinet must be connected to an

electrical ground. A three-conductor AC power cable should be used. The power cable

must either be plugged into an approved three-contact electrical outlet or used with a

three-contact to two-contact adapter with the grounding wire (green) ﬁrmly connected to

an electrical ground (safety ground) at the power outlet.

DO NOT OPERATE IN AN EXPLOSIVE ATMOSPHERE

Do not operate the system in the presence of ﬂammable gases or fumes. Operation of

any electrical system in such an environment constitutes a deﬁnite safety hazard.

KEEP AWAY FROM LIVE CIRCUITS

Operating personnel must not remove product covers. Component replacement and

internal adjustments must be made by qualiﬁed maintenance personnel. Do not replace

components with power cable connected. Under certain conditions, dangerous voltages

may exist even with the power cable removed. To avoid injuries, always disconnect

power and discharge circuits before touching them.

DO NOT SERVICE OR ADJUST ALONE

Do not attempt internal service or adjustment unless another person, capable of

rendering ﬁrst aid and resuscitation, is present.

DO NOT SUBSTITUTE PARTS OR MODIFY SYSTEM

Because of the danger of introducing additional hazards, do not install substitute parts or

perform any unauthorized modiﬁcation to the product. Return the product to VME

Microsystems International Corporation for service and repair to ensure that safety

features are maintained.

DANGEROUS PROCEDUREWARNINGS

Warnings, such as the example below, precede only potentially dangerous procedures

throughout this manual. Instructions contained in the warnings must be followed.

DANGEROUS VOLTAGES, CAPABLE OF CAUSING DEATH, ARE PRESENT IN THIS SYSTEM. USE

EXTREME CAUTIONWHEN HANDLING,TESTING, AND ADJUSTING.

WARNING

SAFETY SYMBOLS

GENERAL DEFINITIONS OF SAFETY SYMBOLS USED IN THIS MANUAL

Instruction manual symbol: the product is marked with this symbol when it

is necessary for the user to refer to the instruction manual in order to

protect against damage to the system.

Indicates dangerous voltage (terminals fed from the interior by voltage

exceeding 1000 volts are so marked).

Protective conductor terminal. For protection against electrical shock in

case of a fault. Used with ﬁeld wiring terminals to indicate the terminal

which must be connected to ground before operating equipment.

Low-noise or noiseless, clean ground (earth) terminal. Used for a signal

common, as well as providing protection against electrical shock in case of

a fault. Before operating the equipment, terminal marked with this symbol

must be connected to ground in the manner described in the installation

(operation) manual.

Frame or chassis terminal. A connection to the frame (chassis) of the

equipment which normally includes all exposed metal structures.

Alternating current (power line).

Direct current (power line).

Alternating or direct current (power line).

The WARNING sign denotes a hazard. It calls attention to a procedure, a

practice, a condition, or the like, which, if not correctly performed or

adhered to, could result in injury or death to personnel.

The CAUTION sign denotes a hazard. It calls attention to an operating

procedure, a practice, a condition, or the like, which, if not correctly

performed or adhered to, could result in damage to or destruction of part or

all of the system.

The NOTE sign denotes important information. It calls attention to a

procedure, a practice, a condition or the like, which is essential to highlight.

***************

CAUTION

NOTE:

WARNING

TABLE OF CONTENTS

VMIVME-7487A PRODUCT MANUAL

CHAPTER 1 - INTRODUCTION .................................................1-1

SECTION 1 - INTRODUCTION TO THE VMIVME-7487A .....................1-1

SECTION 2 - ABOUT THIS MANUAL ...................................................1-2

SECTION 3 - PRODUCT FAMILY .........................................................1-3

SECTION 4 - REFERENCES .................................................................1-5

SECTION 5 - PC/AT FEATURES ..........................................................1-6

SECTION 6 - VMEbus FEATURES .......................................................1-8

CHAPTER 2 - INSTALLATION AND SETUP ............................2-1

SECTION 1 - INTRODUCTION ..............................................................2-1

SECTION 2 - UNPACKING PROCEDURES .........................................2-2

SECTION 3 - HARDWARE SETUP .......................................................2-3

SECTION 4 - LED STATUS DEFINITION ..............................................2-5

SECTION 5 - INSTALLATION ...............................................................2-5

SECTION 6 - FRONT PANEL CONNECTORS .....................................2-6

SECTION 7 - PC/104 EXPANSION SITE ..............................................2-7

SECTION 8 - BIOS SETUP ....................................................................2-8

SECTION 9 - CONFIGURING OPERATING SYSTEMS .......................2-8

GENERAL RULE REGARDING OPERATING SYSTEMS

...............2-8

CONFIGURATION EXAMPLES

........................................................2-9

Configuring MS-DOS for the VMIVME-7487A

.............................2-9

Configuring Windows for the VMIVME-7487A

.............................2-10

TABLE OF CONTENTS 500-107487-000

vii

VMIVME-7487A PRODUCT MANUA

CHAPTER 3 - PC/AT FUNCTIONS 1

SECTION 1 - CPU REGISTER MODEL ................................................3-1

SECTION 2 - PHYSICAL MEMORY ......................................................3-2

SECTION 3 - MEMORY AND PORT MAPS ..........................................3-3

MEMORY MAP

.................................................................................3-3

I/O PORT MAP

..................................................................................3-4

SECTION 4 - PC/AT INTERRUPTS .......................................................3-8

SECTION 5 - ENHANCED I/O PORTS ..................................................3-12

SERIAL PORTS

................................................................................3-13

PARALLEL PORT

.............................................................................3-13

SECTION 6 - VIDEO GRAPHICS ADAPTER ........................................3-14

SECTION 7 - PC/104 EXPANSION SITE ..............................................3-15

CHAPTER 4 - VMEbus FUNCTIONS ........................................4-1

SECTION 1 - INTRODUCTION ..............................................................4-1

SECTION 2 - VMEbus INTERFACE ......................................................4-2

VMEbus Interface Overview

..............................................................4-2

VMEbus Interface Hardware

.............................................................4-3

Programming the VMEbus Interface

.................................................4-6

SECTION 3 - VMEbus MASTER OPERATION .....................................4-7

Real Mode Access

............................................................................4-8

Protected Mode Access

....................................................................4-10

500-107487-000 TABLEOFCONTENTS

VMIVME-7487A PRODUCT MANUAL

viii

SECTION 4 - VMEbus SLAVE OPERATION ........................................4-13

Interprocessor Communications

........................................................4-13

Dual-Ported DRAM

............................................................................4-18

Slave Access Memory Map

...............................................................4-21

System Considerations

.....................................................................4-23

SECTION 5 - SYSTEM CONTROLLER FUNCTIONS ...........................4-25

SECTION 6 - VMEbus INTERRUPT HANDLING ..................................4-26

Software Interrupts

............................................................................4-30

Interrupt on BERR*

............................................................................4-30

Periodic Timer Interrupt

.....................................................................4-30

Interrupt Processing

..........................................................................4-31

SECTION 7 - VMEbus INTERRUPTER .................................................4-33

SECTION 8 - VMEbus REQUESTER ....................................................4-34

SECTION 9 - READ-MODIFY-WRITE CYCLES ....................................4-34

SECTION 10 - BLOCK TRANSFERS ....................................................4-36

DRAM Refresh Considerations

.........................................................4-36

Master BLT Operation

.......................................................................4-37

Slave BLT Operation

.........................................................................4-38

SECTION 11 - VME64 FUNCTIONS ......................................................4-39

Master VME64 operation

...................................................................4-39

Slave VME64 operation

.....................................................................4-39

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