Texas Instruments TPS7A54EVM-031 Manuel utilisateur

SBVU056–December 2019

TPS7A54EVM-031 Evaluation Module

User's Guide

SBVU056–December 2019

TPS7A54EVM-031 Evaluation Module

This user’s guide describes the operational use of the TPS7A54EVM-031 evaluation module (EVM) as a

reference design for engineering demonstration and evaluation of the TPS7A54EVM-031, low-dropout

linear regulator (LDO). Included in this user’s guide are setup and operating instructions, thermal and

layout guidelines, a printed-circuit board (PCB) layout, a schematic diagram, and a bill of materials (BOM).

Throughout this document, the terms demonstration kit,evaluation board,EVM, and evaluation module

are synonymous with the TPS7A54EVM-031.

The following related documents are available through the Texas Instruments web site at www.ti.com.

Table 1. Related Documentation

Device Literature Number

TPS7A54-Q1 SBVS312

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Contents

1 Introduction ................................................................................................................... 3

1.1 Before You Begin................................................................................................... 3

2 EVM Setup.................................................................................................................... 4

2.1 Input/Output Connectors and Jumper Descriptions............................................................ 4

2.2 Soldering Guidelines ............................................................................................... 5

2.3 Equipment Connection............................................................................................. 5

3 Operation ..................................................................................................................... 6

4 PCB Layout................................................................................................................... 6

5 Schematic..................................................................................................................... 8

6 Bill of Materials............................................................................................................... 9

List of Figures

1 Top Composite View ........................................................................................................ 6

2 Top Layer Routing........................................................................................................... 6

3 Mid Layer 1 Routing......................................................................................................... 6

4 Mid Layer 2 Routing......................................................................................................... 6

5 Bottom Layer Routing....................................................................................................... 6

6 TPS7A54EVM-031 Schematic............................................................................................. 8

List of Tables

1 Related Documentation..................................................................................................... 1

2 TPS7A54EVM-031 BOM.................................................................................................... 9

Trademarks

All trademarks are the property of their respective owners.

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Introduction

SBVU056–December 2019

TPS7A54EVM-031 Evaluation Module

1 Introduction

Texas Instruments' TPS7A54EVM-031 EVM helps design engineers evaluate the operation and

performance of the TPS7A5401RPS device for possible use in a circuit application. This particular EVM

configuration contains a single low-noise, high-PSRR linear regulator for radar applications. The regulator

is capable of delivering up to 4 A to the load with ultra-low VIN to VOUT dropout voltage. For stability, use

a 47-µF (or larger) output capacitor for the TPS7A54EVM-031.

1.1 Before You Begin

The following warnings and cautions are noted for the safety of anyone using or working close to the

TPS7A54EVM-031. Observe all safety precautions.

Warning Warning Hot surface. Contact may cause burns. Do not touch.

CAUTION

The circuit module may be damaged by overtemperature. To avoid damage,

monitor the temperature during evaluation and provide cooling, as needed, for

your system environment.

CAUTION

Some power supplies can be damaged by application of external voltages. If

using more than one power supply, check your equipment requirements and

use blocking diodes or other isolation techniques, as needed, to prevent

damage to your equipment.

CAUTION

The circuit module is not a finished product or electrical appliance. The module

does not contain current or voltage thresholds for circuit protection. It must be

used by qualified personnel with additional equipment for evaluation only.

EVM Setup

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2 EVM Setup

This section describes how to properly connect and set up the TPS7A54EVM-031, including the jumpers

and connectors on the EVM board.

2.1 Input/Output Connectors and Jumper Descriptions

2.1.1 J1 – VIN

Input power-supply voltage SMA jack connector.

2.1.2 J2 – VIN

Input power-supply voltage standard banana jack connector. Twist together the positive input lead and

ground return lead from the input power supply, and keep them as short as possible to minimize input

inductance. Add additional bulk capacitance between the input supply and ground (use the C1 footprint) if

the supply leads are greater than six inches. For example, an additional 47-µF electrolytic capacitor

connected from the input supply (J1) to ground can improve the transient response of the

TPS7A5401RPS, and eliminates unwanted ringing on the input because of long wire connections.

2.1.3 J3 – EN

Output enable. To enable the output, connect a jumper to short VIN to EN.

2.1.4 J4 – VOUT

Output voltage SMA jack connector.

2.1.5 J5 – PG

Pullup-voltage selector for PG. This EVM is designed so that PG can be pulled up either to VOUT by

shorting J5, or pulled up to another voltage by applying an external voltage to the PG post.

2.1.6 J6 – VOUT

Output voltage standard banana jack connector.

2.1.7 J7 – BIAS

Bias voltage standard banana connector.

If the input supply (VIN) voltage is less than 1.4 V but greater than 1.1 V, use a bias voltage of 3.0 V to

6.5 V to provide power to the TPS7A5401RPS. If the input voltage is greater than 1.4 V, the BIAS pin

does not have to be connected. The BIAS supply pin typically consumes 2.3 mA.

2.1.8 J8 – GND

Input and Bias ground return connector.

2.1.9 J9 – GND

Output ground return connector.

2.1.10 J10 -- GND

Inout and Bias ground return connector.

2.1.11 J11

6 × 1 header, can be used as test points for LDO inputs and outputs.

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EVM Setup

SBVU056–December 2019

TPS7A54EVM-031 Evaluation Module

2.1.12 J12

6 × 1 header, can be used as test points for LDO inputs and outputs.

2.1.13 TP1 – VIN

Input test point.

2.1.14 TP2 – VEN

Input sense test point.

2.1.15 TP3 – PG

PG test point.

2.1.16 TP4 – VOUT

Enable test point.

2.1.17 TP5 – VBIAS

Output test point.

2.1.18 TP6 – GND

Ground sense test point near input.

2.1.19 TP7 – GND

Ground sense test point near output.

2.1.20 TP8 – GND

Ground sense test point near Bias.

2.1.21 TP9 – GND

Ground sense test point.

2.2 Soldering Guidelines

To avoid damaging the integrated circuit (IC), use a hot-air system for any solder rework to modify the

EVM for the purpose of repair or other application reasons.

2.3 Equipment Connection

Use the following steps when connecting the equipment:

1. Set the input and bias power supplies to 6.5 V (maximum), and turn the power supplies off.

2. Connect the positive voltage lead from the input power supply to VIN at the J1 or J2 connector of the

EVM.

3. Connect the ground lead from the input power supply to GND at the J8 connector of the EVM.

4. Connect a 0-A to 4-A load between OUT and GND. The connector used depends on the desired

output current.

5. Disable the output by floating J3.

Operation

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3 Operation

Use the following steps to operate the equipment:

1. Turn on the power supplies.

2. Enable the output by jumping J3 (the EN pin) to VIN.

3. Vary the respective load and input voltage as necessary for test purposes.

4 PCB Layout

Figure 1 to Figure 5 illustrate the PCB layout for this EVM.

Figure 1. Top Composite View Figure 2. Top Layer Routing

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PCB Layout

SBVU056–December 2019

TPS7A54EVM-031 Evaluation Module

Figure 3. Mid Layer 1 Routing Figure 4. Mid Layer 2 Routing

Figure 5. Bottom Layer Routing

VIN

OUT

Vout =3.3 V

Iout Up to 200 mA

GND

TP9

TP7TP6

TP8

TP1

TP3

TP4

TP2

61000218321

10.0k

10nF

C10

GND

47µF

10µF

DNP

10µF

DNP

10µF

DNP

47µF

GND

10uF

16V

C11

DNP

TP5

10µF

DNP

GND

68µF

DNP

68µF

DNP

J10

GND

1.1 V to 6.5 V

3.0 V to 6.5 V

10.0k

GND

BIAS BIAS

GND

3.74k

11.8k

GND

BIAS 5

3FB 9

GND 6

GND 7

GND 12

NR/SS

OUT 10

OUT 11

TPS7A5401RPST

VIN

VOUT

DNP

J11

DNP

J12

DNP

VIN

BIAS

GND GND

VOUT

GND

BIAS

10nF

Schematic

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5 Schematic

Figure 6 is the schematic for this EVM.

Figure 6. TPS7A54EVM-031 Schematic

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Bill of Materials

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TPS7A54EVM-031 Evaluation Module

6 Bill of Materials

Table 2 shows the TPS7A54EVM-031 BOM.

(1) These assemblies are ESD sensitive, observe ESD precautions.

(2) These assemblies must be clean and free from flux and all contaminants. Use of no-clean flux is not acceptable.

(3) These assemblies must comply with workmanship standards IPC-A-610 Class 2.

(4) Unless otherwise noted in the Alternate Part Number or Alternate Manufacturer columns, all parts may be substituted with equivalents.

Table 2. TPS7A54EVM-031 BOM(1)(2)(3)(4)

Designator QTY Value Description Package Reference Part Number Manufacturer Alternate Part

Number Alternate

Manufacturer

!PCB1 1 Printed Circuit Board LP031 Any

C2, C7 2 47 µF CAP, CERM, 47 µF, 10 V, ±20%, X5R, 0805 0805 GRM21BR61A476ME15 MuRata

C9 1 0.01 µF 'CAP, CERM, 0.01 µF, 100 V, ±10%, X7R, 0603 0603 C0603C103K1RACTU Kemet

C10 1 0.01 µF CAP, CERM, 0.01 uF, 50 V, ±5%, X7R, 0805 0805 08055C103JAT2A AVX

J2, J6, J7 3 Standard Banana Jack, Insulated, Red 6091 6091 Keystone

J3, J5 2 Header, 2.54 mm, 2×1, Gold, SMT Header, 2.54 mm, 2×1, SMT 61000218321 Wurth Elektronik

J8, J9, J10 3 Standard Banana Jack, Insulated, Black 6092 6092 Keystone

LBL1 1 Thermal Transfer Printable Labels, 0.650" W × 0.200" H

- 10,000 per roll PCB Label 0.650 × 0.200 in THT-14-423-10 Brady

R1, R2 2 10.0 kΩRES, 10.0 kΩ, 1%, 0.1 W, 0603 0603 CRCW060310K0FKEA Vishay-Dale

R3 1 11.8 kΩRES, 11.8 kΩ, 1%, 0.1 W, 0603 0603 CRCW060311K8FKEA Vishay-Dale

R4 1 3.74 kΩRES, 3.74 kΩ, 1%, 0.1 W, 0603 0603 CRCW06033K74FKEA Vishay-Dale

SH-J1 1 1×2 Shunt, 100 mil, Gold plated, Black Shunt 969102-0000-DA 3M SNT-100-BK-G Samtec

TP1, TP2, TP3,

TP4, TP5, TP6,

TP7, TP8, TP9 9 SMT Test Point, Compact, SMT Testpoint_Keystone_Compact 5016 Keystone

U1 1 Automotive-Grade 4-A, High-Accuracy, Low-Noise, LDO

Voltage Regulator, RGR0020A (VQFN-20) RGR0020A TPS7A5401RPS Texas Instruments

C1, C8 0 68 µF CAP, TA, 68 µF, 16 V, ±10%, 0.2 Ω, SMD 6032-28 TPSC686K016R0200 AVX

C3, C4, C5, C6 0 10 µF CAP, CERM, 10 µF, 16 V, ±10%, X5R, 0805 0805 GRM21BR61C106KE15L MuRata

C11 0 10 µF CAP, CERM, 10 µF, 16 V, ±20%, X5R, 0805 0805 0805YD106MAT2A AVX

FID1, FID2, FID3 0 Fiducial mark. There is nothing to buy or mount. N/A N/A N/A

J9, J10 0 Connector, SMA Jack, Vertical, Gold, SMD SMA 142-0711-201 Cinch Connectivity

J11, J12 0 TH, 6-Leads, Body 608 × 100 mil, Pitch 100 mil PEC06SAAN Sullins Connector Solutions

STANDARD TERMS FOR EVALUATION MODULES

1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or

documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance

with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.

1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility

evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not

finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For

clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions

set forth herein but rather shall be subject to the applicable terms that accompany such Software

1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,

or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production

system.

2Limited Warranty and Related Remedies/Disclaimers:

2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License

Agreement.

2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM

to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by

neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have

been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications

or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control

techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM.

User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)

business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.

2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit

User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty

period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or

replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be

warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day

warranty period.

WARNING

Evaluation Kits are intended solely for use by technically qualified,

professional electronics experts who are familiar with the dangers

and application risks associated with handling electrical mechanical

components, systems, and subsystems.

User shall operate the Evaluation Kit within TI’s recommended

guidelines and any applicable legal or environmental requirements

as well as reasonable and customary safeguards. Failure to set up

and/or operate the Evaluation Kit within TI’s recommended

guidelines may result in personal injury or death or property

damage. Proper set up entails following TI’s instructions for

electrical ratings of interface circuits such as input, output and

electrical loads.

NOTE:

EXPOSURE TO ELECTROSTATIC DISCHARGE (ESD) MAY CAUSE DEGREDATION OR FAILURE OF THE EVALUATION

KIT; TI RECOMMENDS STORAGE OF THE EVALUATION KIT IN A PROTECTIVE ESD BAG.

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