Texas Instruments LP2951EVM Manuel utilisateur

SLVUAS6A–March 2017–Revised January 2018

LP2951EVM

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User's Guide

SLVUAS6A–March 2017–Revised January 2018

LP2951EVM

Contents

1 Introduction ................................................................................................................... 2

2 HW Description .............................................................................................................. 2

3 Setup .......................................................................................................................... 6

4 Thermal Guidelines and Layout Recommendations .................................................................... 8

5 Board Layout ................................................................................................................. 9

6 EVM Schematic............................................................................................................. 10

7 Bill of Materials ............................................................................................................. 11

List of Figures

1 EVM With SON Package and SOIC Pads ............................................................................... 2

2 Input Capacitors C1-C3...................................................................................................... 3

3 Output Capacitors C4-C7.................................................................................................... 3

4 Location for Bypass Capacitor C8......................................................................................... 4

5 R1and R2Used to Set Fixed Voltage Mode on EVM................................................................... 4

6 Resistors R3-R6Used to Set Output Voltage in Adjustable Voltage Mode........................................... 5

7 LP2951 Adjustable Output Voltage Block Diagram ..................................................................... 7

8 EVM With Adjustable Mode Resistors Populated ....................................................................... 8

9 LP2951EVM Board Layout ................................................................................................. 9

10 LP2951EVM Schematic ................................................................................................... 10

List of Tables

1 Compatible Parts and Packages for LP2951EVM....................................................................... 2

2 Shutdown Jumper Position Versus Output............................................................................... 6

3 Bill of Materials ............................................................................................................. 11

Introduction

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LP2951EVM

1 Introduction

The Texas Instruments LP2951EVM helps evaluate the operation and performance of the LP2951 family

of LDOs. The LP2951 family can accommodate a wide input supply-voltage range of up to 30 V.

2 HW Description

This section describes the hardware of the LP2951EVM.

2.1 LP2951 Device

The LP2951EVM comes populated with LP2951-50-Q1 in the SON package. However, this EVM can be

used to evaluate the SOIC package LP2951 device as well. Figure 1 shows the EVM populated with the

SON package and the pads for the SOIC package on the board. Table 1 shows all LP2951 part numbers

and packages that are compatible with the LP2951EVM.

Figure 1. EVM With SON Package and SOIC Pads

Table 1. Compatible Parts and Packages for LP2951EVM

Part Number Packages

LP2951 SOIC (D)

LP2951-30 SOIC (D)

LP2951-33 SOIC (D), SON (DRG)

LP2951-33-Q1 SON (DRG)

LP2951-50 SOIC (D), SON (DRG)

LP2951-50-Q1 SOIC (D), SON (DRG)

LP2951-N SOIC (D)

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HW Description

SLVUAS6A–March 2017–Revised January 2018

LP2951EVM

2.2 Input Capacitors

Capacitors C1-C3are all capacitors routed to the input of the LP2951 device to ground. C2comes

populated on the board, and has a value of 1 µF. C1and C3are pads that allow for additional input

capacitors to be put on the board and can accommodate different capacitor sizes.

Figure 2. Input Capacitors C1-C3

2.3 Output Capacitors

Capacitors C4-C7are all capacitors routed to the Output pin. C4-C6are ceramic caps routed in series with

a 1-Ωresistor, R7, from the output to ground. This series resistance helps stabilize the internal amplifier of

the LP2951 device. See the LP2951 or LP2951-N data sheet for the recommended series resistance

when using a ceramic output capacitor. C5comes populated on the board and has a value of 2.2 µF. C4

and C6are pads that allow for additional output capacitors to be put on the board and can accommodate

different capacitor sizes. C7is meant for an electrolytic capacitor. It is routed directly from the output to

ground with no series resistance, but still functionally the same as C4-C6. Electrolytic Capacitors do not

require an external series resistance as the internal ESR of an electrolytic is typically enough to keep the

device stable.

Figure 3. Output Capacitors C4-C7

HW Description

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LP2951EVM

2.4 Bypass Capacitor

Capacitor C8is meant to give additional stability to the internal amplifier of the LP2951 device by placing

additional capacitance between the Output and the Feedback pins. Stray capacitance to the LP2951

Feedback pin can cause instability. This may especially be a problem when using high value external

resistors to set the output voltage. To fix this problem, populate C8with a 100-pF capacitor and increase

the output capacitor to at least 3.3 µF. See the LP2951 and LP2951-N data sheets for more information

regarding the Cbypass.

Figure 4. Location for Bypass Capacitor C8

2.5 Fixed Output Voltage Resistors

Resistors R1and R2are 0-Ωresistors that keep the output in the fixed output voltage mode when

populated. R1connects the Feedback pin to the VTAP pin, while R2connects the Sense pin and the Output

pin.

Figure 5. R1and R2Used to Set Fixed Voltage Mode on EVM

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HW Description

SLVUAS6A–March 2017–Revised January 2018

LP2951EVM

2.6 Adjustable Output Voltage Resistors

Resistors R3-R6can be populated to set a desired output voltage. To do so, resistors R1and R2must first

be removed. Resistors R4-R6form a voltage divider and can be populated with values based on the

desired output voltage by following the equation on the EVM. R3must be populated with a 0-Ωresistor to

short the Feedback pin of the device to the voltage divider of R4-R6. See Section 3.2.2 for additional

information regarding setting an adjustable output voltage.

Figure 6. Resistors R3-R6Used to Set Output Voltage in Adjustable Voltage Mode

Setup

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LP2951EVM

3 Setup

These sections describe the jumpers and connectors on the EVM as well as how to properly connect,

setup, and use the LP2951EVM.

3.1 Input/Output Connectors and Jumper Description

NOTE: Connectors J1-J3 and J12-J14 are blank SMB connectors. These can be populated, or wires

can be soldered directly to them. The middle connection of the connector is the signal, while

the four edge connections are all ground.

3.1.1 J5 - Input

Input for power. Connect supply to this connector.

3.1.2 J6- Feedback

Determines the output voltage. Connected to VTAP through R1with standard setup.

3.1.3 J7 - ERROR

Error output connector. This active low output determines if the output voltage is within 6% of its expected

value.

3.1.4 J4/J8 - GND

Return path connectors.

3.1.5 J9 - Output

Regulated output voltage connectors.

3.1.6 J10 - Sense

Output voltage sensing connectors.

3.1.7 J11 - Shutdown

Device shutdown connectors. By shorting the middle pin of J11 to the pin labeled as N, the device

remains active. If the middle pin of J11 is shorted to the pin labeled Y, the device will shutdown. See

Table 2 for shutdown jumper position connection.

Table 2. Shutdown Jumper Position Versus Output

Jumper Position Output

N Enabled

Y Disabled

LP2951

ERROR

GND

4 7

8IN

OUT

100 k

R5 R6

+Vin

100 pF 3.3 …F

Vout

1.235V-30V

VRef

1.235V

_______

ERROR

_______

OUT

*SHUTDOWN

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Setup

SLVUAS6A–March 2017–Revised January 2018

LP2951EVM

3.2 Operating Modes

There are two operating modes of the LP2951EVM. Either fixed voltage operation mode, which is what the

EVM is set to out of the packaging, or adjustable voltage mode which the designer can enable.

3.2.1 Fixed Output Voltage Mode

This is the standard way the EVM is populated out of the packaging. For this operation mode the 0-Ω

resistors R1and R2must be populated. Resistor R1shorts the Feedback pin to the Shutdown pin, while R2

shorts the Sense pin to the Output pin. This mode utilizes an internal resistor divider which sets the

voltage of the output to a fixed level. The LP2951 device populated on the EVM has an output of 5 V.

3.2.2 Adjustable Output Voltage Mode

To enable the adjustable voltage mode, the resistors R1and R2must be removed. Resistors R4-R6must

be populated with specific values based on the desired output voltage, while R3 is populated with a 0-Ω

resistor.

The complete equation for the output voltage is:

where

• VREF is the nominal 1.235-V reference voltage and IFB is the Feedback pin bias current,

nominally –20 nA (1)

Figure 7. LP2951 Adjustable Output Voltage Block Diagram

Figure 7 shows the LP2951 device setup in adjustable output voltage mode. The minimum recommended

load current of 1 μA forces an upper limit of 1.2 MΩon the value of R5in parallel with R6, if the regulator

must work with no load (a condition often found in CMOS in standby). IFB produces a 2% typical error in

VOUT which may be eliminated at room temperature by trimming R4. For better accuracy, choosing a

parallel combination of R5with R6= 100 kΩreduces this error to 0.17% while increasing the resistor

program current to 12 µA. Because the LP2951 typically draws 60 µA at no load with pin 2 open-circuited,

this is a small price to pay. Figure 8 shows how the LP2951EVM looks set up in adjustable voltage mode.

Setup

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LP2951EVM

Figure 8. EVM With Adjustable Mode Resistors Populated

3.3 Equipment Connection

• Set power supply to desired input voltage. Verify that the supply is off. Connect positive voltage lead

from supply to the input J5 header. Connect the ground lead from the power supply to GND J4/J8

header.

• Connect desired loading device from Output J9 header to GND J4/J8 header.

• Verify that J11 has the Shutdown pin shorted to the pin labeled N.

3.4 Operation

• Turn on the power supply.

• Vary respective load and input voltage, as necessary, for test purposes.

4 Thermal Guidelines and Layout Recommendations

Thermal management is a key component in the design of any power converter and is especially

important when the power dissipation in the LDO is high. Use Equation 2 to approximate the maximum

power dissipation for the particular ambient temperature:

where

• Where T Jis the junction temperature, TAis the ambient temperature

• PDis the power dissipation in the device (Watts)

•θJA is the thermal resistance from junction to ambient (2)

All temperatures are in degrees Celsius. The maximum operating junction temperature, TJ, must not be

allowed to exceed 125 °C. The layout design must be copper trace. Plane areas smartly, as thermal sinks,

to prevent TJto exceed the absolute maximum rating under all temperature conditions and voltage

conditions across the part.

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Board Layout

SLVUAS6A–March 2017–Revised January 2018

LP2951EVM

5 Board Layout

Figure 9. LP2951EVM Board Layout

LP2951-

50QDRGRQ1

INPUT

VTAP

FEEDBACK

SHUTDOWN

OUTPUT

SENSE

ERROR

_______

GND

0 FEEDBACK

R1 SHUTDOWN

1 …F1 …F 1 …F

C1 C2 C3

INPUT

FEEDBACK

ERROR

LP2951DR

FEEDBACK

OUT

SENSE

VTAP

_______

ERROR

GND

ERROR

0 

SENSE

100 pF

15 k

FEEDBACK 0 

1.80 k39.0 k

R5 R6

47 …F

2.2 …F 2.2 …F 2.2 …F

1.0 

C6 C5 C4

J10

SENSE

J11

INPUT

SHUTDOWN

FEEDBACK

ERROR

OUTPUT

J12

SENSE J13

SHUTDOWN J14

INPUT

SHUTDOWN

OUTPUT

SENSE

VTAP

ERROR

FEEDBACK

SHUTDOWN

EVM Schematic

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LP2951EVM

6 EVM Schematic

Figure 10. LP2951EVM Schematic

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