ST L9679E-EVB Manuel utilisateur

Introduction

The L9679E-EVB evaluation board allows the user to evaluate the L9679E device. The board provides the main input and

output capabilities needed to properly drive the IC.

Evaluation board for L9679E airbag and battery cut-off IC

UM3145

User manual

UM3145 - Rev 1 - March 2023

For further information contact your local STMicroelectronics sales office.

www.st.com

1Hardware description

The L9679E-EVB evaluation board has been developed to allow to the user total access to the pins to simplify the

probing of each signal.

Its main features are:

• L9679E placed into a socket allowing an easy change of the samples.

• Possibility to solder L9679E directly on the PCB.

• Total accessibility to all pins through test points

• L9679E board equipped with the IC external components and jumpers to fix the L9679E setup configuration.

• Motherboard equipped with microcontroller to drive in the most flexible way the L9679E signals.

Figure 1. L9679E-EVB evaluation board with socket

UM3145

Hardware description

UM3145 - Rev 1 page 2/23

Figure 2. L9679E-EVB evaluation board with soldered sample

UM3145

Hardware description

UM3145 - Rev 1 page 3/23

2Board schematics

Figure 3. Board schematic - #1

SR4

330/2W

UAR3

100nF/35V

SR4

SF4

SG45

SS45

SF5

SR5

SR0

SF0

SG01

SS01

SF1

SR1

RSU0

RSU1

VSAT

VSYNC

GNDA

FEN1

FEN2

SATSYNC

RESET_N

TEST

RSU2

RSU3

SR3 25

SF3 26

SS23 27

SG23 28

SF2 29

SR2 30

SR7 31

SF7 32

SS67 33

SG67 34

SF6 35

SR6 36

CVDD 37

GNDD 38

FENL 39

SCLK_RS 40

CS_RS 41

MOSI_RS 42

MISO_RS 43

VCC 44

MISO_G 45

MOSI_G 46

SCLK_G 47

CS_G 48

UAR3

SF4

SG45

SS45

SF5

SR5

SR0

SF0

SG01

SS01

SF1

SR1

RS U1

RS U0

VSAT

VSYNC

GNDA

FE N1

FE N2

S ATS YNC

RE S ET

TES T

RS U2

RS U3

SR3

SF3

SS23

SG23

SF2

SR2

SR7

SF7

SS67

SG67

SF6

SR6

CVDD

GNDD

FENL

SCLK_RS

CS _R S

MOS I_RS

MISO_RS

VCC

MISO_G

MOS I_G

SCLK_G

CS _G

VER

GND

S1B

4700uF/35V

GND

S_ER R1

100/2W

GND

C11

10nF/35V

GND

SS01

C12

10nF/35V

SS67

GND

C14

10nF/35V

GND

C15

10nF/35V

GND

SS23

SS45

VCC

RES ET

J_C_ER

J13

J_SS01

J14

J_SS23

J18

J_SS45

J19

J_SS67

100nF/35V

VSYNC

2.2uF/35V

GND

J_FEN1

J_FEN2

J11

J_FENL

VCC FEN1

FEN2

FENL

C13

100nF/16V

GND

2.2uF/35V

VCC

C18

100nF/25V

GND

C16

2.2uF/35V

VSAT

CVDD

100nF/16V

GND

GNDD

GNDA

GND

SG01

SG23

SG45

SG67

SCLK_RS

MOS I_RS

MISO_R S

CS _R S

FEN1

FEN2

MOS I_G

CS _G

SCLK_G

MISO_G

SATSYNC

TES T

GND

ne ar to pin 37

ne ar to pin 10

ne ar to pin 4 ne ar to pin 33

ne ar to pin 27

GND

GND 1

CON2

VSYNC

VCC

VSAT

J31

VER

GND

EX-PAD 0

SR4

SF4

SG45

SS45

SF5

SR5

SR0

SF0

SG01

SS01

SF1

SR1

RSU0

RSU1

VSAT

VSYNC

GNDA

FEN1

FEN2

SATSYNC

RESET_N

TEST

RSU2

RSU3

SR3 25

SF3 26

SS23 27

SG23 28

SF2 29

SR2 30

SR7 31

SF7 32

SS67 33

SG67 34

SF6 35

SR6 36

CVDD 37

GNDD 38

FENL 39

SCLK_RS 40

CS_RS 41

MOSI_RS 42

MISO_RS 43

VCC 44

MISO_G 45

MOSI_G 46

SCLK_G 47

CS_G 48

UAR3

SR4

SF4

SG45

SS45

SF5

SR5

SR0

SF0

SG01

SS01

SF1

SR1

RS U1

RS U0

VSAT

VSYNC

GNDA

FE N1

FE N2

S ATS YNC

RE S ET

TES T

RS U2

RS U3

EX_PAD

SR3

SF3

SS23

SG23

SF2

SR2

SR7

SF7

SS67

SG67

SF6

SR6

CVDD

GNDD

FENL

SCLK_RS

CS _R S

MOS I_RS

MISO_RS

VCC

MISO_G

MOS I_G

SCLK_G

CS _G

SOCKET DEVICE

J30

FENL

J24

GOUTTE CONTACT

GND

Place to th e 4 corners of the board

C19

100nF/16V

GND

CON15

RES ET

J32

RESET

J35

CON12

J33

CON12

J36 CON12

J34 CON12

Reset

ne ar to pin 16

ne ar to pin 44

ne ar to pin 15

GND

bo ttom layer

ne ar the device

ne ar J31

bo ttom layer

bo ttom layer ne ar the device or socket ne ar the device or socket

ne ar the device or socketne ar the device or socket

CLOSE ONLY ON SOCKETBOARD

UAR3

Figure 4. Board schematic - #2

C26

22nF/35V

R12

3.3

C21

2.2nF/35V

GND

RSU0

C27

22nF/35V

R13

3.3

C22

2.2nF/35V

GND

RSU1

C23

22nF/35V

R14

3.3

C24

2.2nF/35V

GND

RSU2

C28

22nF/35V

R15

3.3

C25

2.2nF/35V

GND

RSU3

L_RSU0

L_RSU1

L_RSU2

L_RSU3

near the device near the device near the device near the device

C29

22nF/35V

GND

J69

J_SQ0

R28

SF0

SR0

C33

22nF/35V

GND

C30

22nF/35V

GND

J70

J_SQ1

R29

SF1

SR1

C34

22nF/35V

GND

C31

22nF/35V

GND

J71

J_SQ2

R30

SF2

SR2

C35

22nF/35V

GND

C32

22nF/35V

GND

J73

J_SQ3

R31

SF3

SR3

C36

22nF/35V

GND

J6 J8 J10 J20

J17

J12

J15

J16

SF0 SF1 SF2 SF3

SR0 SR1 SR2 SR3

near J12

near J15

near J16

near J17

C37

22nF/35V

GND

J83

J_SQ4

R32

SF4

SR4

C41

22nF/35V

GND

C38

22nF/35V

GND

J84

J_SQ5

R33

SF5

SR5

C42

22nF/35V

GND

C39

22nF/35V

GND

J85

J_SQ6

R34

SF6

SR6

C43

22nF/35V

GND

J87

J_SQ7

R35

SF7

SR7

GND

C40

22nF/35V

C44

22nF/35V

J23J22J21 J29

J28

J27

J26

J25

SF4 SF5 SF6 SF7

SR4 SR5 SR6 SR7

near J28

near J27

near J26

near J25

All capacitors and resistors in the bottom side

J5 CON5

GND

UM3145

Board schematics

UM3145 - Rev 1 page 4/23

3Board layout

Figure 5. Assembly Top

RSU

connections

Supply

connections

Eventual different

C_ER connections

VER

connections C_ER

C_ER

discharge

SQUIB

configuration

SQUIB

connections

SQUIB

connections

SQUIB

configuration

In the Figure 5 are identified the following connectors:

• Terminal connectors for power supplies (J31)

• Terminal connectors for Squibs connection (J12, J15, J16, J17, J25, J26, J27, J28)

• Terminal connector for RSUs connection (J5)

• Terminal connector for digital signals (J4)

• Terminal connector for VER (J1)

• Terminal connector to eventually add/change C_ER (J2)

UM3145

Board layout

UM3145 - Rev 1 page 5/23

Figure 6. Assembly Bottom

UM3145

Board layout

UM3145 - Rev 1 page 6/23

4Jumpers and connectors description

In Table 1, the name of each jumper on the board is listed while their default setting (closed or open) is reported in

green; the name of the connectors and test points present on the board is also remarked.

Table 1. Jumpers and connectors description

# Name J = Jumper

C = Connector Function Jumper closed/signal

connection

Jumper open/

signal NOT

connected

Test point

J1 VER C

Connection to the

external VER power

supply

VER line externally

supplied, connected to

VER of L9678, L9679

or L9680(1)

Terminals of J30 are

the test points for

VER supply (J1 side)

or C_ER (C_ER

side)

J2 CON2 C Connection of other

external C_ER

Other external C_ER

connected

No other external

C_ER connected(1) Terminal 1 of J2

J3 J_C_ER J To insert the on board

C_ER (C4)

On board C_ER (C4)

inserted(1)

On board C_ER

(C4) NOT inserted J3 itself

J4 CON15 C

Connections of the

digital signals (from

microcontroller)

Each signal is

connected to

the correspondent

line coming from

microcontroller(1)

Digital signals not

driven Each terminal of J4

J5 CON5 C Connections of RSU

sensors

Each RSUx interface

is connected to

the correspondent

sensor(1)

RSUx interface

NOT connected to

the correspondent

sensor

Each terminal of J5

J6 J Allow deployment with

SF0 shorted to GND SF0 shorted to GND SF0 NOT shorted to

GND The same of SF0 pin

J7 J_FEN1 J

FEN1 driven through

microcontroller or

stuck at VCC

FEN1 fixed at VCC

Do not connect J4-6 if

J7 is closed

FEN1 driven

through

microcontroller (J4-6

connected)(1)

The same of FEN1

J8 J Allow deployment with

SF1 shorted to GND SF1 shorted to GND SF1 NOT shorted to

GND The same of SF1 pin

J9 J_FEN2 J

FEN2 driven through

microcontroller or

stuck at VCC

FEN2 fixed at VCC

Do not connect J4-5 if

J9 is closed

FEN2 driven

through

microcontroller (J4-5

connected)(1)

The same of FEN2

J10 J Allow deployment with

SF2 shorted to GND SF2 shorted to GND SF2 NOT shorted to

GND The same of SF2 pin

J11 J_FENL J

FENL driven through

microcontroller or

stuck at VCC

FENL fixed at VCC

do not connect J4-4 if

J11 is closed

FENL driven

through

microcontroller (J4-4

connected)(1)

The same of FENL

J12 C Connection of Squib0 SF0 and SR0

connected to squib 0(1)

SF0 and SR0 NOT

connected to squib

The same of SF0

and SR0 pins

J13 J_SS01 J Connection of SS01 to

C_ER

SS01 connected to

C_ER(1)

SS01 NOT

connected to C_ER

The same of

SS01pin

J14 J_SS23 J Connection of SS23 to

C_ER

SS23 connected to

C_ER(1)

SS23 NOT

connected to C_ER

The same of

SS23pin

UM3145

Jumpers and connectors description

UM3145 - Rev 1 page 7/23

# Name J = Jumper

C = Connector Function Jumper closed/signal

connection

Jumper open/

signal NOT

connected

Test point

J15 C Connection of Squib1 SF1 and SR1

connected to squib 1(1)

SF1 and SR1 NOT

connected to squib

The same of SF1

and SR1 pins

J16 C Connection of Squib2 SF2 and SR2

connected to squib 2(1)

SF2 and SR2 NOT

connected to squib

The same of SF2

and SR2 pins

J17 C Connection of Squib3 SF3 and SR3

connected to squib 3(1)

SF3 and SR3 NOT

connected to squib

The same of SF3

and SR3 pins

J18 J_SS45 J Connection of SS45 to

C_ER

SS45 connected to

C_ER(1)

SS45 NOT

connected to C_ER

The same of

SS45pin

J19 J_SS67 J Connection of SS67 to

C_ER

SS67 connected to

C_ER(1)

SS67 NOT

connected to C_ER

The same of

SS67pin

J20 J Allow deployment with

SF3 shorted to GND SF3 shorted to GND SF3 NOT shorted to

GND The same of SF3 pin

J21 J Allow deployment with

SF4 shorted to GND SF4 shorted to GND SF4 NOT shorted to

GND The same of SF4 pin

J22 J Allow deployment with

SF5 shorted to GND SF5 shorted to GND SF5 NOT shorted to

GND The same of SF5 pin

J23 J Allow deployment with

SF6 shorted to GND SF6 shorted to GND SF6 NOT shorted to

GND The same of SF6 pin

J24 J Allow to close TEST

pin to GND

TEST pin shorted to

GND(1) TEST pin left open -

J25 C Connection of Squib4 SF4 and SR4

connected to squib 4(1)

SF4 and SR4 NOT

connected to squib

The same of SF4

and SR4 pins

J26 C Connection of Squib5 SF5 and SR5

connected to squib 5(1)

SF5 and SR5 NOT

connected to squib

The same of SF5

and SR5 pins

J27 C Connection of Squib6 SF6 and SR6

connected to squib 6(1)

SF6 and SR6 NOT

connected to squib

The same of SF6

and SR6 pins

J28 C Connection of Squib7 SF7 and SR7

connected to squib 7(1)

SF7 and SR7 NOT

connected to squib

The same of SF7

and SR7 pins

J29 J Allow deployment with

SF7 shorted to GND SF7 shorted to GND SF7 NOT shorted to

GND The same of SF7 pin

J30 J Allow to reduce the

C4 charge current

C4 charge current NOT

limited through R2

C4 charge current

limited through R2(1) Each terminal of j30

J31 C

Connection to the

external VSYNC, VCC

and VSAT power

supply

VSYNC, VCC and

VSAT lines externally

supplied, connected

to VSYNC, VCC and

VSAT of the L9678,

L9679 or L9680(1)

Terminals J34_3,

J33_8 and J34_4

are the test pionts

for VSYNC, VCC

and VSAT power

supplies

J32 J

Allow to keep RESET

signal at VCC or

toggle it through S2

button

RESET permanently at

VCC/toggle (at GND)

through S2

RESET driven

by microcontroller

through J4_2

J32 terminal on

device side or J34_9

UM3145

Jumpers and connectors description

UM3145 - Rev 1 page 8/23

# Name J = Jumper

C = Connector Function Jumper closed/signal

connection

Jumper open/

signal NOT

connected

Test point

J33 CON12 C

Each terminal

J33_1:J33_12

corresponds to the

device pins from 1 to

- -

Each terminal

J33_1:J33_12

corresponds to the

device pins from 1 to

J34 CON12 C

Each terminal

J34_1:J34_12

corresponds to the

device pins from 13 to

- -

Each terminal

J34_1:J34_12

corresponds to the

device pins from 13

to 24

J35 CON12 C

Each terminal

J35_1:J35_12

corresponds to the

device pins from 25 to

- -

Each terminal

J35_1:J35_12

corresponds to the

device pins from 25

to 36

J36 CON12 C

Each terminal

J36_1:J36_12

corresponds to the

device pins from 37 to

- -

Each terminal

J36_1:J36_12

corresponds to the

device pins from 37

to 48

1. Default condition.

UM3145

Jumpers and connectors description

UM3145 - Rev 1 page 9/23

5Supply connections

Power supply connection is reported in Figure 7.

VSAT, that is the main power supply, can be connected to SATBUCK of L9779 or L9680 device; VSYNC can be

connected to SYNCBOOST of L9779 or L9680 device; VCC can be connected to VCCBUCK of L9779 or L9680

device.

Figure 7. Power supply connections

100nF/35V

VSYNC

2.2uF/35V

GND

C13

100nF/16V

GND

2.2uF/35V

VCC

C18

100nF/25V

GND

C16

2.2uF/35V

VSAT

TES T

VSYNC

VCC

VSAT

J31

J24

GOUTTE CONTACT

GND

near to pin 16

near to pin 44

near to pin 15

bottom layer

near the device

near J31

bottom layer

CLOSE ONLY ON SOCKETBOARD

Squib power supply connection, VER, is reported in Figure 8.

VER can be connected to VER of L9779 or L9680 device; in order to be able to sustain deployments, the tank

capacitor can be connected closing J3 - J_C_ER on the board, or an external capacitor can be connected through

J2.

In order to reduce the charge current of the tank capacitor, resistor R2 can be inserted (J30 open). S1 switch

allows to discharge the tank capacitor through R1.

UM3145

Supply connections

UM3145 - Rev 1 page 10/23

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