Silicon Laboratories Si5344-EVB Manuel utilisateur

Si5344-EVB

Si5344 EVALUATION BOARD USER’S GUIDE

Description

The Si5344-EVB is used for evaluating the Si5344 Any-

Frequency, Any-Output, Jitter Attenuating Clock

Multiplier. The Si5344 combines 4th generation DSPLL

and MultisynthTM technologies to enable any-frequency

clock generation for applications that require the highest

level of jitter performance. The Si5344-EVB has 4

independent input clocks and 10 independent output

clocks. The Si5344-EVB can be controlled and

configured using the ClockBuilder ProTM (CBProTM)

software tool

Features

Powered from USB port or external power supply

Onboard 48 MHz XTAL or Reference SMA Inputs

allow holdover mode of operation on the Si5344.

CBProTM GUI-programmable VDD supply allows

device to operate from 3.3, 2.5, or 1.8 V.

CBProTM GUI-programmable VDDO supplies allow

each of the 10 outputs to have its own supply voltage

selectable from 3.3, 2.5, or 1.8 V

CBProTM GUI-controlled voltage, current, and power

measurements of VDD and all VDDO supplies.

Status LEDs for power supplies and control/status

signals of Si5344

SMA connectors for input clocks, output clocks, and

optional external timing reference clock

Si5344 Evaluation Board

Si5344-EVB

2 Rev. 1.0

1. Functional Block Diagram

Below is a functional block diagram of the Si5344-EVB. This EVB can be connected to a PC via the main USB

connector for programming, control, and monitoring. See Section “3. Quick Start” or Section “9. Installing

ClockBuildPro (CBPro) Desktop Software” for more information.

Figure 1. Si5344-EVB Functional Block Diagram

Si5344-EVB

Rev. 1.0 3

2. Si5344 EVB Support Documentation and ClockBulderProTM Software

All Si5344 schematics, BOMs, User’s Guides, and software can be found on-line at the following link:

http://www.silabs.com/products/clocksoscillators/pages/si538x-4x-evb.aspx

3. Quick Start

1. Install ClockBuilderPro™ desktop software: http://www.silabs.com/CBPro

2. Connect a USB cable from the Si5344-EVB to the PC where the software is installed.

3. Leave the jumpers as installed from the factory, and launch the ClockBuilderPro™ software.

4. You can use ClockBuilderPro™ to create, download, and run a frequency plan on the Si5344-EVB.

5. For the Si5344 data sheet go here: http://www.silabs.com/timing

4. Jumper Defaults

Si5340 EVB Jumper Defaults

Location Type I = Installed

0 = Open

Location Type I = Installed

0 = Open

JP1 2 pin I JP14 2 pin O

JP2 2 pin I JP15 2 pin O

JP3 2 pin O JP16 3 pin all open

JP4 2 pin O JP17 3 pin all open

JP5 3 pin 1 to 2 JP18 2 pin O

JP6 2 pin O JP19 2 pin O

JP7 2 pin O JP20 3 pin all open

JP8 2 pin O JP21 3 pin

all open

JP9 2 pin O JP22 2 pin O

JP10 2 pin O JP23 2 pin O

JP11 2 pin O JP24 3 pin all open

JP12 2 pin O

JP13 2 pin O JP17 5x2 Hdr All 5 installed

Note: Refer to the Si5344 EVB Schematics for the functionality associated with each jumper.

Si5344-EVB

4 Rev. 1.0

5. Status LEDs

D11 is illuminated when USB +5V supply voltage is present. D12 and D13 are status LEDs showing on-board MCU

activity.

Figure 2. Status LEDs

Si5340 EVB Status LEDs

Location Silkscreen Color Status Function Indication

D5 INTRB Blue DUT Interrupt

D7 LOLB Blue DUT Loss of Lock

D8 LOSXAXBB Blue DUT Loss of Reference

D11 +5V MAIN Green Main USB +5V present

D12 READY Green MCU Ready

D13 BUSY Green MCU Busy

Si5344-EVB

Rev. 1.0 5

6. External Reference Input (XA/XB)

An external reference (XTAL) is used in combination with the internal oscillator to produce an ultra-low jitter

reference clock for the DSPLL and for providing a stable reference for the free-run and holdover modes. The

Si5344-EVB can also accommodate an external reference clock instead of a crystal. To evaluate the device with a

REFCLK, C93 and C94 must be populated and the XTAL removed (see Figure 3). The REFCLK can then be

applied to J25 and J26.

Figure 3. External Reference Input Circuit

7. Clock Input Circuits (INx/INxB and FB-IN/FB-INB)

The Si5344-EVB has eight SMA connectors (IIN0/IN0B – IN2/IN2B and IN3(FB_IN)/IN3B(FB_INB)) for receiving

external clock signals. All input clocks are terminated as shown in Figure 4.

Input clocks are AC coupled and 50-terminated. This represents 4 differential input clock pairs. Single-ended

clocks can be used by appropriately driving one side of the differential pair with a single-ended clock. For details on

how to configure inputs as single-ended, please refer to the Si5344 data sheet.

Figure 4. Input Clock Termination Circuit

Si5344-EVB

6 Rev. 1.0

8. Clock Output Circuits (OUTx/OUTxB)

Each of the 8 outputs (4 differential pairs) is AC coupled to its respective SMA connector. The output clock

termination circuit is shown in Figure 5. The output signal has no DC bias. If DC coupling is required, the AC

coupling capacitors can be replaced with a resistor of appropriate value. The Si5344-EVB provides pads for

optional output termination resistors and/or low frequency capacitors.

Note: Components with schematic “NI” designation are not normally populated on the Si5344-EVB and provide locations on

the PCB for optional DC/AC terminations by the end user.

Figure 5. Output Clock Termination Circuit

9. Installing ClockBuildPro (CBPro) Desktop Software

To install the CBPro software on any Windows 7 (or later version) PC do the following:

1. Go to http://www.silabs.com/CBPro/ and download ClockBuilderPro™ software.

2. Installation instructions and User’s Guide for ClockBuilderPro™ can be found at the download link shown

above. Please follow the instructions as indicated.

10. Using Si5344 EVB

10.1. Connecting the EVB to Your Host PC

Once ClockBuilderPro™ software in installed, connect to the EVB with a USB cable as shown in Figure 6.

Figure 6. EVB Connection Diagram

Si5344-EVB

Rev. 1.0 7

10.2. Overview of ClockBuilderProTM Applications

The ClockBuilderPro™ installer installs two main applications: the ClockBuilderPro Wizard and the EVB GUI.

Figure 7. Application #1: ClockBuilderPro Wizard

Use the CBPro Wizard to do the following:

Create a new design

Review or edit an existing design

Export: create in-system programming

Figure 8. Application #2: EVB GUI

Use the EVB GUI to do the following:

Download configuration to EVB’s DUT (Si5344)

Control the EVB’s regulators

Monitor voltage, current, power on the EVB

Si5344-EVB

8 Rev. 1.0

10.3. Common ClockBuilderProTM Work Flow Scenarios

There are three common workflow scenarios when using CBPro and the Si5344 EVB. These workflow scenarios

are as follows:

Workflow Scenario #1: Testing a Silicon Labs-created Default Configuration

Workflow Scenario #2: Modifying the Default Silicon Labs-created Device Configuration

Workflow Scenario #3: Testing a User-created Device Configuration

Each is described in more detail in the following sections.

10.3.1. Workflow Scenario #1: Testing a Silicon Labs Created Default Configuration

The flow for using the EVB GUI to initialize and control a device on the EVB is as follows.

1. Once the PC and EVB are connected, launch ClockBuilder Pro by clicking on this icon on your PC’s

desktop.

Figure 9. ClockBuilderPro Desktop Icon

2. When the EVB is detected, click on the Open Default Plan button on the Wizard’s main menu. CBPro

automatically detects the EVB and device type.

Figure 10. Open Default Plan

Si5344-EVB

Rev. 1.0 9

3. Once you open the default plan (based on your EVB model number), a popup window opens.

Figure 11. Write Design to EVB Dialog

4. Select Yes to write the default plan to the Si5344 device mounted on your EVB. This ensures the device is

completely reconfigured per the Silicon Labs default plan for the DUT type mounted on the EVB.

Figure 12. Writing Design Status

5. After CBPro writes the default plan to the EVB, click on Open EVB GUI.

Figure 13. Open EVB GUI

Si5344-EVB

10 Rev. 1.0

6. The EVB GUI opens. All power supplies are set to the values defined in the device’s default CBPro project

file created by Silicon Labs, as shown in Figure 14.

Figure 14. EVB GUI Window

Verify Free-run Mode Operation

Assuming no external clocks have been connected to the INPUT CLOCK differential SMA connectors (labeled

“INx/INxB”) located around the perimeter of the EVB, the DUT should now be operating in free-run mode, as the

DUT will be locked to the crystal in this case.

You can run a quick check to determine if the device is powered up and generating output clocks (and consuming

power) by clicking on the Read All button (bottom right-hand corner of Figure 14) and then reviewing the voltage,

current, and power readings for each VDDx supply.

Note: Shutting the VDD and VDDA power supplies “Off” and then “On” will power-down and reset the DUT. Every time you do

this, to reload the Silicon Labs-created default plan into the DUT’s register space, you must go back to the Wizard’s main

menu and select Write Design to EVB.

Figure 15. Write Design to EVB

Failure to do the step above will cause the device to read in a pre-programmed plan from its non-volatile memory (NVM).

However, the plan loaded from the NVM may not be the latest plan recommended by Silicon Labs for evaluation.

At this point, you should verify the presence and frequencies of the output clocks (running in free-run mode from

the crystal) using appropriate external instrumentation connected to the output clock SMA connectors. To verify the

output clocks are toggling at the correct frequency and signal format, click on View Design Report as highlighted

in Figure 16.

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