Silicon Laboratories EFM32 Mode d’emploi

AN0046: USB Hardware Design Guidelines

This application note gives recommendations on hardware design for implementing USB

host and device applications using USB capable EFM32 microcontrollers along with

some example schematics for different applications.

KEY POINTS

• Example Schematics for a variety of

applications

• PCB Design Guidelines for new

applications

silabs.com | Building a more connected world. Rev. 1.02

1. Introduction

Some EFM32 microcontrollers, for instance selected members of the Giant Gecko and Leopard Gecko families, offer on-chip USB sup-

port. The USB peripheral embedded on these devices include the USB PHY and an internal voltage regulator, thus requiring only a

minimum number of external components. The on-chip voltage regulator's primary purpose is to power the EFM32 USB PHY. But as it

can deliver more current than the EFM32 needs, it can be used to power other components as well, even in non-USB applications. This

can be very useful when component cost or PCB area is of concern.

This document will explain how to connect the USB pins of an EFM32 microcontroller, and will give general guidelines on PCB design

for USB applications. First some quick rules-of-thumb for routing and layout are presented before a more detailed explanation follows.

The information in this document is meant to supplement the information already presented in Energy Micro application notes AN0002

Hardware Design Considerations and AN0016 Oscillator Design Considerations, and it is recommended to follow these guidelines as

well.

The EFM32GG-STK3700 has been tested and passes the requirements as a USB Device. A test report confirming this is attached.

AN0046: USB Hardware Design Guidelines

Introduction

silabs.com | Building a more connected world. Rev. 1.02 | 2

2. USB Connection

This section gives a brief overview of the different USB roles an EFM32 Microcontroller is capable of. For more in-depth details, please

refer to the device family reference manual.

USB can be operated in 2 different modes; host or device, with hub being a special version of a USB device. A supplement to the USB

standard introduces "On-The-Go" mode, which enables a USB product to operate as either a host or a device depending on which kind

of controller is in the other end of the cable. A typical example for this would be a smartphone or a tablet that can both connect to a

computer as a USB Mass Storage Device, or act as a host if a memory card reader or a USB memory stick is connected.

A USB capable EFM32 microcontroller can operate as a host, a device or as an OTG dual role device. EFM32 microcontrollers do not

support operation as a USB hub. The EFM32 USB stack supports host mode and device mode, but not OTG mode.

2.1 EFM32 USB Pin Descriptions

The USB peripheral on EFM32 microcontrollers feature the following pins:

USB_DP - Data line

USB_DM - Inverted data line

USB_VBUS - Sensing if VBUS is connected.

USB_VBUSEN - VBUS Enable, a control signal for enabling VBUS in host applications. Connect to external VBUS switch.

USB_DMPU - Data Minus Pull-Up, a control signal for enabling external 4.7 kohm pull-up on USB_DM for low-speed operation. If VDD

is 3.3 V pull-up may be connected directly to USB_DMPU pin.

USB_ID - ID for determining which device should act as bus master in a link between two OTG Dual Role devices. Connect to ID pin on

USB Micro-AB receptacle.

USB_VREGI - Voltage regulator input.

USB_VREGO - Voltage regulator output.

AN0046: USB Hardware Design Guidelines

USB Connection

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2.2 EFM32 as USB Host

In host mode, the EFM32 acts as the bus master and is responsible of enumerating the USB devices, a process that includes inquiring

connecting devices for configuration information and assigning them an address on the USB bus. The USB host also controls data flow

on the bus by sequentially polling all devices for data, meaning that no device can transmit on the bus without a host request.

A USB host must be able to supply power to a connected USB device through the +5 V VBUS line.

EFM32

USB_DP 15 R VBUS

D-

GND

D+

USB_DM

USB_DMPU

USB_ID

USB_VBUS

USB_VBUSEN

USB_VREGO

USB_VREGI

VSS

VDD

USB Series A

receptacle

3.0 – 3.6 V 5.0 V

15 R

Connector

shield

Vin

Vout

GPIO

1 µF

> 96 µF

Figure 2.1. USB Host Schematics

When designing hardware for USB Host, remember the following:

• Use a 48 MHz (2500 ppm) crystal.

• Use a ferrite bead for VBUS. Place near receptacle.

• Use a switch that can shut off VBUS if current exceeds 500 mA.

• Provide at least 96 uF decoupling capacitance on VBUS. Place near USB receptacle.

• Terminate D+ and D- with 15 ohm serial resistors. Place near EFM32.

• Use an ESD protection device. Place near USB receptacle.

• Select a USB Series A type receptacle.

2.3 EFM32 as USB Device

USB devices are bus slaves that provide functionality to the USB host. Devices must provide configuration information to the host so

that the host can configure the connection. Devices are separated in different classes depending on their functionality. Two different

types of device classes exist; hubs and functions. Hubs provide a host with more attachment points, while functions provides additional

functionality. Examples of functions are human interface devices, mass storage devices and communication devices.

USB devices will transmit data or control information over the bus when requested by the host. EFM32 microcontrollers can not operate

as a USB hub device. As a USB host provides +5 V over the VBUS line, a USB device can either be powered over the USB cable, or it

can be self powered. The following sections present schematics for how to connect an EFM32 as both a bus powered device and a self

powered device. Please refer to the USB specifications for details on how much current can be drawn over the USB bus for different

configurations.

AN0046: USB Hardware Design Guidelines

USB Connection

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2.3.1 Self Powered Device

EFM32

USB_DP 15 R VBUS

D-

GND

D+

Connector

shield

USB_DM

USB_DMPU

USB_ID

USB_VBUS

USB_VBUSEN

USB_VREGO

USB_VREGI

VSS

VDD

USB Series B,

USB Series Mini-B or

USB Series Micro-B

receptacle

1.85 – 3.6 V

15 R

1 µF

4.7 µF

Figure 2.2. USB Self Powered Device Schematics

When designing hardware for a self powered USB Device, consider the following:

• Use a 48 MHz (2500 ppm) crystal.

• Use a ferrite bead for VBUS. Place near receptacle.

• Provide at least 4.7 uF decoupling capacitance on USB_VREGI. Place near EFM32.

• Keep total load capacitance on VBUS below 10 uF

• Provide at least 1 uF decoupling capacitance on USB_VREGO. Place near EFM32.

• Terminate D+ and D- with 15 ohm serial resistors. Place near EFM32.

• Use an ESD protection device. Place near USB receptacle.

AN0046: USB Hardware Design Guidelines

USB Connection

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2.3.2 Bus Powered Device

EFM32

USB_DP 15 R VBUS

D-

GND

D+

Connector

shield

USB_DM

USB_DMPU

USB_ID

USB_VBUS

USB_VBUSEN

USB_VREGO

USB_VREGI

VSS

VDD

USB Series B,

USB Series Mini-B or

USB Series Micro-B

receptacle

15 R

1 µF

4.7 µF

Figure 2.3. USB Bus Powered Device Schematics

When designing hardware for a bus powered USB Device, consider the following:

• Use a 48 MHz (2500 ppm) crystal.

• Use a ferrite bead for VBUS. Place near receptacle.

• Provide at least 4.7 uF decoupling capacitance on USB_VREGI. Place near EFM32.

• Keep total load capacitance on VBUS below 10 uF

• Provide at least 1 uF decoupling capacitance on USB_VREGO. Place near EFM32.

• Connect USB_VREGO to VDD.

• Provide decoupling capacitance on VDD as per AN0002 Hardware Design Considerations.

• Terminate D+ and D- with 15 ohm serial resistors. Place near EFM32.

• Use an ESD protection device. Place near USB receptacle.

AN0046: USB Hardware Design Guidelines

USB Connection

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2.3.3 Low-speed

Speed identification of USB devices is done with a pull-up on one of the data lines. A low-speed capable device is identified by a 1.5

kohm pull-up resistor on the D- line. The internal pull-up resistor on EFM32 microcontrollers is approximately 2.2 kohm, so an external

4.7 kohm resistor must be placed in parallel to be standard compliant. This resistor should be connected to the USB_DMPU pin so it

can be switched on and off by the USB PHY.

Even if omitting the external pull-up resistor will most likely work, it will not be USB compliant because the internal resistor value is

outside the USB specification.

It should also be noted that according to USB specification, low-speed mode is defined to support a limited number of low-bandwidth

devices, such as mice. Low-speed devices are not allowed to use standard USB cables, and a separate specification for low-speed

cables exist.

EFM32

USB_DP 15 R VBUS

D-

GND

D+

Cable

shield

USB_DM

USB_DMPU

USB_ID

USB_VBUS

USB_VBUSEN

USB_VREGO

USB_VREGI

VSS

VDD

USB Captive Cable

15 R

1 µF

4.7 µF

4k7

Figure 2.4. USB Low-speed Device Schematics

When designing hardware for a Low-speed USB Device, consider the following:

• Use a 48 MHz 2500 ppm crystal.

• Use a ferrite bead for VBUS. Place near receptacle.

• Connect a 4.7 kohm resistor between USB_DMPU and D-

• Provide at least 4.7 uF decoupling capacitance on USB_VREGI. Place near EFM32.

• Keep total load capacitance on VBUS below 10 uF

• Provide at least 1 uF decoupling capacitance on USB_VREGO. Place near EFM32.

• Terminate D+ and D- with 15 ohm serial resistors. Place near EFM32.

• Use an ESD protection device. Place near USB receptacle or where the cable connects to the PCB.

• Do not use a standard USB receptacle.

In the above schematics, a bus powered device is shown. A low speed device may also be self powered, but if VDD is below

USB_VREGO (3.3 V) the external pull-up should be connected to USB_VREGO instead of USB_DMPU and a switch should be used to

turn it on or off through USB_DMPU. If this is not done, there will be a leakage current from VREGO to VDD through the pull-up.

AN0046: USB Hardware Design Guidelines

USB Connection

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2.4 EFM32 as USB On-The-Go Dual Role Device

On-The-Go Dual Role Device (OTG) is not yet supported in the EFM32 USB stack, but EFM32 hardware is OTG capable.

When operating as a OTG Dual Role Device, a USB product is capable of operating both as a USB host and a USB device. A dual role

capable device must use a Micro-AB receptacle which can accept both a Micro-A plug and a Micro-B plug. Two dual role devices can

be connected together with a cable that has a Micro-A plug in one end and a Micro-B plug in the other end. In this case the device

where the Micro-A plug is inserted will act as host and must provide +5 V on VBUS. The plug type is detected by the ID pin, which is

shorted to GND on a Micro-A plug.

EFM32

USB_DP 15 R VBUS

D-

GND

D+

USB_DM

USB_DMPU

USB_ID

USB_VBUS

USB_VBUSEN

USB_VREGO

USB_VREGI

VSS

VDD

USB Series Micro-AB

receptacle

< 6.5 µF

3.0 – 3.6 V 5.0 V

15 R ID

GPIO OC

Vin

Vout

Connector

shield

1 µF

Figure 2.5. USB On-the-Go Dual Role Device Schematics

When designing hardware for an OTG Dual Role Device, consider the following:

• Use a 48 MHz 2500 ppm crystal.

• Use a ferrite bead for VBUS. Place near receptacle.

• Connect the ID pin on the receptacle to USB_ID

• Ensure that total capacitance on VBUS is less than 6.5 uF

• Provide at least 1 uF decoupling capacitance on USB_VREGO. Place near EFM32.

• Terminate D+ and D- with 15 ohm serial resistors. Place near EFM32.

• Use an ESD protection device. Place near USB receptacle or where the cable connects to the PCB.

• Use a USB Series Micro-AB receptacle.

AN0046: USB Hardware Design Guidelines

USB Connection

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3. PCB Design Guidelines

This section presents some basic guidelines for high-speed PCB design as well as some specific rules of thumb for USB full-speed

design.

3.1 Recommended Routing Rules of Thumb

• Route D+ and D- as 90 ohm differential pair

• Always provide a good return path (ground) for current

• Do not route over a gap in the reference plane

• Keep away from the edge of the reference plane

• Keep skew less than 400 ps

• Route D+ and D- on top layer

• Route D+ and D- as short as reasonably possible

3.2 PCB Stackup

When designing high speed signal traces on a PCB, thought must be given to the PCB stackup. The two common approaches are to

either route high speed signals on an inner layer, or to keep them on the top layer. The advantage of using an inner layer is improved

noise immunity and to avoid any track impedance discontinuities when routing the signal under components, connectors etc. The bene-

fits with outer layer routing is to avoid vias which easily cause discontinuities in the return current path unless special care is taken. For

USB signals on EFM32 microcontrollers the preferred solution is normally to route the signal on an outer layer, as PCB traces usually

are short.

Independently of whether the signals are routed on an inner or outer layer, they should always be routed over a solid reference plane.

Thus the PCB should have minimum 2 layers.

3.3 Routing

When a signal trace on a PCB is long relative to the highest frequency component of the signal, transmission line effects must be taken

into consideration. The transition between when a wire should be modeled as a transmission line and a wire with "no length" is gradual,

but common practice is to apply transmission line models when the trace length is more than 1/10th of the wavelength of the highest

frequency component on the trace. For traces shorter than this, it is safe to assume that the voltage level is the same over the entire

trace.

For digital signals the shortest wavelength is dependent on the signal bandwidth which again depends on the shortest rise and fall

times. Faster rise times equals higher frequency content. A common approximation is that

BW ≈0.35

where tr is the minimum rise time from 10-90%. USB specifies a minimum rise time of 4 ns, which equals a maximum signal bandwidth

of 87.5 MHz or a minimum wavelength of 1.7 meters on a typical PCB trace. Thus if PCB traces are shorter than 170 mm, it can be

argued that the characteristic impedance of a track is not important. However, good design practice is to route USB signals as an impe-

dance matched differential pair according to specification.

AN0046: USB Hardware Design Guidelines

PCB Design Guidelines

silabs.com | Building a more connected world. Rev. 1.02 | 9

3.3.1 Differential Pairs

The USB data lines, D- and D+, should be routed as a differential pair. The trace impedance should be matched to the USB cable

differential impedance, which is nominally 90 ohms for the signal pair.

The impedance of a signal track is mainly determined by its geometry (i.e. trace width and height above the reference plane) and the

dielectric constant of the material between the traces and a reference plane. When two tracks are closely spaced, they will be coupled

and the differential impedance will also be dependent on the distance between the two tracks comprising the pair.

In general one can say that if the two traces of a differential pair is spaced far apart, the differential impedance will be twice the impe-

dance of each trace. I.e. the two traces can be considered a shunt impedance. When the distance between the two traces is reduced,

coupling between the traces will cause the differential impedance to decrease. Thus to create a differential pair with 90 ohms impe-

dance, the single ended impedance of each trace should be above 45 ohms. Reducing the trace width will increase the single-ended

impedance while reducing the distance between the traces in a pair reduces the impedance. This allows routing of very closely spaced

differential pairs that use little PCB area. Note, however that thin traces will be more difficult to manufacture, and that for high frequen-

cies loss due to skin effect comes into play.

Most PCB design tools support differential pairs, and can create such pairs with specified parameters. If such a tool is not available,

there are many online impedance calculators that can calculate track parameters.

To avoid differential imbalance, skew (or trace length difference) between the two traces in a differential pair should be under control. A

common rule of thumb is to keep the skew less than 1/10th of the fastest rise time. For USB full-speed this translates to 400 ps or 60

mm. However, this is the total skew over the entire communication link so skew in the USB cable as well as in the other communicating

party must also be included. According to the USB specification the maximum allowed skew in a cable is 100 ps, which leaves a maxi-

mum of 300 ps (45 mm) of skew to be distributed amongst the host and device. Still, as you never know the characteristics of the other

end, good design practice is to keep skew at a reasonable minimum.

When high speed signals are routed from one layer to another, care should also be taken to provide a path for the return signals. Re-

member that even differential signals use a reference plane as return path. This is particularly important when designing PCBs with

many layers.

TOP

GND

BOTTOM

GND

Signal

path

Return

current

path

Figure 3.1. Changing layers on PCB

Stubs should also be avoided as they may cause signal reflections. For USB, this is seldom a problem as the data traces are point-to-

point. If a test point is desired, the signal should be routed through the test point, in a fly-by manner, rather than having a long trace

from the trace to the test point.

Figure 3.2. Recommended routing of test points

AN0046: USB Hardware Design Guidelines

PCB Design Guidelines

silabs.com | Building a more connected world. Rev. 1.02 | 10

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