Shuttle HOT-555 Manuel utilisateur

HOT-555 User's Manual 1

HOT-555

Pentium™processor

Based PCI MAIN BOARD

User's Manual

FCC Notice:

This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of

FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential

installation. This equipment generates, uses and can radiate radio frequency energy. If not installed and used properly, in

strict accordance with the manufacturer’s instructions, may cause harmful interference to radio communications.

However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause

interference to radio or television reception, which can be determined by turning the equipment off and on, the user is

encouraged to try to correct the interference by one or more of the following measures :

Reorient or relocate the receiving antenna.

Increase the separation between the equipment and receiver.

Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

Consult the dealer or an experienced radio/television technician for help and for additional suggestions.

The user may find the following booklet prepared by the Federal Communications Commission helpful “How to Identify

and Resolve Radio-TV Interference Problems.” This booklet is available from the U.S. Government Printing Office.

Washington, DC 20402, Stock 004-000-00345-4

FCC Warning

The user is cautioned that changes or modifications not expressly approved by the manufacturer could void the user’s

authority to operate this equipment.

Note : In order for an installation of this product to maintain compliance with the limits for a Class B device, shielded

cables and power cord must be used.

NOTICE

Manual Ver 1.1

All information, documentation, and specifications contained in this manual are subject to change without prior

notification by the manufacturer.

The author assumes no responsibility for any errors or omissions which may appear in this document nor does it

make a commitment to update the information contained herein.

TRADEMARKS

Intel is a registered trademark of Intel Corporation

PentiumProcessor is a registered trademark of Intel Corporation

PC/AT is a registered trademark of International Business Machine Corporation.

PS/2 is a registered trademark of IBM Corporation.

All other brand and product names referred to in this manual are trademarks or registered trademarks of their

respective holders.

HOT-555 User's Manual 3

TABLE OF CONTENTS

PREFACE ............................................................................................ 4

CHAPTER 1 INTRODUCTION.................................................................. 5

Specification.......................................................................................................5

CHAPTER 2 HARDWARE INSTALLATION .................................................. 7

Jumpers ...............................................................................................................8

CPU Clock Speed Selection..............................................................................8

Onboard Regulator Output Selection - JP4, 10, 13, 36.................................9

Flash EPROM Jumper - JP18.........................................................................10

Clear CMOS - JP21.........................................................................................10

Clear Password - JP9.......................................................................................10

Connectors & Sockets......................................................................................11

CHAPTER 3 MEMORYCONFIGURATION ............................................... 12

CHAPTER 4 AWARD BIOS SETUP....................................................... 15

The Main Menu................................................................................................16

Standard CMOS Setup....................................................................................18

BIOS Features Setup.......................................................................................20

Chipset Features Setup....................................................................................22

Power Management Setup...............................................................................25

PCI Configuration Setup.................................................................................27

Integrated Peripherals......................................................................................29

Password Setting..............................................................................................31

HOT-555 User's Manual 4

HOT-555 mainboard is a highly integrated IBM PC/AT compatible system

board. The design will accept Intel Pentium, Cyrix 6x86 and AMD5k86

processors and also features high-performance pipeline burst secondary cache

memory support with size of 256KB. The memory subsystem is designed to

support up to 128 MB of EDO RAM, Standard Fast Page DRAM and SDRAM

in standard 72-pin SIMM socket and 168-pin DIMM socket. A type 7 Pentium

processor socket provides access to future processor enhancements.

HOT-555 provides a new level of I/O integration. Intel's 82430VX PCIset

chipset provides increased integration and improved performance over other

chipset designs. The 82430VX PCIset chipset provides an integrated Bus

Mastering IDE controller with two high performance IDE interfaces for up to

four IDE devices.

The onboard Super I/O controller provides the standard PC I/O functions:

floppy interface, two FIFO serial ports, an IrDA device port and a SPP/EPP/

ECP capable parallel port.

Up to three PCI local bus slots provide a high bandwidth data path for data-

movement intensive functions such as graphics, and up to three ISA slots

complete the I/O function.

The HOT-555 provides the foundation for cost effective, high performance,

highly expandable platforms, which deliver the latest in Pentium processor and

I/O standard

Preface

HOT-555 User's Manual 5

Chapter1 Introduction

Specification

CPU Function

Pentium processor clock : 75~200MHz

Cyrix 6x86 CPU clock : 100~133MHz

AMD5k86 CPU clock : 66~100MHz

Chipset

Intel PCISet 82437VX, 82438VX and 82371SB

Memory

Supports two banks of EDO RAM, Fast Page and Sync.

DRAM ranging from 8MB to 128MB

Supports 4MB, 8MB, 16MB, 32MB 72-pins SIMMs and

8MB, 16MB, 32MB 168-pin DIMMs

Cache Memory

Integrated L2 write-back cache controller

- 256KB Direct Mapped Pipeline Burst Cache

Power Management Function

Provides four power management modes : Full on, Doze,

Standby, and Suspend

Supports Microsoft APM

Provides EPMI (External Power Management Interrupt) pin

HOT-555 User's Manual 6

Expansions

32-bit PCI bus slot x 3

16-bit ISA bus slot x 3

2-channel PCI IDE port

- Support up to 4 IDE devices

- PIO Mode 4 transfers up to 16 MB/sec

- Integrated 8 x 32-bit buffer for PCI IDE burst transfers

One floppy port

One parallel port

- Supports SPP (PS/2 compatible bidirectional Parallel

Port), EPP (Enhanced Parallel Port), andECP (Extended

Capabilities Port) high performance parallel port.

Two serial ports

- Supports 16C550 compatible UARTS.

- Supports IrDA (Infra-red) communication.

One PS/2 mouse port

USB (Universal Serial Bus) port

Board Design

Dimension 220mm x 230mm

HOT-555 User's Manual 7

Jumpers

Chapter2Hardware Installation

HOT-555 User's Manual 8

CPU Clock Speed Selection

HOT-555 mainboard features a clock generator to provide adjustable system

clock frequency. Jumpers JP27 and JP28 determine the system clock

frequency from 50MHz to 66MHz.

HOT-555 mainboard also provides Jumpers JP23 and JP24 to figure up

CPU core clock multiplier. By inserting or removing jumper caps on JP23

and JP24, the user can change theHost Bus Clock/CPU Core Clock

ratio from 1 : 1.5 to 1 : 3.

CPU CLOCK SPEED JP27 JP28 SYSTEM

CLOCK JP23 JP24 CPU Bus/Core

RATIO

75 MHz

Pentium Processor CLOSE CLOSE 50 MHz OPEN OPEN 1 : 1.5

90 MHz

Pentium Processor CLOSE OPEN 60 MHz OPEN OPEN 1 : 1.5

100 MHz

Pentium Processor OPEN CLOSE 66 MHz OPEN OPEN 1 : 1.5

120 MHz

Pentium Processor CLOSE OPEN 60 MHz CLOSE OPEN 1 : 2

133 MHz

Pentium Processor OPEN CLOSE 66 MHz CLOSE OPEN 1 : 2

150 MHz

Pentium Processor CLOSE CLOSE 50 MHz OPEN CLOSE 1 : 3

180 MHz

Pentium Processor CLOSE OPEN 60 MHz OPEN CLOSE 1 : 3

200 MHz

Pentium Processor OPEN CLOSE 66 MHz OPEN CLOSE 1 : 3

125 MHz

Pentium Processor CLOSE CLOSE 50 MHz CLOSE CLOSE 1 : 2.5

150 MHz

Pentium Processor CLOSE OPEN 60 MHz CLOSE CLOSE 1 : 2.5

166 MHz

Pentium Processor OPEN CLOSE 66 MHz CLOSE CLOSE 1 : 2.5

66 MHz

AMD5k86 - P75 OPEN CLOSE 66 MHz CLOSE OPEN 1 : 1

75 MHz

AMD5k86 - P75 CLOSE CLOSE 50 MHz OPEN OPEN 1 : 1.5

90 MHz

AMD5K86 - P90 CLOSE OPEN 60 MHz OPEN OPEN 1 : 1.5

100 MHz

AMD5k86 - P100 OPEN CLOSE 66 MHz OPEN OPEN 1 : 1.5

100 MHz

Cyrix 6x86 - P120+ CLOSE CLOSE 50 MHz OPEN OPEN 1 : 2

110 MHz

Cyrix 6x86 - P133+ OPEN OPEN 55 MHz OPEN OPEN 1 : 2

120 MHz

Cyrix 6x86 - P150+ CLOSE OPEN 60 MHz OPEN OPEN 1 : 2

133 MHz

Cyrix 6x86 - P166+ OPEN CLOSE 66 MHz OPEN OPEN 1 : 2

HOT-555 User's Manual 9

HOT-555 mainboard is designed an onboard voltage regulator to provide

single 3.3V voltage ranger (VIO=VCORE) for Intel Pentium P54C, Cyrix

6x86 and AMD5k86 processors, and also provide dual 3.3/2.5V voltage

ranger (VIO, VCORE separated) for Intel P55C processors and Cyrix/AMD

future processors.

Single Voltage Output (VIO=VCORE)

Onboard Regulator Output Selection - JP4, 10, 13, 36

Dual Voltage Output (VIO, VCORE separated)

Voltage

Output-Vio JP4 JP13

3.3 V 5 - 6 CLOSE

OPEN

3.45 V 3 - 4 CLOSE

3.6 V 1 - 2 CLOSE

Voltage

Output-Vcore JP10 JP36

2.5 V ALL OPEN 3 - 4, 5 - 6 CLOSE

2.6 V ALL OPEN 3 - 4, 7 - 8 CLOSE

2.7 V 1 - 2 CLOSE 3 - 4 CLOSE

2.8 V 3 - 4 CLOSE 3 - 4 CLOSE

2.9 V 5 - 6 CLOSE 3 - 4 CLOSE

3.0 V 7 - 8 CLOSE 3 - 4 CLOSE

Voltage Output JP4 JP10, JP13, JP36

3.3 V 5 - 6 CLOSE JP10 : All OPEN,

JP13 : CLOSE,

JP36 : 1 - 2 CLOSE

3.45 V 3 - 4 CLOSE

3.6 V 1 - 2 CLOSE

Note :

1. It is highly recommended that a CPU cooling fan is attached

to the CPU to ensure system stability.

2. Make sure none of the CPU cooling fan assembly the heat

sink on the regulator to avoid damage to system.

HOT-555 User's Manual 10

HOT-555 mainboard supports jumperJP21 for discharge mainboard's

CMOS memory. The CMOS memory retains the system configuration

information in the component of R.T.C.

You should short this jumper for a moment when you wish to clear CMOS

memory, and then make sure open this jumper for normal operation to retain

your new CMOS data.

Note: Clear CMOS & R.T.C function available only when "DS12887A"

or "DS12B887" are in use.

There are different ways to discharge CMOS memory between "DS12887A" and

"DS12B887".

DS12887A- Turn off power, close jumper JP21 for 2 to 3 seconds then release and

CMOS will be discharged.

DS12B887- Close jumper JP21, turn on power durning 2 to 3 seconds then release JP21

and turn off power, CMOS will be discharged.

Clear CMOS - JP21

Flash EPROM Jumper - JP18

HOT-555 mainboard supports two types of flash EPROM, 5 volt and 12

volt. By setting up jumper JP18, you can update both types of flash

EPROM with new system BIOS files as they come available.

JP18 Pin 2-3 Closed for 5V, Pin 1-2 Close for 12V.

BIOS UPGRADES

Flash memory makes distributing BIOS upgrades easy. A new version of

the BIOS can be installed from a diskette.

The flash upgrade utility,Awdflash.exe, has two notice for BIOS upgrades:

Flash utility can't work under protected/virtual mode. Memory

manager like QEMM.386, EMM386 should not be loaded. (or

Simply bypass all config.sys and autoexec.bat on system boot

up.

Flash utility supports both 5V and 12V Flash EEPROM.

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