Renesas 7542 Manuel utilisateur

DESCRIPTION

The 7542 Group is the 8-bit microcomputer based on the 740 fam-

ily core technology.

The 7542 Group has serial I/Os, 8-bit timers, 16-bit timers, and an

A/D converter, and is useful for control of home electric appliances

and office automation equipment.

FEATURES

•Basic machine-language instructions ...................................... 71

•

The minimum instruction execution time .............................

0.25 µs

(at 8 MHz oscillation frequency, double-speed mode for the

shortest instruction)

•Memory size

Flash memory version: ROM ..................... 16 to 32K + 4K bytes

RAM ..................................... 1024 bytes

Mask ROM version: ROM............................. 8K to 16K bytes

RAM ............................ 384 to 512 bytes

RSS version RAM ..................................... 1024 bytes

•Programmable I/O ports

29 (25 in 32-pin version and PWQN0036KA-A package version)

•Interrupts ................................................. 18 sources, 16 vectors

•Timers............................................................................. 8-bit ✕2

...................................................................................... 16-bit ✕2

•Output compare............................................................ 4-channel

•Input capture ................................................................ 2-channel

•Serial I/O...................... 8-bit ✕2 (UART or Clock-synchronized)

•A/D converter ............................................... 10-bit ✕8 channels

..... (6 channels in 32-pin version and PWQN0036KA-A package

version)

•Clock generating circuit............................................. Built-in type

(low-power dissipation by an on-chip oscillator)

(connected to external ceramic resonator or quartz-crystal

oscillator permitting RC oscillation)

•Watchdog timer ............................................................ 16-bit ✕1

•Power source voltage

oscillation frequency at ceramic oscillation, in double-speed mode

At 8 MHz.................................................................... 4.5 to 5.5 V

XIN oscillation frequency at ceramic oscillation, in high-speed mode

At 8 MHz.................................................................... 4.0 to 5.5 V

At 4 MHz.................................................................... 2.4 to 5.5 V

At 2 MHz.................................................................... 2.2 to 5.5 V

XIN oscillation frequency at RC oscillation in high-speed mode or

middle-speed mode

At 4 MHz.................................................................... 4.0 to 5.5 V

At 2 MHz.................................................................... 2.4 to 5.5 V

At 1 MHz.................................................................... 2.2 to 5.5 V

•Power dissipation ................................................ 27.5 mW (Typ.)

•Operating temperature range...................................–20 to 85 °C

(–40 to 85 °C for extended operating temperature version)

(–40 to 125 °C for extended operating temperature 125 °C ver-

sion (Note))

Note: In this version, the operating temperature range and total time are

limited as follows;

55 °C to 85 °C: within total 6000 hours,

85 °C to 125 °C: within total 1000 hours.

APPLICATION

Office automation equipment, factory automation equipment, home

electric appliances, consumer electronics, car, etc.

Rev.3.02 Oct 31, 2006 Page 1 of 134

REJ03B0006-0302

7542 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER REJ03B0006-0302

Rev.3.02

Oct 31, 2006

7542 Group

Rev.3.02 Oct 31, 2006 Page 2 of 134

REJ03B0006-0302

Fig. 2 Pin configuration (Package type: PRSP0036GA-A)

PIN CONFIGURATION (TOP VIEW)

Fig. 1 Pin configuration (Package type: PLQP0032GB-A)

Outline PLQP0032GB-A (32P6U-A)

(LED

)/S

RDY2

/CAP

CLK1

RDY1

/CNTR

/AN

(LED

)

(LED

)/INT

(LED

)/CMP

(LED

)/CMP

(LED

)/CAP

OUT

8765314

CNV

RESET

/AN

(LED

)/TxD

20 1718192124

(LED

)/CMP

(LED

)/RxD

(LED

)/TX

OUT

(LED

)/S

CLK2

23 22

(LED

)/CMP

(LED

)/CAP

(LED

)/INT

M37542Mx-XXXGP

M37542MxT-XXXGP

M37542MxV-XXXGP

M37542FxGP

M37542F8TGP

M37542F8VGP

/AN

REF

Packa

e t

e: PRSP0036GA-A

(

36P2R-A

)

CNVSS

XOUT

XIN

VSS

P04(LED04)/RxD2

P30(LED10)/CAP1

Vcc

VREF

P05(LED05)/TxD2

P10/RXD1/CAP0

P26/AN6

P27/AN7

P11/TXD1

P12/SCLK1

P13/SRDY1

P23/AN3

P22/AN2

P21/AN1

P20/AN0

P31(LED11)/CMP2

P36(LED16)/INT1

P24/AN4

P25/AN5

P06(LED06)/SCLK2

P07(LED07)/SRDY2

RESET

M37542Mx-XXXFP

M37542MxT-XXXFP

M37542MxV-XXXFP

M37542FxFP

M37542F8TFP

M37542F8VFP

P14/CNTR0

P35(LED15)

P34(LED14)

P33(LED13)/INT1

P32(LED12)/CMP3

P37(LED17)/INT0

P00(LED00)/CAP0

P01(LED01)/CMP0

P02(LED02)/CMP1

P03(LED03)/TXOUT

7542 Group

Rev.3.02 Oct 31, 2006 Page 3 of 134

REJ03B0006-0302

Fig. 4 Pin configuration (Package type: PWQN0036KA-A)

Fig. 3 Pin configuration (Package type: PRDP0032BA-A)

CNV

CLK1

RDY1

/CNTR

/AN

OUT

/CAP

(LED

)/S

RDY2

(LED

)/S

CLK2

(LED

)/TxD

(LED

)/RxD

(LED

)/CAP

/AN

REF

RESET

(LED

)/INT

(LED

)/CMP

(LED

)/CMP

M37542Mx-XXXSP

M37542FxSP

(LED

)

Package type: PRDP0032BA-A (32P4B)

(LED

)/TX

OUT

(LED

)/CMP

(LED

)/CMP

(LED

)/CAP

(LED

)/INT

Package type: PWQN0036KA-A (36PJW-A)

P07(LED07)/SRDY2

P10/RxD1/CAP0

P11/TxD1

P12/SCLK1

P13/SRDY1

P14/CNTR0

P20/AN0

P21/AN1

[N.C.]

P33(LED13)/INT1

P32(LED12)/CMP3

P31(LED11)/CMP2

P30(LED10)/CAP1

Vss

XOUT

XIN

[N.C.]

Vcc

CNVss

RESET

P06(LED06)/SCLK2

(LED

)

M37542Mx-XXXHP

M37542F8HP(Note)

/AN

REF

[N.C.] [N.C.]

/AN

(LED

)/TxD

(LED

)/RxD

(LED

)/TX

OUT

(LED

)/CMP

(LED

)/CMP

(LED

)/CAP

(LED

)/INT

27 26 25 20 192124 23 22

987653142

N.C.: Non Connection

Note: Only ES version

(MP: no plan)

7542 Group

Rev.3.02 Oct 31, 2006 Page 4 of 134

REJ03B0006-0302

Fig. 5 Pin configuration (Package type: 42S1M)

Packa

e t

e 42S1M

CNV

OUT

(LED

)/RxD2

(LED

)/CAP

Vcc

REF

(LED

)/TxD2

/SCLK1

/AN

/SRDY1

/CNTR0

/AN

(LED

)/CMP

(LED

)/INT

/AN

(LED

)/SCLK2

(LED

)/SRDY2

RESET

M37542RSS

(LED

)

(LED

)

(LED

)/INT

(LED

)/CMP

/CAP

/AN

(LED

)/INT

(LED

)/CAP

(LED

)/CMP

(LED

)/CMP

(LED

)/TX

OUT

7542 Group

Rev.3.02 Oct 31, 2006 Page 5 of 134

REJ03B0006-0302

Table 1 Performance overview Parameter 71

0.25 µs

(Minimum instruction, oscillation frequency 8 MHz: double-speed mode)

8 MHz (max.)

8 K to 16 K bytes

384 to 512 bytes

16 K to 32 K + 4 K bytes

1024 bytes

•8-bit ✕3, 5-bit ✕1 (8-bit ✕1, 6-bit ✕2, 5-bit ✕1 for 32-pin version and

PWQN0036KA-A package version)

18 sources, 16 vectors

•8-bit ✕2, 16-bit ✕2

4 channel

2 channel

8-bit ✕2 (UART or clock synchronous)

10-bit ✕8 channel

(6 channel for 32-pin version and PWQN0036KA-A package version)

16-bit ✕1

Built-in

(external ceramic resonator or quartz-crystal oscillator, RC oscillation available)

(Low consumption current by on-chip oscillator available)

4.0 to 5.5 V

2.4 to 5.5 V

2.7 to 5.5 V

2.2 to 5.5 V

2.7 to 5.5 V

4.5 to 5.5 V

2.4 to 5.5 V

2.7 to 5.5 V

2.2 to 5.5 V

2.7 to 5.5 V

4.5 to 5.5 V

2.4 to 5.5 V

2.7 to 5.5 V

2.2 to 5.5 V

2.7 to 5.5 V

27.5 mW (Typ.)

24.0 mW (Typ.)

-20 to 85 °C

-40 to 85 °C

-40 to 125 °C (Note 2)

CMOS sillicon gate

32-pin plastic molded SDIP/LQFP, 36-pin plastic molded SSOP/WQFN

Number of basic instructions

Instruction execution time

Oscillation frequency

Memory sizes Mask ROM ROM

RAM

FLASH ROM ROM

RAM

I/O port P0, P1, P2, P3

Interrupts

Timer

Output compare

Input capture

Serial interface

A/D converter

Watchdog timer

Clock generating circuit

Power source High-speed mode At 8MHz Mask ROM

voltage Middle-speed mode oscillation FLASH ROM

(at ceramic At 4MHz Mask ROM

resonance) oscillation FLASH ROM

At 2MHz Mask ROM

oscillation FLASH ROM

(Note 1)

Double-speed mode At 8MHz Mask ROM

oscillation FLASH ROM

At 6.5MHz Mask ROM

oscillation FLASH ROM

At 2MHz Mask ROM

oscillation FLASH ROM

At 1MHz Mask ROM

oscillation FLASH ROM

(Note 1)

Power source High-speed mode At 4MHz Mask ROM

voltage Middle-speed mode oscillation FLASH ROM

(at RC oscillation)

At 2MHz Mask ROM

oscillation FLASH ROM

At 1MHz Mask ROM

oscillation FLASH ROM

(Note 1)

Power dissipation Mask ROM

FLASH ROM

Operating General purpose

temperature Extended operating temperature

range Extended operating temperature 125 °C version

Device structure

Package

Function

Notes 1: In the Extended operating temperature version and Extended operating temperature 125 °C version, these are not standardized.

2: In this version, the operating temperature range and total time are limited as follows;

55 °C to 85 °C: within total 6000 hours,

85 °C to 125 °C: within total 1000 hours.

7542 Group

Rev.3.02 Oct 31, 2006 Page 6 of 134

REJ03B0006-0302

FUNCTIONAL BLOCK

Fig. 6 Functional block diagram (Package type: PLQP0032GB-A)

FUNCTIONAL BLOCK DIAGRAM (Package type: PLQP0032GB-A)

IN OUT

SI/O2(8)

RAM ROM

CPU

RESET

CNV

P1(5)

30 28 26

29 27

32 31

P2(6)

P3(6)

1215 13

Reset input

I/O port P2 I/O port P1I/O port P3

Clock generating circuit

Clock input Clock output

910

A/D

converter

(10)

REF

Watchdog timer

Reset

INT

1617

SI/O1(8)

CNTR

I/O port P0

Timer X (8)

Key-on wakeup

Prescaler X (8)

Timer B (16)

P0(8)

25 23 21 19

24 22 20 18

Timer 1 (8)

Prescaler 1 (8)

Timer A (16)

Input

Capture Output

Compare

INT

7542 Group

Rev.3.02 Oct 31, 2006 Page 7 of 134

REJ03B0006-0302

Fig. 7 Functional block diagram (Package type: PRSP0036GA-A)

FUNCTIONAL BLOCK DIAGRAM (Package type: PRSP0036GA-A)

IN OUT

SI/O2(8)

RAM ROM

CPU

RESET

15 14

CNV

P1(5)

236

P2(8)

P3(8)

2124 22

Reset input

I/O port P2 I/O port P1I/O port P3

Clock generating circuit

Clock input Clock output

16 17

11 9

10 8

A/D

converter

(10)

REF

Watchdog timer

Reset

INT

2526

SI/O1(8)

CNTR

I/O port P0

Timer X (8)

Key-on wakeup

Prescaler X (8)

Timer B (16)

P0(8)

34 32 30 28

33 31 29 27

Timer 1 (8)

Prescaler 1 (8)

Timer A (16)

INT

1920 54

Input

Capture Output

Compare

7542 Group

Rev.3.02 Oct 31, 2006 Page 8 of 134

REJ03B0006-0302

Fig. 8 Functional block diagram (Package type: PRDP0032BA-A)

FUNCTIONAL BLOCK DIAGRAM (Package type: PRDP0032BA-A)

IN OUT

SI/O2(8)

RAM ROM

CPU

RESET

13 12

CNV

P1(5)

3131

232

P2(6)

P3(6)

20 18

Reset input

I/O port P2 I/O port P1I/O port P3

Clock generating circuit

Clock input Clock output

14 15

A/D

converter

(10)

REF

Watchdog timer

Reset

INT

2122

SI/O1(8)

CNTR

I/O port P0

Timer X (8)

Key-on wakeup

Prescaler X (8)

Timer B (16)

P0(8)

25 23

Timer 1 (8)

Prescaler 1 (8)

Timer A (16)

INT

28 26

3029

4756

Input

Capture Output

Compare

7542 Group

Rev.3.02 Oct 31, 2006 Page 9 of 134

REJ03B0006-0302

Fig. 9 Functional block diagram (Package type: PWQN0036KA-A)

FUNCTIONAL BLOCK DIAGRAM (Package type: PWQN0036KA-A)

IN OUT

SI/O2(8)

RAM ROM

CPU

RESET

CNV

P1(5)

34 32 30

33 31

36 35

P2(6)

P3(6)

1417 15

Reset input

I/O port P2 I/O port P1I/O port P3

Clock generating circuit

Clock input Clock output

11 12

A/D

converter

(10)

REF

Watchdog timer

Reset

INT

2021

SI/O1(8)

CNTR

I/O port P0

Timer X (8)

Key-on wakeup

Prescaler X (8)

Timer B (16)

P0(8)

25 23

24 22

Timer 1 (8)

Prescaler 1 (8)

Timer A (16)

Input

Capture Output

Compare

INT

29 27

28 26

7542 Group

Rev.3.02 Oct 31, 2006 Page 10 of 134

REJ03B0006-0302

PIN DESCRIPTION

Table 2 Pin description Function

Mask ROM version (Note 1) Apply voltage of 2.2 to 5.5 V to Vcc, and 0 V to Vss.

FLASH ROM version Apply voltage of 2.7 to 5.5 V to Vcc, and 0 V to Vss.

•Reference voltage input pin for A/D converter.

•Chip operating mode control pin, which is always connected to Vss.

•Reset input pin for active “L”

•Input and output pins for main clock generating circuit.

•Connect a ceramic resonator or quartz crystal oscillator between the XIN and XOUT pins.

•

For using RC oscillator, short between the X

and X

OUT

pins, and connect the capacitor and resistor.

•If an external clock is used, connect the clock source to the XIN pin and leave the XOUT pin open.

•When the on-chip oscillator is selected as the main clock, connect XIN pin to VCC and leave XOUT open.

Function expect a port function

Name

Power source

Analog refer-

ence voltage

CNVss

Reset input

Clock input

I/O port P0

I/O port P1

I/O port P2

(Note 2)

I/O port P3

(Note 3)

Vcc, Vss

VREF

CNVss

RESET

XIN

P00(LED00)/CAP0

P01(LED01)/CMP0

P02(LED02)/CMP1

P03(LED03)/TXOUT

P04(LED04)/RxD2

P05(LED05)/TxD2

P06(LED06)/SCLK2

P07(LED07)/SRDY2

P10/RxD1/CAP0

P11/TxD1

P12/SCLK1

P13/SRDY1

P14/CNTR0

P20/AN0–P27/AN7

P30(LED10)/CAP1

P31(LED11)/CMP2

P32(LED12)/CMP3

P33(LED13)/INT1

P34(LED14)

P35(LED15)

P36(LED16)/INT1

P37(LED17)/INT0

Notes 1: VCC = 2.4 to 5.5 V for the extended operating temperature version and the extended operating temperature 125 °C version.

2: P26/AN6and P27/AN7do not exist for the 32-pin version and PWQN0036KA-A package, so that Port P2 is a 6-bit I/O port.

3: P35and P36/INT1do not exist for the 32-pin version and PWQN0036KA-A package, so that Port P3 is a 6-bit I/O port.

• Capture function pin

• Compare function pin

• Timer X function pin

• Serial I/O2 function pin

• Serial I/O1 function pin

• Capture function pin

• Serial I/O1 function pin

• Timer X function pin

• Input pins for A/D converter

• Capture function pin

• Compare function pin

• Interrupt input pin

•8-bit I/O port.

•I/O direction register allows each pin to be individually pro-

grammed as either input or output.

•CMOS compatible input level

•CMOS 3-state output structure

•Whether a built-in pull-up resistor is to be used or not can be

determined by program.

•

High drive capacity for LED drive port can be selected by program.

•5-bit I/O port

•I/O direction register allows each pin to be individually pro-

grammed as either input or output.

•CMOS compatible input level

•CMOS 3-state output structure

•CMOS/TTL level can be switched for P10, P12and P13

•8-bit I/O port having almost the same function as P0

•CMOS compatible input level

•CMOS 3-state output structure

•8-bit I/O port

•I/O direction register allows each pin to be individually pro-

grammed as either input or output.

•CMOS compatible input level (CMOS/TTL level can be switched

for P36and P37).

•CMOS 3-state output structure

•Whether a built-in pull-up resistor is to be used or not can be

determined by program.

•

High drive capacity for LED drive port can be selected by program.

XOUT Clock output

• Key-input

(key-on

wake up

interrupt

input) pin

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