Pico Communications E-15 Manuel d'utilisation et d'entretien
www.picocomputing.com Pico Computing
(206) 283-2178 150 Nickerson Street. Suite 311
Seattle, WA 98109
Pico
PicoPico
Pico Computing
Computing Computing
Computing
Pico E-15
Hardware Technical
Reference
Release 1.01
For Hardware Revision D
Pico E-15 Hardware Reference www.picocomputing.com Pico Computing
(206) 283-2178 150 Nickerson Street. Suite 311
Seattle, WA 98109
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Contents:
Product Overview 3
Quick Reference Datasheet 4
Standard Part Numbers 5
System Architecture 6
Electrical Specification 7
Features
Field Programmable Gate Array 8
PowerPC™ Processor 9
CPLD TurboLoader 10
Flash Memory 11
DDR2 SDRAM Memory 12
Temperature Sensor 14
I/ Interfaces
Sleep Controller 15
Tri-Mode Ethernet Interface 16
Digital Peripheral Interface 17
High Speed Analog to Digital Converters 18
High Speed Digital to Analog Converters 21
Video Digitizer 23
CardBus / Digital Bus Interface 24
JTAG Debug Interface 25
PSoC Debug Interface 26
Appendices
A – Peripheral I/O Connector Information 27
B – CardBus Connector Information 28
C – FPGA Pinout 29
D – CPLD Pinout 33
E – PSoC Pinout 40
F – Standard Part Number Listing 41
G – Errata 43
H – FPGA Performance Enhancements 44
Revision History 45
Legal Notices 46
Pico E-15 Hardware Reference www.picocomputing.com Pico Computing
(206) 283-2178 150 Nickerson Street. Suite 311
Seattle, WA 98109
3
Product verview:
The Pico family of products are revolutionary FPGA based embedded acceleration platforms.
With performance that often exceeds modern microcomputers, a shockingly small form factor,
and nominal power consumption that is less than one watt, the Pico family of products take
computing to a whole new level.
The Pico E-15 is based on the high-performance Virtex-4 FPGA chip. This device has the
performance and power consumption of a custom chip (ASIC), but is completely
reconfigurable! The E-15 features four high speed converters and direct video capture.
Advanced users will enjoy the open source development kits which allow absolute control over
the hardware. For those who desire a more high level approach to firmware, Viva provides a
graphical development model. Impulse C™ support is also included for rapid firmware
development in the C programming language. Board support packages are available for
operating systems such as Linux, µC/OS, Green Hills Integrity OS™ and VX Works.
Pico E-15 Hardware Reference www.picocomputing.com Pico Computing
(206) 283-2178 150 Nickerson Street. Suite 311
Seattle, WA 98109
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Pico E-15 Quick Reference Datasheet
FEATURES
♦ High-performance Virtex-4 FX-20, 40 or 60
♦ 256MB RAM
♦ 64MB Flash ROM
♦ Dual 12-Bit 125 MSPS A/D converters
♦ Dual 14-Bit 210 MSPS D/A converters
♦ Integrated composite video capture
♦ CardBus (PCI) Interface
♦ Open source
♦ Standalone operation
♦ Reconfigurable, high-speed digital bus
FPGA FEATURES
♦ Embedded PowerPC™ P405 processor
♦ Integrated DSP logic
♦ Integrated RAM
APPLICATI NS
♦ Software defined radio
♦ Video processing / compression
♦ Accelerated scientific computing
♦ Digital signal processing
♦ Impulse C™ development platform
♦ Viva development platform
♦ Embedded systems
♦ Encryption / decryption
♦ Supercomputing / cluster computing
I Connectivity
♦ 10/100/1000 Ethernet
♦ RS-232 Asynchronous Serial
♦ JTAG
♦ SVIDEO/Composite In
♦ Dual High Speed Analog to Digital
♦ Dual High Speed Digital to Analog
♦ GPIO
MECHANICAL
Temperature Range 0°C to +70°C
PC Card Type II Form-Factor
Stainless steel case
P WER
Sleep 0.001W
Nominal 1.2W
Absolute Maximum 7.0W
Supply Voltage 3.3V
*Operation below -0°C requires throttled RAM timing
Pico E-15 Hardware Reference www.picocomputing.com Pico Computing
(206) 283-2178 150 Nickerson Street. Suite 311
Seattle, WA 98109
5
Standard Part Numbers
Standard Part Number
FX-20 E15FX20-256/64/JEGSAADDV10C
FX-40 E15FX40-256/64/JEGSAADDV10C
FX-60 E15FX60-256/64/JEGSAADDV10C
A Military version is available which includes:
BGA underfill
Conformal coating
Extended temperature range
The Military version is available by special order only, and is subject to minimum quantity
requirements.
Pico E-15 Hardware Reference www.picocomputing.com Pico Computing
(206) 283-2178 150 Nickerson Street. Suite 311
Seattle, WA 98109
6
System Architecture
At the core of the Pico E-15 is a Virtex-4 FPGA. The FPGA can be dynamically configured to
perform any number of specialized tasks such as protocol processing, encryption, or complex
mathematical functions. Embedded systems benefit from the integrated PowerPC™ processor.
Pico E-15 Hardware Reference www.picocomputing.com Pico Computing
(206) 283-2178 150 Nickerson Street. Suite 311
Seattle, WA 98109
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Pico E-15 Electrical Specification
Minimum Nominal Maximum
DC Input Voltage 3.25V 3.3V 3.35V
Power Consumption 0.001W 1.2W 7.0W
DC Input Current 0.0003A 0.36A 2.1A
Recommended Temperature Range 0°C 10°C 70°C
FPGA Over Temperature Shutdown 70-80°C
Maximum Storage Temperature Range -50°C 27°C 90°C
Relative Humidity (Non-Condensing) 0% 95%
verpower Considerations:
The Pico E-15 FX60 is designed desktop computers, and is not recommended for use in
laptops. Because of the large gate count of the FX60, it can easily exceed the PCCARD
maximum current consumption specification of 1A. The FX-60 features built in over-
temperature shutdown to protect both the card and the host system.
The Pico E-15 FX60 should be used with an external heat sink and an extender card.
Pico E-15 Hardware Reference www.picocomputing.com Pico Computing
(206) 283-2178 150 Nickerson Street. Suite 311
Seattle, WA 98109
8
Field Programmable Gate Array
The core of the Pico E-15 is a high performance Virtex-4 FPGA. Included in the FPGA are the
FPGA Fabric, an optional PowerPC ™ processor, ultra high-speed DSP slices and RAM.
FPGA Fabric:
The “Fabric” of an FPGA comprises an array of logic elements that can be connected in
virtually unlimited patterns. These patterns of logic elements can be used to perform basic
mathematical functions such as addition and subtraction, or can be grouped together to
perform complex functions like Fast Fourier Transforms. Logic elements can even be
connected to create a custom soft processor.
The advantage of the FPGA is that the internal logic can be optimized for a specific
application. FPGAs are also able to execute operations in parallel, not being limited by
sequential execution like a traditional processor. FPGA operations can be executed in a
parallel, pipelined or even an asynchronous manner. The FPGA allows incredible application
speed with very low power consumption. Your imagination is really the limit.
DSP Slice:
Embedded within the FPGA are special areas that are designed to facilitate high speed “digital
signal processing.” These areas are called DSP slices. The DSP slice can be configured in a
variety of different ways. For example, one DSP slice can be configured to be one tap of an
FIR filter. DSP slices are fully pipelined and feature incredible speed. When configured for FIR
filtering the DSP slice has a guaranteed performance of 500MHz with a latency of one cycle.
An 18x18 multiply and accumulate also runs at 250MHz with a latency of two cycles. Smaller
data widths allow higher clock speeds.
FPGA Resources:
Free FPGA Cores http //www.opencores.org
Encryption Cores http //www.openciphers.org
Virtex-4 Website http //www.xilinx.com/virtex4
Pico E-15 Hardware Reference www.picocomputing.com Pico Computing
(206) 283-2178 150 Nickerson Street. Suite 311
Seattle, WA 98109
9
PowerPC™ Processor
PPC405x3 Processor Introduction:
FPGAs are renowned for their ability to process parallel logic, but they typically have a hard
time emulating a high performance processor. To get the best of both worlds the Virtex-4™
features an embedded Power PC Processor. Since the processor shares the same die as the
FPGA it seamlessly interfaces with the FPGA fabric.
A new feature of the Virtex-4 FPGA is the addition of an auxiliary processor interface. The APU
is the highest speed interface between the PowerPC™ processor and the FPGA fabric. Up to
four custom instructions may be implemented in the FPGA, which are accessible from the
PowerPC™.
Board support packages are currently available for
µ
C/OS and Linux. Board support source
code is available open source under the GPL.
Pico E-15 Hardware Reference www.picocomputing.com Pico Computing
(206) 283-2178 150 Nickerson Street. Suite 311
Seattle, WA 98109
10
CPLD TurboLoader
A CPLD (Complex Programmable Logic Device) is a smaller version of an FPGA (described
above) with permanent Flash storage built in. The Pico E-15 contains one CPLD that loads
and reconfigures the FPGA. The Pico firmware guide describes how to access the CPLD
TurboLoader.
The Flash ROM’s address bus can be controlled by either the TurboLoader or the FPGA (but
not both). During power-up or reboot, the TurboLoader is in control of the Flash ROM Address
bus. At all other times the FPGA is in control of the address bus.
CPLD Resources:
Xilinx CPLD Website http //www.xilinx.com/cpld
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