NuDAQ ACL-7120A Manuel utilisateur
NuDAQ®
ACL-7120A
Digital I/O & Timer/Counter Card
User’s Guide
Copyright 1995, 2003 ADLINK TECHNOLOGY INC.
All Rights Reserved.
Manual Rev. 1.00: May 30, 2003
Part No: 50-11031-100
The information in this document is subject to change without prior notice in
order to improve reliability, design, and function and does not represent a
commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, special,
incidental, or consequential damages arising out of the use or inability to use
the product or documentation, even if advised of the possibility of such
damages.
This document contains proprietary information protected by copyright. All
rights are reserved. No part of this manual may be reproduced by any
mechanical, electronic, or other means in any form without prior written
permission of the manufacturer.
Trademarks
NuDAQ, ACL-7120A is registered trademarks of ADLINK TECHNOLOGY
INC.
Other product names mentioned herein are used for identification purposes
only and may be trademarks and/or registered trademarks of their respective
companies.
Getting Service from ADLINK
Customer Satisfaction is top priority for ADLINK TECHNOLOGY INC. If you
need any help or service, please contact us.
ADLINK TECHNOLOGY INC.
Web Site http://www.adlinktech.com
TEL +886-2-82265877 FAX +886-2-82265717
Address 9F, No. 166, Jian Yi Road, Chungho City, Taipei, 235 Taiwan
Please email or FAX your detailed information for prompt, satisfactory, and
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Table of Contents •i
Table of Contents
Chapter 1 Introduction.......................................................1
1.1 Features .................................................................................... 2
1.2 Applications............................................................................... 2
1.3 Specifications ............................................................................ 3
1.4 Software Support....................................................................... 5
1.4.1 ACLS-DLL1...........................................................................5
1.4.2 ACLS-LVIEW ........................................................................5
Chapter 2 Installation.........................................................7
2.1 What’s Included......................................................................... 7
2.2 Unpacking ................................................................................. 8
2.3 ACL-7120A Layout.................................................................... 9
2.4 Jumper and DIP Switch Description........................................ 10
2.5 Base Address Setting.............................................................. 11
2.6 Interrupt Settings..................................................................... 13
2.7 Clock Frequency Settings ....................................................... 15
2.8 ACL-7120A Software Library Installation................................ 16
Chapter 3 Signal Connections.........................................17
3.1 Connector Pin Assignment...................................................... 17
3.2 Timer/counter signal pads....................................................... 21
3.3 Interrupt Trigger Source.......................................................... 22
3.4 Clock Source Pads.................................................................. 23
3.5 Latch Digital Inputs.................................................................. 24
Chapter 4 Programming...................................................25
4.1 I/O Registers Format............................................................... 25
4.2 Digital I/O Programming.......................................................... 26
4.3 Programmable Interval Timer.................................................. 28
4.3.1 The Intel (NEC) 8254............................................................28
4.3.2 The Control Byte...................................................................28
4.3.3 Mode definition......................................................................30
Warranty Policy ................................................................33
ii •How to Use This Guide
How to Use This Guide
This manual is designed to assist users in understanding the ACL-7120A and
describes how to modify settings to meet specific application requirements.
Chapter 1 Introduction
Overview of product features, applications, and specifications.
Chapter 2 Installation
Describes install procedures, layout, DIP switch settings, and
jumper settings.
Chapter 3 Signal Connection
Illustrates the connector pin assignments, timer/counter signal
pad, and clock source.
Chapter 4 Programming
Demonstrates how to program the ACL-7120A.
Introduction •1
1
Introduction
The ACL-7120A digital I/O and counter/timer card consists of 32 digital input,
32 digital output, and 4 timer/counter channels. All digital input/output
channels are TTL/DTL compatible. The most outstanding feature of the ACL-
7120A is that it is fully hardware and software compatible with both the
ADLINK ACL-7120 and Advantech PCL-720 cards.
The ACL-7120A supports additional daughter boards like the ACLD-9182
and ACLD-9185 cards. The ACLD-9182 is a 16 channel opto-isolated digital
board for inputting digital data to the ACL-7120A when ground isolation is
required. The ACLD-9185 is a 16-channel relay output board that can be
driven by digital outputs from the ACL-7120A.
Up to four programmable interval timers (8254) are provided to add timer and
counter functionalities. To efficiently use the counter, three frequency
sources (10kHz, 100kHz, and 1MHz) are supported for the input of each
counter. In addition, the sources can also be doubled (X2), halved (1/2) or
quartered (1/4) through jumper settings to give more flexibility for different
frequency timer and counter applications.
An optional timer/counter chip is used to support a timer pacer that can
generate periodic interrupts. Also, an event counter can be used for external
event counting.
2 •Introduction
1.1 Features
•Fully compatible with ADLINK ACL-7120 and Advantech PCL-720
•32 TTL digital input channels
•32 TTL digital output channels
•High output driving and low input loading
•3 independent programmable 16-bit down counter
•One 32-bit timer (two 16-bit counter cascaded together) with a 4MHz
time base
•One 16-bit counter with 4MHz time base
•Crystal-based frequency source
•Breadboard area for customized circuits
1.2 Applications
•Industrial and laboratory ON/OFF control
•Energy management
•Annunciation
•Security controller
•Product test
•Period and pulse width measurement
•Event and frequency counting
•Waveform and pulse generation
•BCD interface driver
Introduction •3
1.3 Specifications
♦General Specification:
•Dimensions: 193.5 mm x 114 mm
•Bus: PC-AT bus
•I/O port address: Hex 200 - Hex 3FF
•Interrupt IRQ Level: IRQ3 - IRQ15
♦Digital Input:
•Input logic low voltage: Min. -0.5V, Max. 0.8V
•Input logic high voltage: Min. 2.0V, Max. 5.0V
•Input loading current: Max. 0.2 mA at 0.4V
•Input hysteresis: Typical 0.4V, Min. 0.2V
♦Digital Output:
•Output logic low voltage (Sink): Max. 0.5V at 24mA
•Output logic high voltage (Source): Min. 2V at –15mA
•Driving Capacity: All inputs and outputs are TTL/DTL compatible.
Outputs will drive 1 standard TTL load (74 series) or 4 LSTTL (74LS)
loads
•Input hysteresis: Typical 0.4V, Min. 0.2V
♦Programmable Counter:
•Frequency: 4MHz
•Counter:
Device Number of counters
ACL-7120A/3 3
ACL-7120A/6 4
4 •Introduction
•Mode: 6 programmable modes
•Usable pins:
Device Usable pins
ACL-7120A/3 CLK and GATE for counter 0 - counter 2
ACL-7120A/6 CLK and GATE for counter 0 - counter 3
•counter usage :
Device Counter usage
ACL-7120A/3 Counters 0 - 2 are customizable
ACL-7120A/6 Counters 0 - 2 are customizable
Counter 3 is used as the event counting
interrupt source or is user defined
Counters 4 and 5 are cascaded for timer pacer
generation
•Breadboard Area: plated through hole:
hole size: 1.0 mm
pad size: 1.5 mm
•Operating temperature: 0 to 60°C
•Storage Temperature: -20°C to 80°C
•Humidity: 5 to 90%, non-condensing
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