Microsemi LX7720 Manuel utilisateur

Production Datasheet

LX7720 Daughter Board User's Manual

June 2020 LX7720 Daughter Board rev 2.1 1

LX7720 Daughter Board User's Manual

Introduction

The LX7720 provides four half-bridge drivers with floating current sense for motor coil driving, six bi-level inputs for

position sensing, and a resolver to digital interface with primary coil driver. The LX7720 supports a ground potential

difference between the motor and signal grounds of up to 10V and motor supply voltages up to 60V.

When used with an FPGA or MCU controller, the LX7720 provides a complete open- or closed-loop motor driver with coil

current feedback and rotation or linear position sensing for stepper motors, brushless DC and permanent magnet motors.

Position sensing supports encoders, hall sensors, resolvers, synchros, and LVDTs. Resolver carrier frequencies from

360Hz to 20kHz are supported. FPGA IP modules are available to support motor driving functions from open loop cardinal

step driving to space vector modulation using field oriented control.

The LX7720 contains 7 sigma delta modulators for analog acquisition. Sinc filtering and decimation is performed in the

FPGA or MCU controller. Four modulators sample the voltage across floating current sense inputs. The remaining three

modulators sample differential analog inputs such as the filtered drive waveform and output waveforms of a resolver.

The LX7720 daughter board uses an FMC connector for plug-in connection to the RTG4 FPGA DEV-KIT (Figure 1) and

PolarFire FPGA MPF300-EVAL-KIT (Figure 2 on page 2) development boards. A 40-way header provides the same

signals for connection to other boards such as the ProASIC3 FPGA Starter Kit (Figure 3 on page 2), the SAMRH71F20

MCU Evaluation Kit (Figure 4 on page 2), and the SAMV71Q21RT MCU SAM V71 Xplained evaluation kit.

Kit Contents

• LX7720 evaluation board SOL-12-000003-11 with soldered-in-place LX7720-ES engineering sample

• Engineering sample (-ES marking suffix) explanation sheet

• 24V 1.5A universal input AC adapter

• 20x 0.1" pitch shorting jumpers

• 4x 2-position 5mm pitch terminal block sockets, EB9A-02-C or equivalent to mate J12, J18, J30, and J31

• 4-position 5mm pitch terminal block sockets, OSTTJ047150 or equivalent, to mate J9

• 3-position Molex 50-57-9403 2.54mm pitch wire housing latching header to mate J13

• 6-position Molex 50-57-9406 2.54mm pitch wire housing latching header to mate J14

• 8-position Molex 50-57-9408 2.54mm pitch wire housing latching header to mate J15

• 20x Molex 16-02-0096 crimp sockets to suit 24 - 30AWG wire, for J13, J14, and J15 housings

• USB stick with documentation (see section 1 on page 3)

Figure 1. LX7720 Daughter Board Connected to RTG4 DEV-KIT using the FMC Connector

LX7720 Daughter Board User's Manual

June 2020 LX7720 Daughter Board rev 2.1 2

Figure 2. PolarFire MPF300-EVAL-KIT Evaluation Kit Board with 300K LE PolarFire FPGA in an FCG1152 Package

Figure 3. ProASIC3E Starter Kit with A3PE1500-PQ208 FPGA

Figure 4. SAMRH71F20-EK Evaluation Kit with SAMRH71F20 Arm Cortex M7 (100MHz/200Dmips) microcontroller

Contact factory to

obtain a flexible

circuit to connect a

SAMRH71F20-EK

to the LX7720

daughter board as

shown on the left

Documentation and Support

June 2020 LX7720 Daughter Board rev 2.1 3

1 Documentation and Support

The USB stick included with the LX7720 daughter board includes the following:

• RTG4 targeted binaries and Libero projects for the following motor control systems:

 BLDC motor with resolver

 BLDC motor, sensorless

 Stepper motor

• GUI binaries and source for sensorless or resolver-feedback BLDCs (BLDC motor v4.1) and stepper motors (Stepper

motor v1.0) for the setup of LX7720 daughter board connected to RTG4 Development Board

 GUIs use the National Instruments Labview run-time engine, installer included on USB stick

 GUIs use the FTDI USB driver to connect to the FT4232 USB interface on the RTG4 development board, installer

included on USB stick

• Altium schematic and PCB files

• FPGA IP user guides on the USB stick are from https://www.microsemi.com/applications/motor-control#ip-suite. The

Microsemi Libero library offers IP for use with LX7720 that can be downloaded with the Libero license. Further

information is available at https://www.microsemi.com/applications/motor-control#resources

• For application support of radiation hardened mixed signal components such as LX7720, email

[email protected]

• For application support of radiation hardened FPGAs such as RTG4 and PolarFire, please register at the Microsemi

SoC Customer Portal. Once registered and logged in, open a case with FPGA Technical Support

2 LX7720 Daughter Board to RTG4 Development Kit Setup Example

These instructions cover driving a BLDC (with or without a resolver) to a combined LX7720-RTG4 system using the

included RTG4 firmware and GUI.

2.1 GUI Driver Software Installation

• Install the National Instruments Labview run-time engine

• Install the FTDI USB driver

2.2 RTG4 Hardware Connections

• Connect the LX7720 daughter board to the RTG4 board through the FMC connectors (Figure 1 on page 1)

• Check that the power slide switch on the RTG4 board is off (bottom/down position)

• Check that the power slide switch on the LX7720 board is off (top/up position)

• Power the RTG4 board with its 12V output AC adaptor, and the LX7720 board with its 24V output AC adaptor (Figure

5 below)

• Connect the RTG4 Development Kit to your host PC through a USB cable

• Connect a BLDC motor to connectors J9 on the LX7720 board (section 4.13 on page 16 has connection details)

 The Trinamic QBL4208-41-04-006 24V, 8 phase, 3 pole BLDC motor was used to develop the RTG4

programming

• Connect optional resolver to connectors J13 and J14 on the LX7720 board if desired (section 4.13 on page 16 has

connection details)

 The AMCI R11X-A10/7 resolver was used to develop the RTG4 programming

• Turn on the power switches on the RTG4 board and the LX7720 daughter board

Figure 5. RTG4 Development Kit (left) and LX7720 Daughter Board (right) power switches in OFF positions

LX7720 Daughter Board User's Manual

June 2020 LX7720 Daughter Board rev 2.1 4

2.3 Program RTG4 Firmware

Run Flashpro to program RTG4 using one of the following binaries as appropriate:

• For BLDC with resolver, use Top_RS.stp in RTG4 Programming Binaries\BLDC motor Resolver directory

• For sensorless BLDC, use Top_SL.stp in RTG4 Programming Binaries\BLDC motor Sensorless directory

2.4 Using the GUI

• Run MC_UART.exe in the GUIs\BLDC motor v4.1 directory

• Select the third COM port from the top left drop down menu, and click the red connect button immediately below. For

example, if COM31, COM32, COM33, COM34 are detected, then choose COM33

• Leave axis selection to its default value

• Use the SET button to configure motor speed, motor ramp rate, current and speed loop PI controller parameters

• Use the Configure button to open the Configure Motor Parameters window, and change PI controller constants Kp

and Ki, startup mode, soft stop setting, closed loop speed threshold, open loop current and voltage

LX7720 Daughter Board to RTG4 Development Kit Setup Example

June 2020 LX7720 Daughter Board rev 2.1 5

• Use the Configure Motor Specification button to change the motor specifications

• The GUI automatically plots waveforms when motor starts running

• The block diagram below shows the input and output parameters

• Parameter OMEGA is used to check speed

• The rate limiter block (not shown in the block diagram below) takes the speed input from the GUI and controls the rate

of change of reference speed provided to the speed PI controller

LX7720 Daughter Board User's Manual

June 2020 LX7720 Daughter Board rev 2.1 6

3 Board Sockets and Link Configuration

Figure 6 below identifies major circuit blocks, LEDs, and connectors.

Figure 7 on page 7 identifies link headers that configure signal and power supply options on the board, and set LX7720

pin configurations.

Table 1 on page 7 summarizes the functions of all connectors and link headers, and provides clickable links to the

appropriate parts of section 4 starting on page 10, which provides more detail and schematic around each one.

Default settings in Table 1 are highlighted in grey, and indicated in Figure 8 on page 9 for quick identification. These

defaults configure the board's power supplies to be generated internally from the 24V external DC supply plugged into J11

(VGS = 15V, VCC = 5V, VDD = 3.3V, VEE = internal), and selects control signals to be those provided at J10 (RTG4 FMC

connector) or J20 (40-way controller header).

Section 5 on page 17 provides pinouts for the controller interface connectors J10 and J20.

Figure 6. Location Diagram for Connectors, Circuit Blocks, and Power Rail Status LEDs

J9:

Motor Coil D

Motor Coil C

Motor Coil B

Motor Coil A

Motor Driver C

Motor Driver B

Motor Driver

J11 and SW1: 24V

DC Supply and Fuse

J12: VMPS Motor Supply input 10V to 60V J15: BL1 to BLI6 inputs J31: VGS External Supply 10V to 18V

J18: 3.3V input or output J14: BL1 to BLI6 inputs

J13: DMOD_OUT

J10: RTG4 Interface

J20: Controller Interface

J30: 5V input or output

J26: MOD_CLK

(ext. 24-32MHz)

R3: VREF adjust

VGS Internal

Supply 15V

regulator

D13: VPMS_IN LED

D15: 5V LED

D12: 3V3_SMC LED

D16: 3.3V LED

D14: VGS LED

J27: CP_CLK

Y2: MOD_CLK

(

internal 27MHz

)

J4: VEE External Supply

range -VGS to -8V

Board Sockets and Link Configuration

June 2020 LX7720 Daughter Board rev 2.1 7

Figure 7. Location Diagram for Configuration Links

Table 1. Configuration Link and Connector Settings Summary

Fitment Selection See Section Notes

Link 2 to 1 Use on-board adjustable voltage reference U2

J1 Link 2 to 3 Use LX7720's internal 2.5V ±0.8% voltage reference 4.6, page 12 Voltage

reference

Link 1 to 2 Connect signal ground SGND to motor ground MGND

J2 Open Signal ground SGND is isolated from motor ground MGND 4.5, page 12 SGND to

MGND link

Link 1 to 2 Fit when using external negative VEE supply via the J4 header

J3 Open Internal VEE supply is used. Do not attach an external supply to the J4 header 4.4, page 12 VEE select

Pin 1: VEE

Pin 2: GND

When using external VEE supply in the range -VGS to -8V, apply VEE to header

J4, and ensure that J3 is fitted with a link to select the external VEE supply option

External -VGS

to -8V VEE

Open Internal VEE supply is used. J4 is available to monitor the VEE voltage

4.4, page 12 Internal VEE

Open, or

Link 1 to 2

Select longer DMOD_OUT_N pin 44 and DMOD_OUT_P pin 46 driver

propagation delay by setting LX7720 DMOD_BW pin 114 = low

Pin 1 to VDD

Select shorter DMOD_OUT_N pin 44 and DMOD_OUT_P pin 46 driver

propagation delay by setting LX7720 DMOD_BW pin 114 = high. Nearby VDD

points include J38 pin 1 and J40 pin 1

4.13,

page 16

Resolver/LVDT

driver

propagation

delay

J36

J35

J40 J39 J32

J16

J17

J38

J19

LX7720 Daughter Board User's Manual

June 2020 LX7720 Daughter Board rev 2.1 8

Fitment Selection See Section Notes

Link 1 to 2

Enables the LC filter comprising L1, C29, C30, and R6 between LX7720

DMOD_OUT_N pin 44 and DMOD_OUT_P pin 46 outputs. The filter shapes the

PWM output waveform to drive a resolver or LVDT primary

Open The LX7720 DMOD_OUT_N pin 44 and DMOD_OUT_P pin 46 outputs remain

unfiltered PWM

4.13,

page 16

Resolver/LVDT

driver filter

Link 1 to 2

Couple the filtered resolver/LVDT driver outputs LX7720 DMOD_OUT_N pin 44

and DMOD_OUT_P pin 46 to LX7720 ADC3_N pin 36 and ADC3_P pin 37 for

measurement of the drive amplitude and fault detection

Resolver/LVDT

driver

measurement

J7,

Open LX7720 ADC3_N pin 36 and ADC3_P pin 37 are available for other purposes

4.13,

page 16

ADC3 inputs

J10 HPC1-FMC

connector

HPC1-FMC connector to RTG4 Development Kit board. The same signals are

provided to this FMC connector and the 40-pin header J20, so connect to one or

the other but not both

5, page 17 RTG4 interface

J13 DMOD

outputs

Resolver/LVDT driver outputs LX7720 DMOD_OUT_N pin 44 and DMOD_OUT_P

pin 46 outputs. If J6 is linked to enable the on-board LC filter, then the filtered

drive outputs are available at J13 pins 2 and 3. If J6 is open, then the raw PWM

drive outputs are available at J13 pins 1 and 3

4.13,

page 16

Resolver/LVDT

driver outputs

J14 ADC Inputs The 3 differential inputs {ADC1_P, ADC1_N}, {ADC2_P, ADC2_N}, and {ADC3_P,

ADC3_N} feed the ADC1, ADC2, and ADC3 sigma delta modulators

4.13,

page 16 ADC1 to ADC3

J15 BLI Inputs BLI1 to BLI6 inputs, VCC, and GND. BLI_TH is set to VCC/2 by R4 & R5 4.12,

page 15 BLI inputs

Link 1 to 2 Fit when not using J16 to measure VDD (nominally 3.3V) supply current Normal usage

Shunt resistor

or ammeter Replace link with current measuring device if desired for VDD from regulator U4 Measure V

current

J16

Open External VDD supply in the range 2.75V to 3.6V at connector J18

4.3, page 11

External 2.75V

to 3.6V VDD

Link 1 to 2 Fit when not using J17 to measure VCC (nominally 5V) supply current from

regulator U10 Normal usage

Shunt resistor

or ammeter Replace link with current measuring device if desired for VCC from regulator U10 Measure VCC

current

J17

Open External VCC supply in the range 4.5V to 5.5V at connector J30

4.3, page 11

External 4.5V

to 5.5V VCC

J18 Pin 1: VDD

Pin 2: GND

When using external VDD supply in the range 2.75V to 3.6V, apply the VDD

supply to J18, and ensure that J16 is open so that regulator U4 is not back-driven 4.2, page 10 External 2.75V

to 3.6V VDD

Link 2 to 1

VDD supply is 3.3V from FMC connector J10 pins C39, D32, D36, D38, and D40.

J16 also needs to be linked. Do not apply an external VDD supply to either J18 or

J20 pin 30 with an RTG4 Development Kit board plugged into J10, because this

will back-drive the RTG4 Development Kit's 3.3V supply

VDD = 3.3V

from J10

Link 2 to 3 VDD supply is from 3.3V regulator U4. Configure J36 for desired U4 voltage

source also

VDD = internal

3.3V

J19

Open

VDD supply is 2.75V to 3.6V from either 40-pin header J20 pin 30 or from J18.

Ensure that J16 is also open so that regulator U4 or an RTG4 Development Kit

board plugged into J10 are not back-driven

4.2, page 10

2.75V to 3.6V

VDD from J20

pin 30 or J18

J20 Controller

connector

40 pin header to external MCU or FPGA controller. The same signals are

provided to this 40-pin header and the FMC connector J10, so connect to J10 or

to J20, but not to both

5, page 17 Controller

interface

J26 SMA socket External 24MHz to 32MHz MOD_CLK. R136 = 33Ω must be fitted 4.7, page 13 MOD_CLK

J27 SMA socket External 100kHz to 300kHz CP_CLK. R135 = 33Ω must be fitted 4.8, page 13 Charge pump

J30 Pin 1: VCC

Pin 2: GND

When using external VCC supply in the range 4.5V to 5.5V, apply the VCC supply

to J30, and ensure that J17 is open so that regulator U10 is not back-driven 4.3, page 11 External 4.5V

to 5.5V VCC

J31 Pin 1: VGS

Pin 2: GND

When using external VGS supply in the range 10V to 18V, apply the VGS supply

to J31, and ensure that link J32 is open so that regulator U3 is not back-driven 4.1, page 10 External 10V to

18V VGS

Link 1 to 2 Fit when using internal 15V supply for VGS, and not using J32 to measure 15V

supply current Normal usage

Shunt resistor

or ammeter

Replace link with current measuring device if desired when using internal 15V

supply for VGS

Measure VGS

current

J32

Open Omit link when using external VGS supply in the range 10V to 18V at connector

J31

4.1, page 10

External 10V to

18V VGS

Link 2 to 1 VCC (5V) regulator U10 source is the VGS rail selected by J32 Normal usage

Link 2 to 3 VCC (5V) regulator U10 source is 12V from FMC connector J10 pins C35 and

C37 RTG4 source

J35

Open

VCC (5V) regulator U10 source is unpowered. Provide an external 4.5V to 5.5V at

connector J30, and ensure that link J17 is open so that regulator U10 is not back-

driven

4.1, page 10

External 4.5V

to 5.5V VCC

Board Sockets and Link Configuration

June 2020 LX7720 Daughter Board rev 2.1 9

Fitment Selection See Section Notes

Link 2 to 1 VDD (3.3V) regulator U4 source is the VGS rail selected by J32 Normal usage

Link 2 to 3 VDD (3.3V) regulator U4 source is 12V from FMC connector J10 pins C35 and

C37 RTG4 source

J36

Open VDD (3.3V) regulator U4 source is unpowered. Provide an external 2.7V to 3.6V

at connector J18, and leave link J16 open so that regulator U4 is not back-driven

4.3, page 11

External 2.75V

to 3.6V VDD

Link 2 to 1 Put LX7720 into reset condition by setting LX7720 RESET pin 18 = low. Reset

clears latched OC_FAULT, PR_FAULT, and/or over-temperature shutdown faults Reset on

Link 2 to 3

LX7720 RESET pin 18 is controlled by an external signal on FMC connector J10

pin G16 or 40 pin header J20 pin 31. A pull-down resistor ensures that LX7720

remains out of reset condition if the external signal is open

Managed by

controller on

J10 or J20

J38

Open Lock LX7720 out of reset condition by setting RESET pin 18 = low

4.10, page

Reset off

Link 2 to 1 Disable Safe Mode by setting LX7720 SM_EN pin 17 = low Safe Mode on

Link 2 to 3

LX7720 SM_EN pin 17 is controlled by an external signal on FMC connector J10

pin H17 or 40 pin header J20 pin 27. A pull-up resistor ensures that Safe Mode is

enabled by default if the external signal is open

Managed by

controller on

J10 or J20

J39

Open Enable Safe Mode by setting LX7720 SM_EN pin 17 = high

4.11,

page 15

Safe Mode off

Link 2 to 1 Enable Simultaneous Conduction Protection by setting LX7720 SCP pin 117 =

high SCP on

Link 2 to 3

LX7720 SCP pin 117 is controlled by an external signal on FMC connector J10

pin K23 or 40 pin header J20 pin 29. A pull-down resistor ensures that

Simultaneous Conduction Protection is disabled by default if the external signal is

open

Managed by

controller on

J10 or J20

J40

Open Disable Simultaneous Conduction Protection by setting LX7720 SCP pin 117 =

low

4.9, page 14

SCP off

Figure 8. Default Shorting Jumper Positions, as highlighted in grey in Table 1

LX7720 Daughter Board User's Manual

June 2020 LX7720 Daughter Board rev 2.1 10

4 LX7720 Daughter Board Configuration Options

4.1 VGS Gate Driver Supply (15V) Regulator Settings

The header J32 selects either the on-board 15V regulator, or an external 10V to 18V power supply connected to J31

(Table 2, Figure 9).

Table 2. VGS Gate Driver Supply (15V) Link Settings

VGS Regulator Source J32 Link J31 Connector

VGS is 15V using on-board regulator U3 supplied by external

24V AC adapter connected to DC power socket J11

Link 1 to 2 or insert ammeter

to measure VGS current Open

VCC is external 4.5V to 5.5V at connector J30 Open External 10V to 18V power supply

D11

STPS5L60S

BOOT

VIN

SS/TR

RT/CLK

5PWRGD 6

VSENSE 7

COMP 8

GND 9

PH 10

EPAD

TPS54160ADRCR

TP1

VIN_JCK

VGS_R

C57

2.2uF/100V/1210

C58

2.2uF/100V/1210

C59

2.2uF/100V/1210

C60

2.2uF/100V/1210

R44

332K/1%/0805

R46

56.2K/1%/0805

C61

0.01uF/100V/0805

R47

165K/1%/0805

R48

76.8K/1%/0805

C63

2700pF/50V/0805

C62

5.6pF/50V/0805

L2 33uH/2.7A

MSS1260-333MLB

C56

33uF/25V/1206

R45

178K/1%/0805

VGS

C52

0.1uF/25V/0805

C53

1uF/25V/0805

C54

4.7uF/25V/0805

C55

10uF/25V/0805

15V

R50

100K/0805

C70

33uF/25V/1206

D14

LTST-C190GKT

GREEN,10mA

J31

OSTOQ027150

J32

HDR_2_100MIL

VGS_R

C51 0.1uF/50V/0805

R49

10K/1%/0805

R56

1K/1%/0805

VGS

Figure 9. VGS Gate Driver Supply (15V) Regulator Schematic

4.2 VDD Logic Supply (3.3V) Regulator Settings

The headers J36, J19, and J16 select either the on-board 3.3V regulator and its power source, or an external 2.7V to 3.6V

power supply connected to J18 (Table 3, Figure 10).

While the LX7720 allows a logic supply range of 2.1V to 5.5V, the LX7720 daughter board's allowed range is 2.7V to

3.6V. This limitation is due to the supply range of the ASVMPC-27.000MHZ-LR-T 27MHz oscillator module Y2, and the

SN74LVTH16245A bus transceivers that interface both the 2x20 pin controller interface header J20 and the RTG4

interface FMC connector J10.

Table 3. VDD Logic Supply (3.3V) Regulator Link Settings

VDD Regulator Source J36 Link J19 Link J16 Link J18 Connector

VDD is on-board 3.3V using regulator U4 supplied by VGS rail Link 2 to 1 Open

VDD is on-board 3.3V using regulator U4 supplied by 12V

from FMC connector J10 pins C35 and C36 (RTG4 board) Link 2 to 3 Link 2 to 3 Open

VDD is external 3.3V from FMC connector J10 pins C39, D32,

D36, D38, and D40 (RTG4 board) Regulator U4 is unpowered Open Link 2 to 1

Link 1 to 2 or

insert ammeter

to measure

VDD current Open

VDD is external 2.7V to 3.6V at connector J18

Regulator U4 is unpowered Open Open Open External 2.7V to

3.6V power supply

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