Freescale Semiconductor TWR-K21F120MA Manuel utilisateur

Freescale Semiconductor, Inc.

TWR-K21F120MA Tower Module

User’s Manual

Rev. 0

TWR-K21F120MA Tower Module User’s Manual, Rev. 0, 09/2015

2 Freescale Semiconductor, Inc.

Table of Contents

1TWR-K21F120MA ..............................................................................................................................3

2Contents................................................................................................................................................4

3TWR-K21F120MA Features.............................................................................................................4

4Get to Know the TWR-K21F120MA...............................................................................................5

5Reference Documents.......................................................................................................................6

6Hardware description.......................................................................................................................7

6.1 Block Diagram............................................................................................................................................................................... 7

6.2 Microcontroller ............................................................................................................................................................................8

6.3 Clocking ......................................................................................................................................................................................... 10

6.4 System Power............................................................................................................................................................................. 10

6.5 DryIce and RTC VBAT ............................................................................................................................................................ 10

6.6 Debug Interface ......................................................................................................................................................................... 10

6.7 OSJTAG ........................................................................................................................................................................................... 10

6.8 Cortex Debug Connector....................................................................................................................................................... 11

6.9 Accelerometer............................................................................................................................................................................ 12

6.10 Potentiometer, Pushbuttons, LEDs .............................................................................................................................. 12

6.11 General Purpose Tower Plug-in (TWRPI) Socket................................................................................................. 13

6.12 USB................................................................................................................................................................................................ 14

6.13 Secure Digital Card Slot...................................................................................................................................................... 14

6.14 External Bus Interface - FlexBus ................................................................................................................................... 14

7TWR-K21F120MA Jumper Options and Headers ................................................................... 15

8Useful links ....................................................................................................................................... 17

TWR-K21F120MA Tower Module User’s Manual, Rev. 0, 09/2015

Freescale Semiconductor, Inc. 3

1TWR-K21F120MA

The TWR-K21F120MA microcontroller module is designed to work either in standalone mode or as part of the

Freescale Tower System, a modular development platform that enables rapid prototyping and tool re-use through

reconfigurable hardware. Take your design to the next level and begin constructing your Tower System today by

visiting www.freescale.com/tower for additional Tower System microcontroller modules and compatible peripherals.

For TWR-K21F120MA specific information and updates visit www.freescale.com/TWR-K21F120MA.

Figure 1 Freescale Tower System Overview

TWR-K21F120MA Tower Module User’s Manual, Rev. 0, 09/2015

4 Freescale Semiconductor, Inc.

2Contents

The TWR-K21F120MA contents include:

TWR-K21F120MA board assembly

3 ft A to micro-B USB cable for debug interface and power or MK21FN1M0AVMC12 USB interface

CR2025 coin cell battery for VBAT power supply

Quick Start Guide

3TWR-K21F120MA Features

Tower-compatible microcontroller module

MK21FN1M0AVMC12 MCU (120 MHz, 1 MB Flash, 128 KB RAM, low power, 121 MAPBGA package)

Dual-role USB interface with Micro-AB USB connector

General-purpose Tower Plug-in (TWRPI) socket

On-board debug circuit: MC9S08JM60 open source JTAG (OSJTAG) with virtual serial port

Three-axis accelerometer (MMA8451Q)

Four (4) user-controllable LEDs

Two (2) user pushbutton switches for GPIO interrupts

One (1) user pushbutton switch for MCU reset

Potentiometer

Independent, battery-operated power supply for Real Time Clock (RTC) and tamper detection modules

SD Card slot

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4Get to Know the TWR-K21F120MA

Figure 2 Front side of TWR-K21F120MA module

(TWRPI devices not shown)

VBAT options

K21 Micro-USB

microUSB

Accelerometer

SW2

Power/OSJTAG

Micro-USB

Potentiometer

General Purpose

TWRPI Plug-In

Board power selection

LEDs

RESET

JTAG

JM60 debug

Regulator option

selector

Tamper pins

SW3

USB option selector

JM60 Bootloader

Enable

TWR-K21F120MA Tower Module User’s Manual, Rev. 0, 09/2015

6 Freescale Semiconductor, Inc.

Figure 3 Back side of TWR-K21F120MA

5Reference Documents

The documents listed below should be referenced for more information on the Kinetis family, Tower System, and

MCU Modules. These can be found in the documentation section of http://www.freescale.com/TWR-K21F120MA or

http://www.freescale.com/kinetis

TWR-K21F120MA-SCH: Schematics

TWR-K21F120MA-PWA: Design Package

K21P121M120SF5V2RM: Reference Manual

Tower Configuration Tool

Tower Mechanical Drawing

Battery Receptacle

SD Card Receptacle

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6Hardware description

The TWR-K21F120MA is a Tower MCU Module featuring the MK21FN1M0AVMC12 a Kinetis microcontroller in a 121

MAPBGA package with USB 2.0 full-speed on-the-go (OTG) controllers and system security and tamper detection with

a secure real-time clock with independent battery supply. It is intended for use in the Freescale Tower System but can

also operate stand-alone. An on-board OSJTAG debug circuit provides a JTAG interface and a power supply input

through a single micro-USB connector.

The block diagram of the TWR-K21F120MA board is presented in the following figure:

6.1 Block Diagram

Figure 4 Block Diagram of TWR-K21F120MA

OSJTAG

JTAG

Power

SCI

120

121

MABGA

Tower Elevator Expansion Connectors

SDHC

SPI

ADC

USB

PWM

UARTs

FTM

FlexBus

MHz XTAL

SCI

Freescale Device

External Connectors

Interface Circuits

Power

Accelerometer

MMA

8451

GPIO

Interrupts

LLWU

ADC

Reset

JTAG

768

KHz XTAL

regulator

General Purpose

Tower Plug

(

TWRPI

)

SPI

ADC

GPIO

LED

Battery

Holder

VBAT

(

RTC

)

USB

(

Device

Host

)

Micro

USB

SD Card Slot

SDHC

LED

regulator

VDD

DryIce Tamper

Pins

DryIce

Tamper

Micro

USB

TWR-K21F120MA Tower Module User’s Manual, Rev. 0, 09/2015

8 Freescale Semiconductor, Inc.

6.2 Microcontroller

The TWR-K21F120MA features the MK21FN1M0AVMC12 MCU. This 120 MHz microcontroller is part of the Kinetis

K2x family and is implemented in a 121 MAPBGA package. The following table notes some of the features of the

MK21FN1M0AVMC12 MCU.

Table 1 Features of MK21FN1M0AVMC12

Feature

Description

Ultra low power

–11 low-power modes with power and clock gating for optimal

peripheral activity and recovery times.

–Full memory and analog operation down to 1.71 V for extended battery

life

–Low-leakage wake-up unit with up to six internal modules and sixteen

pins as wake-up sources in low-leakage stop (LLS)/very low-leakage

stop (VLLS) modes

–Low-power timer for continual system operation in reduced power

states

Flash and SRAM

–1-MB flash featuring fast access times, high reliability, and four levels of

security protection

–128 KB of SRAM

–No user or system intervention to complete programming and erase

functions and full operation down to 1.71 V

Mixed-signal capability

–Two high-speed 16-bit SAR ADCs with configurable resolution

–Single or differential output modes for improved noise rejection

–500-ns conversion time achievable with programmable delay block

triggering

–Three high-speed comparators providing fast and accurate motor over-

current protection by driving PWMs to a safe state

–Optional analog voltage reference provides an accurate reference to

analog blocks and replaces external voltage references to reduce

system cost

–Two 12-bit DACs

Performance

–120 MHz ARM Cortex-M4 core with DSP and FPU instruction set, single

cycle MAC, and single instruction multiple data (SIMD) extensions

–Up to four channel DMA for peripheral and memory servicing with

reduced CPU loading and faster system throughput

–Cross bar switch enables concurrent multi-master bus accesses,

increasing bus bandwidth

–Independent flash banks allowing concurrent code execution and

firmware updating with no performance degradation or complex coding

routines

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Timing and Control

–Three FlexTimers with a total of 12 channels

–Hardware dead-time insertion and quadrature decoding for motor

control

–Carrier modulator timer for infrared waveform generation in remote

control applications

–Four-channel 32-bit periodic interrupt timer provides time base for

RTOS task scheduler or trigger source for ADC conversion and

programmable delay block

Connectivity and

Communications

–Full-Speed USB Device/Host/On-The-Go with device charge detect

capability

–Optimized charging current/time for portable USB devices, enabling

longer battery life

–USB low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to

power external components from 5-volt input

–Six UARTs:

oone UART supports RS232 with flow control, RS485, ISO7816,

IrDA

ofive UARTs support RS232 with flow control and RS485

–One Inter-IC Sound (I2S) serial interface for audio system interfacing

–Two DSPI modules and two I2C modules

–Secured digital host controller (SDHC)

–A multi-function external bus interface called the FlexBus interface

controller capable of interfacing to slave-only devices.

Reliability, Safety and

Security

–Hardware Encryption co-processor for secure data transfer and storage.

Faster than software implementations and with minimal CPU loading.

Supports a wide variety of algorithms - DES, 3DES, AES, MD5, SHA-1,

SHA-256

–System security and tamper detection with secure real-time clock (RTC)

and independent battery supply. Secure key storage with

internal/external tamper detection for unsecured flash, temperature,

clock, and supply voltage variations and physical attack detection

–Memory protection unit provides memory protection for all masters on

the cross bar switch, increasing software reliability

–Cyclic redundancy check (CRC) engine validates memory contents and

communication data, increasing system reliability

–Independently-clocked COP guards against clock skew or code runaway

for fail-safe applications such as the IEC 60730 safety standard for

household appliances

–External watchdog monitor drives output pin to safe state for external

components in the event that a watchdog timeout occurs

–Included in Freescale’s product longevity program, with assured supply

for a minimum of 10 years after launch

TWR-K21F120MA Tower Module User’s Manual, Rev. 0, 09/2015

10 Freescale Semiconductor, Inc.

6.3 Clocking

The Kinetis MCUs start up from an internal digitally controlled oscillator (DCO). Software can enable the main

external oscillator (EXTAL0/XTAL0) if desired. The external oscillator/resonator can range from 32.768 KHz up to a 32

MHz. An 8 MHz crystal is the default external source for the MCG oscillator inputs (XTAL/EXTAL).

A 32.768 KHz crystal is connected to the RTC oscillator inputs by default.

By populating isolation resistors, other external clock sources for the MK21FN1M0AVMC12 include the CLKIN0 signal

that can be provided through the TWR-ELEV or pin 20 of TWRPI connector J3.

6.4 System Power

When installed into a Tower System, the TWR-K21F120MA can be powered from either an on-board source or from

another source in the assembled Tower System.

In stand-alone operation, the main power source (5.0 V) for the TWR-K21F120MA module is derived from either the

OSJTAG USB mini-B connector (J2) or the MK21FN1M0AVMC12 USB micro-AB connector (J19). Two low-dropout

regulators provide 3.3 V and 1.8 V supplies from the 5.0 V input voltage. Additionally, the 3.3 V regulator built into

the MK21FN1M0AVMC12 MCU can be selected to power the 3.3 V bus. All the user selectable options can be

configured using two headers, J11 and J17. Refer to sheet 5 of the TWR-K21F120MA schematics for more details.

6.5 DryIce and RTC VBAT

The DryIce tamper detection module and the Real Time Clock (RTC) module on the MK21FN1M0AVMC12 have two

modes of operation: system power-up and system power-down. During system power-down, the tamper detection

module and the RTC are powered from the backup power supply (VBAT) and electrically isolated from the rest of the

MCU. The TWR-K21F120MA provides a battery receptacle for a coin cell battery that can be used as the VBAT supply.

The receptacle can accept common 20-mm diameter 3 V lithium coin cell batteries.

6.6 Debug Interface

There are two debug interface options provided: the on-board OSJTAG circuit and an external ARM JTAG connector.

The ARM-JTAG connector (J1) is a standard 2x10-pin connector providing an external debugger cable with access to

the JTAG interface of the MK21FN1M0AVMC12. Alternatively, the on-board OSJTAG debug interface can be used to

access the debug interface of the MK21FN1M0AVMC12.

6.7 OSJTAG

An on-board MC9S08JM60 based Open Source JTAG (OSJTAG) circuit provides a JTAG debug interface to the

MK21FN1M0AVMC12. A standard USB A male to micro-B male cable (provided) can be used for debugging via the

USB connector (J2). The OSJTAG interface also provides a USB to serial bridge. Drivers for the OSJTAG interface are

provided in the P&E Micro OSBDM/OSJTAG Tower Toolkit. These drivers and more utilities can be found online at

http://www.pemicro.com/osbdm.

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