Cypress CY8C28623-24LTXI Manuel utilisateur

CY3280-28XXX Universal CapSense®

Controller Development Kit Guide

Spec. # 001-57457 Rev. **

Cypress Semiconductor

198 Champion Court

San Jose, CA 95134-1709

Phone (USA): 800.858.1810

Phone (Intnl): 408.943.2600

http://www.cypress.com

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2 CY3280-28XXX Universal CapSense® Controller Development Kit Guide, Spec. # 001-57457 Rev. **

Copyrights

PSoC®and CapSense® are registered trademarks and CapSense Plus™ and PSoC Designer™ are trademarks of Cypress

Semiconductor Corporation (Cypress), along with Cypress®and Cypress Semiconductor™. All other trademarks or regis-

tered trademarks referenced herein are the property of their respective owners.

Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the Phil-

ips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Specification

as defined by NXP.

The information in this document is subject to change without notice and should not be construed as a commitment by

Cypress. While reasonable precautions have been taken, Cypress assumes no responsibility for any errors that may appear

in this document. No part of this document may be copied, or reproduced for commercial use, in any form or by any means

without the prior written consent of Cypress. Made in the U.S.A.

Disclaimer

CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL,

INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PAR-

TICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein.

Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress

does not authorize its products for use as critical components in life-support systems where a malfunction or failure may rea-

sonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems appli-

cation implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Flash Code Protection

Note the following details of the Flash code protection features on Cypress devices.

Cypress products meet the specifications contained in their particular Cypress Data Sheets. Cypress believes that its family of

products is one of the most secure families of its kind on the market today, regardless of how they are used. There may be

methods that can breach the code protection features. Any of these methods, to our knowledge, would be dishonest and pos-

sibly illegal. Neither Cypress nor any other semiconductor manufacturer can guarantee the security of their code. Code pro-

tection does not mean that we are guaranteeing the product as “unbreakable.”

Cypress is willing to work with the customer who is concerned about the integrity of their code. Code protection is constantly

evolving. We at Cypress are committed to continuously improving the code protection features of our products.

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CY3280-28XXX Universal CapSense® Controller Development Kit Guide, Spec. # 001-57457 Rev. ** 3

Contents

1. Introduction 5

1.1 Kit Components ...........................................................................................................6

1.2 CD Directory Structure.................................................................................................6

1.3 Board Features............................................................................................................7

1.4 Documentation Conventions .......................................................................................7

1.5 Document Revision History ........................................................................................7

2. Quick Start 9

2.1 Getting Started.............................................................................................................9

2.1.1 Install PSoC Designer Development Software.................................................9

2.1.2 CapSense Best Practices ................................................................................9

2.2 Using the Board as Factory Programmed .................................................................11

2.2.1 Powering the Board........................................................................................11

2.2.2 Testing the Board...........................................................................................12

2.2.3 Resetting the Board to the Original Factory Programming ............................12

2.3 Creating a CapSense Project Using PSoC Designer 5.0 ..........................................13

2.3.1 Starting a New Project....................................................................................13

2.3.2 Adding CSD2X, LED, and EzI2Cs User Modules to Your Design..................13

2.3.3 Configuring LED and EzI2Cs User Modules..................................................14

2.3.4 Configuring the CSD2X User Module ............................................................15

2.3.5 Adding Code to main.c and Building the Project............................................16

2.3.6 Programming the CY3280-28XXX Board.......................................................17

2.3.7 Testing the Board...........................................................................................17

3. Hardware Design Notes 19

3.1 CY3280-28XXX Universal CapSense® Controller Board Features...........................19

3.1.1 PSoC Power Supplies....................................................................................19

3.1.2 Dual Channel CSD Scanning.........................................................................20

3.1.3 32.768 kHz External Crystal Oscillator...........................................................20

3.2 Hardware Interface and Description ..........................................................................21

3.2.1 Potentiometer in Parallel with Cmod Selection Jumper (JP1, JP2) ...............22

3.2.2 PSoC VCC Selection Jumper (JP3)...............................................................22

3.2.3 XRES/INT Selection Jumper (JP4)................................................................22

3.2.4 External 9V Battery Power Connector (BH1).................................................22

3.2.5 SPI/I2C Interface (J1).....................................................................................23

3.2.6 RS232 Interface (J2)......................................................................................23

3.2.7 ISSPI/I2CUSB Interface (J3)..........................................................................24

3.2.8 ICE Interface (J4)...........................................................................................24

3.2.9 External Power Supply Interface (J5).............................................................25

3.2.10 CY3280-SLM Board Connector (J6)..............................................................25

3.2.11 CY3280-CPM1 Board Connector (J7)............................................................27

3.3 Test Points.................................................................................................................28

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Contents

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CY3280-28XXX Universal CapSense® Controller Development Kit Guide, Spec. # 001-57457 Rev. ** 5

1. Introduction

Welcome to the CY3280-28XXX Universal CapSense®Controller Board. This kit is designed to

show the features of CY8C28XXX. The CY8C28XXX family of PSoC®1 devices includes the follow-

ing parts: CY8C28403-24PVXI, CY8C28413-24PVXI, CY8C28513-24AXI, CY8C28623-24LTXI,

CY8C28433-24PVXI, CY8C28533-24AXI, CY8C28243-24PVXI, CY8C28643-24LTXI, CY8C28445-

24PVXI, CY8C28545-24AXI, and CY8C28645-24LTXI. The CY3280-28XXX Universal CapSense

Controller Board contains the 56-pin OCD part. The 56-pin OCD part is only used for in-circuit

debugging.

Note OCD parts are NOT available for production.

The CapSense feature of CY8C28XXX can be implemented with the CY3280-SLM Universal

CapSense Linear Slider Module. The two boards are connected by a 44-pin connector. The other

features of CY3280-28XXX can be implemented with the CY3280-CPM1 Universal CapSense

Plus™ Controller Module. The two boards are connected by a 40-pin connector. The CY3280-SLM

Universal CapSense Linear Slider Module and the CY3280-CPM1 Universal CapSense Plus Con-

troller Module can be connected to the CY3280-28XXX Universal CapSense Controller Board at the

same time.

Figure 1-1. CY3280-28XXX Universal CapSense Controller Board

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Introduction

6 CY3280-28XXX Universal CapSense® Controller Development Kit Guide, Spec. # 001-57457 Rev. **

1.1 Kit Components

The following items are included in the kit:

■CY3280-28XXX Universal CapSense Controller Board

■CY3280-28XXX Universal CapSense Controller Board CD

■CY3240-I2CUSB Board

■CY3210-MiniProg1 Programmer

■PSoC Designer 5.0 SP6 CD

■Printed Documents

These tools are not included in CY3280-28XXX Universal CapSense Controller Board Kit, but may

be needed to use it. They can be found in other Cypress kits. These kits are available at

www.cypress.com. To demonstrate CapSense functions, the kit requires a CY3280-SLM to work. To

demonstrate CapSense Plus functions, the kit requires a CY3280-CPM1

■CY3280-SLM Universal CapSense Linear Slider Module Board

■CY3280-CPM1 CapSense Plus Module for CY8C28XXX

■CY3215-ICE

■CY3250-28XXX POD

1.2 CD Directory Structure

This list describes the higher level directory structures in the CD-ROM and does not explore the

lower level directories.

|---Docs 'Docs' contains the kit documentation in PDF form

|---Hardware 'Hardware ' contains the design files used in the

development of the Kit

| |---Schematic

| |---BOM

| |---SilkScreen

| |---Gerber

|---Firmware 'Firmware' contains the firmware related files

| |-- CapSense Example Project

| |-- CapSense Plus Example Projects

|---Software Software' contains PC software tools

| |---PSoC Tools

| |---I2CUSB Command

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CY3280-28XXX Universal CapSense® Controller Development Kit Guide, Spec. # 001-57457 Rev. ** 7

Introduction

1.3 Board Features

■Supports CY3280-SLM Universal CapSense Linear Slider Module

■Supports CY3280-CPM1 CapSense Plus Module

■External 12V power supply or 9V battery input

■Fixed 5V or adjustable voltage for PSoC

■ICE interface for in-circuit debugging

■MiniProg programmer interface

■RS232 interface

■LEDs indicate power status

■32.768 kHz external OSC option

■Multiple test points

1.4 Documentation Conventions

1.5 Document Revision History

Table 1-1. Document Conventions for Guides

Convention Usage

Courier New Displays file locations, user entered text, and source code:

C:\ ...cd\icc\

Italics Displays file names and reference documentation:

Read about the sourcefile.hex file in the PSoC Designer User Guide.

[Bracketed, Bold]Displays keyboard commands in procedures:

[Enter] or [Ctrl] [C]

File > Open Represents menu paths:

File > Open > New Project

Bold Displays commands, menu paths, and icon names in procedures:

Click the File icon and then click Open.

Times New Roman Displays an equation:

2 + 2 = 4

Text in gray boxes Describes Cautions or unique functionality of the product.

Table 1-2. Revision History

Revision PDF

Creation

Date

Origin of

Change Description of Change

** 01/18/10 JPLU Initial Release

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Introduction

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CY3280-28XXX Universal CapSense® Controller Development Kit Guide, Spec. # 001-57457 Rev. ** 9

2. Quick Start

In this chapter you will learn to get started with the CY3280-28XXX Universal CapSense®Controller

Development Kit, use the board as programmed by the factory, and create a CapSense project using

PSoC®Designer™.

2.1 Getting Started

This section contains instructions for installing PSoC Designer software and a discussion of

CapSense best practices.

2.1.1 Install PSoC Designer Development Software

1. Insert the PSoC Designer Development Software 5.0 Installation CD.

2. Install PSoC Designer Development Software 5.0.

3. Install .NET Framework 2.0.

4. Install PSoC Programmer.

5. A C Compiler license is required to build PSoC Designer C Language projects.

2.1.2 CapSense Best Practices

The Universal CapSense Controller was created using the best practices for CapSense layout. To

enable universality and development of the kit and its projects, certain design elements have been

changed from what is recommended for final products. Table 2-1 is a list of the design features in the

Universal CapSense Controller and what to change for final products.

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10 CY3280-28XXX Universal CapSense® Controller Development Kit Guide, Spec. # 001-57457 Rev. **

Table 2-1. Design Features in Universal CapSense Controller

Design Features Reason for Feature Impact Recommended Change

Sensing traces are routed

through a connector to

sensors.

Buttons, sliders, and

LEDs are placed on the

module board for greater

flexibility with custom

modules for development

and subsequent releases.

Connectors increase the

parasitic capacitance of

the sensors, effectively

reducing their sensitivity.

Connectors also create

another path for noise to

enter the system.

Sensors and control cir-

cuitry should be located

on the same printed circuit

board. Lower parasitic

capacitance by reducing

trace lengths.

Sensing traces are routed

to other schematic ele-

ments.

Universalityoftheboardis

enabled by population/

depopulation of 0Ωresis-

tors

Solder pads of 0Ωresis-

tors increase parasitic

capacitance.

Route traces directly to

sensing elements. Use as

few 0Ωresistors as possi-

ble.

Sensing traces are

located on the top layer.

Using vias to route traces

to bottom of board and

back to connector

increases parasitic capac-

itance.

Possible noise sensitivity

to stimulus on top side of

board. Finger presses on

routing of control board

can lead to sensor activa-

tion.

Route sensing traces on

non-user side of printed

circuit board. Route sens-

ing traces as far from

noise sources as possible.

Several regulators are

used, including a variable

regulator.

To demonstrate

CapSense at several volt-

ages.

Global and User Module

parameters may need to

be verified with changing

power supply.

Supply one regulated volt-

age to PSoC.

Test point on CMOD. Accessibility of charge/

discharge waveforms

A test point increases

noise sensitivity by acting

as an antenna.

Solder-pad test points for

leads offer better noise

immunity if test points are

required.

dGND spacing is general-

ized for noise immunity

and sensitivity.

Universality of kit required

middle-ground on many

parameters.

Designisnotoptimizedfor

high noise or very thick

overlays

Increase spacing for

thickeroverlaysand better

sensitivity. Decrease

spacing for greater noise

immunity.

Connection to shield elec-

trode is through a jumper

(module -J2)

Flexibility of module

boards for both CSD and

CSA control boards.

Higher resistance paths

can impair performance of

shield electrode in CSD

projects.

Dedicated trace for shield

electrode. Remove jump-

ers wherever possible.

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Ce manuel convient aux modèles suivants

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