GR716-DS-UM, May 2019, Version 1.29 2 www.cobham.com/gaisler
GR716
1 Introduction.............................................................................................................................. 9
1.1 Scope ....................................................................................................................................................... 9
1.2 Data sheet limitations .............................................................................................................................. 9
1.3 Updates and feedback.............................................................................................................................. 9
1.4 Software support...................................................................................................................................... 9
1.5 Reference documents .............................................................................................................................. 9
1.6 Document revision history .................................................................................................................... 10
1.7 Acronyms .............................................................................................................................................. 13
1.8 Definitions ............................................................................................................................................. 14
1.9 Register descriptions ............................................................................................................................. 15
2 Architecture............................................................................................................................ 16
2.1 Key features........................................................................................................................................... 17
2.2 Digital Architecture Overview .............................................................................................................. 20
2.3 Analog Architecture Overview.............................................................................................................. 28
2.4 Signal Overview.................................................................................................................................... 32
2.5 I/O switch matrix overview................................................................................................................... 32
2.6 I/O switch default configurations for bootstraps................................................................................... 35
2.7 I/O switch matrix options, considerations and limitations .................................................................... 38
2.8 I/O switch matrix pin validation script.................................................................................................. 39
2.9 I/O switch matrix scenario examples .................................................................................................... 42
2.10 Cores...................................................................................................................................................... 48
2.11 Memory map ......................................................................................................................................... 49
2.12 Interrupts ............................................................................................................................................... 54
3 Signals.................................................................................................................................... 56
3.1 Bootstrap signals ................................................................................................................................... 56
3.2 Configuration for flight ......................................................................................................................... 63
3.3 Complete signal list ............................................................................................................................... 64
4 Clocking................................................................................................................................. 66
4.1 PLL Configuration and Status ............................................................................................................... 67
4.2 Clock Source and divisor ...................................................................................................................... 67
4.3 System clock.......................................................................................................................................... 68
4.4 SpaceWire clock .................................................................................................................................... 68
4.5 MIL-STD-1553B clock ......................................................................................................................... 68
4.6 PacketWire RX Clock ........................................................................................................................... 68
4.7 ADC Clock ............................................................................................................................................ 68
4.8 DAC Clock ............................................................................................................................................ 69
4.9 PWM Clock........................................................................................................................................... 69
4.10 Clock gating unit ................................................................................................................................... 69
4.11 Debug AHB bus clocking...................................................................................................................... 69
4.12 Test mode clocking................................................................................................................................ 69
5 Reset....................................................................................................................................... 70
5.1 IO Reset................................................................................................................................................. 70
6 Technical notes....................................................................................................................... 71
6.1 GRLIB AMBA plug&play scanning ..................................................................................................... 71
6.2 Software portability............................................................................................................................... 71
7 System Startup Status and General Configuration................................................................. 72
7.1 Configuration Registers......................................................................................................................... 72
7.2 Boot Strap information register............................................................................................................. 77
