Active Technologies AT-1212 Manuel utilisateur

AT-1212 User Guide and Specifications www.activetechnologies.it

AT-1212

2 Channels, 1.25 GS/s, 480 MHz Analog BW , 14 Bit

High Speed Signal Generator

Adapter Module for NI FlexRIO

User Manual

January, 2013 Rev. 1.3

Active Technologies S.r.l

Via Bela Bartok 29/B

44124 Ferrara, ITALY

Tel +39 0532 91456, Fax: +39 0532 970134

Internet: www.activetechnologies.it

E-mail: info@activetechnologies.it

AT-1212 User Guide and Specifications - 2 - www.activetechnologies.it

AT-1212 User Guide and Specifications .......................................................................................4

Electromagnetic Compatibility Guidelines ...................................................................................5

How to Use Your NI FlexRIO Documentation Set .........................................................................6

Front Panel and Connector Pinouts..............................................................................................7

AT-1212 Component-Level Intellectual Property (CLIP)...............................................................9

AT-1212 CLIP DESIGN .........................................................................................................10

FPGA I/O Interface..............................................................................................................11

Clocking Scheme.................................................................................................................12

Cables .........................................................................................................................................13

LabView Interface.......................................................................................................................14

LabView Interface Host Side.......................................................................................................17

Software Prerequisites ...............................................................................................................19

Example Code Review for AT-1212 adapter module..................................................................19

DACModuleControl(Host).exe................................................................................................19

GeneratePulse(Host).vi...........................................................................................................22

DDS and Trigger Route.vi........................................................................................................23

Using Your AT-1212 with a LabVIEW FPGA Example VI..............................................................24

Creating a Host VI on an FPGA Target ........................................................................................27

Running the Host VI....................................................................................................................31

Creating a Custom FPGA Target .................................................................................................32

Running the Host VI................................................................................................................35

Filter Options..............................................................................................................................36

Calibration Service for AT-1212 (OPTIONAL)..............................................................................36

AT-1212 User Guide and Specifications - 3 - www.activetechnologies.it

Specifications..............................................................................................................................37

Configuration EEPROM Map ......................................................................................................37

Electromagnetic Compatibility ...................................................................................................37

Compliance ............................................................................................................................38

Appendix: Installing EMI Controls ..............................................................................................39

Installing PXI EMC Filler Panels...................................................................................................39

AT-1212 User Guide and Specifications - 4 - www.activetechnologies.it

AT-1212 User Guide and Specifications

The AT-1212 is a two-channel, 1.25 GS/s, 14-bit, 480 MHz Analog Bandwidth, High-Speed Signal

Generator adapter module designed to work in conjunction with your NI FlexRIO™

FPGA module.

This document contains signal information and specifications for the AT-1212R, which is composed of

an NI FlexRIO FPGA module and the AT-1212. This document contains tutorial sections that

demonstrate how to generate signals using a LabVIEW FPGA example VI and how to create and run

your own LabVIEW project with the AT-1212R.

Note

Before configuring your AT-1212, you must install the appropriate software and

hardware. Refer to the NI FlexRIO FPGA Module Installation Guide and Specifications for

installation instructions. Figure 1 shows an example of a properly connected NI FlexRIO

device.

Figure 1. NI FlexRIO Device

Note

AT-1212R refers to the combination of your AT-1212 adapter module and your NI

FlexRIO FPGA module. AT-1212 refers to your AT-1212 adapter module only.

AT-1212 User Guide and Specifications - 5 - www.activetechnologies.it

Electromagnetic Compatibility Guidelines

This product was tested and complies with the regulatory requirements and limits for electromagnetic

compatibility (EMC) as stated in the product specifications. These requirements and limits are designed

to provide reasonable protection against harmful interference when the product is operated in its

intended operational electromagnetic environment.

This product is intended for use in industrial locations. There is no guarantee that harmful

interference will not occur in a particular installation, when the product is connected to a test object, or

if the product is used in residential areas. To minimize the potential for the product to cause

interference to radio and television reception or to experience unacceptable performance

degradation, install and use this product in strict accordance with instructions in the product

documentation.

Furthermore, any changes or modifications to the product not expressly approved by Active

Technologies could void your authority to operate it under your local regulatory rules.

Caution

To ensure the specified EMC performance, you must install PXI EMC Filler Panels (National

Instruments part number 778700-01) in adjacent chassis slots. For more information about installing

PXI EMC filler panels on your NI 5762R, refer to the Appendix: Installing EMI Controls section of this

document.

Caution

To ensure the specified EMC performance, operate this product only with shielded cables

and accessories.

Caution

This product is sensitive to electrostatic discharge (ESD).

AT-1212 User Guide and Specifications - 6 - www.activetechnologies.it

How to Use Your NI FlexRIO Documentation Set

Refer to Figure 2 and Table 1 for information about how to use your NI FlexRIO documentation set.

INSTALL Hardware

and Software

CONNECT Signals

and Learn About

Your Adapter

Module

NI FlexRIO FPGA Module

Installation Guide and Specifications

NI xxxxR User Guide

and Specifications

LEARN About

LabVIEW FPGA

Module

Are

You New to

LabVIEW FPGA

Module?

Yes No

PROGRAM Your

NI FlexRIO System

in LabVIEW FPGA

Module

LabVIEW FPGA

Module Help

NI FlexRIO

Help

LabVIEW

Examples

Figure

How

Use Your

FlexRIO Documentation

Set

Table

1. NI

FlexRIO Documentation Locations and

Descriptions

Document

Location

Description

NI FlexRIO FPGA Module

Installation Guide and

Specifications*

Available in your FPGA module

hardware kit and from the Start Menu.

Contains installation instructions for your NI FlexRIO

system and specifications for your FPGA module.

NI Adapter Module User

Guide and Specifications *

Available in your adapter module

hardware kit and from the Start Menu.

Contains signal information, examples, and

specifications for your adapter module.

LabVIEW FPGA Module

Help*

Embedded in LabVIEW Help.

Contains information about

the basic

functionality

LabVIEW FPGA Module.

NI FlexRIO Help*

Embedded in LabVIEW FPGA Module

Help.

Contains FPGA module, adapter module, and CLIP

configuration information.

LabVIEW Examples

Available in NI Example Finder.

Contains examples of how to run FPGA VIs and Host

VIs on your device.

Other Useful Information on ni.com

ni.com/ipnet

Contains LabVIEW FPGA functions and intellectual property to share.

ni.com/flexrio

Contains product information and data sheets for NI FlexRIO devices.

* These documents are also available at ni.com/manuals.

AT-1212 User Guide and Specifications - 7 - www.activetechnologies.it

Front Panel and Connector Pinouts

Table 2 shows the front panel connectors and signal descriptions for AT-1212. Refer to the

Specifications sheet for additional signal information.

Caution

To avoid permanent damage to the AT-1212, disconnect all signals connected to the AT-1212

before powering down the module, and connect signals only after the adapter module has been

powered on by the NI FlexRIO FPGA module.

Device Front Panel

Connector

Signal Description

TRIG IN

SMA input connector for Trigger IN

TRIG OUT

SMA output connector for Trigger Out

AO 1+

Differential analog output+ channel 1

AO 1-

Differential analog output- channel 1

AO 0+

Differential analog output+ channel 0

AO 0-

Differential analog output- channel 0

CLK IN

SMA input connector for external clock

* When using single-ended output, terminate the unused output with a 50 Ω terminator.

AT-1212 User Guide and Specifications - 8 - www.activetechnologies.it

Table

2. AT-1212

Panel

onnect

Caution

Connections that exceed any of the maximum ratings of any connector on the AT-1212R can

damage the device and the chassis. Active Technologies is not liable for any damage resulting from such

signal connections. For the maximum input and output ratings for each signal, refer to the Specifications

sheet.

AT-1212 User Guide and Specifications - 9 - www.activetechnologies.it

DRAM 0

CLIP Socket

Socketed

CLIP

Fixed I/O

External

I/O Connector

AT-1212 Component-Level Intellectual Property (CLIP)

The LabVIEW FPGA Module includes a feature for HDL IP integration called CLIP. NI FlexRIO devices

support two types of CLIP: user-defined and socketed.

•User-defined CLIP allows users to insert HDL IP into an FPGA target, enabling VHDL code to

communicate directly with an FPGA VI.

•Socketed CLIP provides the same IP integration functionality of the user-defined CLIP, but it also

allows the CLIP to communicate directly with circuitry external to the FPGA. Adapter module socketed

CLIP allows your IP to communicate directly with both the FPGA VI and the external adapter module

connector interface.

Figure 4 shows the relationship between an FPGA VI and CLIP.

NI FlexRIO FPGA Module

FPGA

User-Defined

CLIP

User-Defined

CLIP

LabVIEW

FPGA VI

Adapter Module

CLIP Socket

Socketed

CLIP

Fixed I/O

Adapter

Module

DRAM 1

CLIP Socket

Socketed

CLIP

DRAM0 DRAM1

Figure

CLIP

tio

nsh

The AT-1212 ships with socketed CLIP items that are used to add module I/O to the LabVIEW project.

The AT-1212ships with the following CLIP item: AT_1212_IOModule_CLIP.

AT-1212 User Guide and Specifications - 10 - www.activetechnologies.it

AT-1212 CLIP DESIGN

There are two DACs installed on the board that control the two available analog output channels.

The DAC contains two parallel LVDS input ports consisting of 14 differential LVDS signals DB[13:0].

Each data port runs internally at half the speed of the DAC Clock (1.25 GHz), so the user needs to

guarantee them the correct data rate.

The installed multiplexer selects the DAC clock source: it can be internal (from Clock Generator circuit

output) or external (from SMA connector).

The adapter module has a Clock Generator circuit that provides the 1.25 GHz clock to the DAC; the

clock generator source clock can be provided by 25 MHz onboard TCXO or by PXI_e DSTARA

backplane connection.

The uController write/read the DAC parameters, the Clock Gen registers and control the multiplexer

output. It performs also the Power up sequencing.

This CLIP provides read/write access to all FPGA look-up tables that are included in the project.

The data read from the look up tables are serialized by the CLIP to provide the requested data rate to

the DAC.

Clip files: AT_1212_IOModule_CLIP.xml; AT_1212_IOModule_CLIP.vhd; Inst_PLL_156M.vhd;

i2c_ctrl.vhd; OSerdes4_1.vhd; AT1212_Constraints.ucf; AT1212_IOModule.tbc

Table des matières

Manuels Unité de contrôle populaires d'autres marques

Festo

Festo Compact Performance CP-FB6-E Manuel de la liste des pièces

Elo TouchSystems

Elo TouchSystems DMS-SA19P-EXTME Manuel utilisateur

JS Automation

JS Automation MPC3034A Manuel utilisateur

JAUDT

JAUDT SW GII 6406 Series Guide rapide

Spektrum

Spektrum Air Module System Manuel utilisateur

BOC Edwards

BOC Edwards Q Series Manuel utilisateur

KHADAS

KHADAS BT Magic Manuel utilisateur

Etherma

Etherma eNEXHO-IL Manuel utilisateur

PMFoundations

PMFoundations Attenuverter Manuel utilisateur

GEA

GEA VARIVENT Manuel utilisateur

Walther Systemtechnik

Walther Systemtechnik VMS-05 Manuel utilisateur

Altronix

Altronix LINQ8PD Instructions de montage

Eaton

Eaton Powerware Series Manuel utilisateur

WAGO

WAGO 750-407/040-000 Manuel utilisateur

Sony

Sony CCU-590 Manuel utilisateur

Graco

Graco 25D614 Manuel utilisateur

Task Force Tips

Task Force Tips YE-RF-900 Manuel de programmation

Shini

Shini SPV-U Series Manuel utilisateur