Texas Instruments TPS658643 Manuel utilisateur

User's Guide

SLVU582A–December 2011–Revised May 2012

TPS658643 System Evaluation Board

This user’s guide describes the characteristics, operation, and use of the TPS658643EVM-752 evaluation

module (EVM). The TPS658643EVM-752 is a fully assembled and tested platform for evaluating the

performance of the TPS658643 single-chip, power management device. This document includes

schematic diagrams, a printed-circuit board layout, bill of materials, and test data.

Contents

1 Introduction .................................................................................................................. 3

1.1 Features ............................................................................................................. 3

1.2 Applications ......................................................................................................... 3

1.3 Requirements ....................................................................................................... 3

2 Electrical Performance Specifications .................................................................................... 3

3 Schematic .................................................................................................................... 4

4 Connector and Test Point Descriptions .................................................................................. 8

4.1 Headers and Switches ............................................................................................ 8

4.2 Jumpers ............................................................................................................. 9

5 Setup ........................................................................................................................ 10

6 TPS658643EVM Test Data .............................................................................................. 11

6.1 Operation Waveforms ............................................................................................ 11

7 EVM Assembly Drawings and Layout .................................................................................. 16

8 Bill of Materials ............................................................................................................. 20

List of Figures

1 HPA752A Schematic, Sheet 1 ............................................................................................ 4

2 HPA752A Schematic, Sheet 2 ............................................................................................ 5

3 HPA752A Schematic, Sheet 3 ............................................................................................ 6

4 HPA752A Schematic, Sheet 4 ............................................................................................ 7

5 SM0, Ch. 1 - VIN 1 V/div; Ch. 2 - SW 1 V/div; Ch. 3 - Vout 10 mV/div ............................................ 11

6 SM1, Ch. 1 - VIN 1 V/div; Ch. 2 - SW 1 V/div; Ch. 3 - Vout 10 mV/div ............................................ 12

7 SM2, Ch. 1 - VIN 1 V/div; Ch. 2 - SW 1 V/div; Ch. 3 - Vout 10 mV/div ............................................ 12

8 SM0, SM1, SM2, and LDO1 Start-Up .................................................................................. 13

9 LDO1, LDO2, LDO3, and LDO4 Start-Up.............................................................................. 13

10 LDO4, LDO5, and LDO9 Start-Up....................................................................................... 14

11 32-kHz Clock............................................................................................................... 15

12 Top Assembly – Silkscreen .............................................................................................. 16

13 Top Layer................................................................................................................... 16

14 Layer 2...................................................................................................................... 17

15 Layer 3...................................................................................................................... 17

16 Layer 4...................................................................................................................... 18

17 Layer 5...................................................................................................................... 18

18 Layer 6...................................................................................................................... 19

19 Bottom Layer............................................................................................................... 19

List of Tables

SLVU582A–December 2011–Revised May 2012 TPS658643 System Evaluation Board

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1 Headers and Switches ..................................................................................................... 8

2 Jumpers ...................................................................................................................... 9

3 Bill of Materials............................................................................................................. 20

2TPS658643 System Evaluation Board SLVU582A–December 2011–Revised May 2012

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Introduction

1 Introduction

The TPS658643 is a single-chip, power management integrated circuit (IC) with multiple regulated power

supplies, system management, and display functions in a small package. The I2C interface enables

control of a wide range of subsystem parameters. Internal registers have a complete set of status

information, enabling easy diagnostics and host-controlled handling of fault conditions.

1.1 Features

• Three programmable step-down converters

– Eleven programmable general-purpose LDOs

• Three PWM outputs with programmable frequency and duty cycle

• Dual RGB LED drivers

• Eleven-channel ADC with three operating modes

• Power-Good monitoring on all supply outputs

• Interrupt controller with maskable interrupts

1.2 Applications

• Tablet Portable Computers

• Netbooks

• Smart phones

• Portable navigation devices

• Portable media players

1.3 Requirements

In order to operate this EVM properly, the hardware must be connected and properly configured. All

components and connectors are installed on the EVM as shipped, except the dc power supplies.

2 Electrical Performance Specifications

Input voltage, VIN, 3 V to 5.5 V

Output current, step-down converters, 1.5 A (SMO, SM2) and 2 A (SM1)

Output voltage LDOs, seven with output voltages of 1.25 V to 3.3 V, two with output voltages of 0.725 V to

1.5 V, one always on with output voltage of 1.25 V to 3.3 V, one with output voltage of 1.7 V to 2.475 V.

SLVU582A–December 2011–Revised May 2012 TPS658643 System Evaluation Board

Schematic

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3 Schematic

Figure 1. HPA752A Schematic, Sheet 1

4TPS658643 System Evaluation Board SLVU582A–December 2011–Revised May 2012

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Schematic

Figure 2. HPA752A Schematic, Sheet 2

SLVU582A–December 2011–Revised May 2012 TPS658643 System Evaluation Board

Schematic

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Figure 3. HPA752A Schematic, Sheet 3

6TPS658643 System Evaluation Board SLVU582A–December 2011–Revised May 2012

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Schematic

Figure 4. HPA752A Schematic, Sheet 4

SLVU582A–December 2011–Revised May 2012 TPS658643 System Evaluation Board

Connector and Test Point Descriptions

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4 Connector and Test Point Descriptions

4.1 Headers and Switches

The following table contains header and switch descriptions.

Table 1. Headers and Switches

Header/Switch Title Description

J1 CHG_DET Charger Detection Input, connected to CHG_DET (pin D11)

and NC (pins C12,13,D11-13)

J2 PWRGND Power ground, connected to ground plane

J3 TJ1 Test jumper, connected to VIN pins E13 and F11- 13

J4 PWRGND Power ground, connected to ground plane

J5 VIN Power supply input; connect BAT or ac adapter here to J5;

connected to pins A11 - A13, B11 - B13, and C11

J6 PWRGND Power ground, connected to ground plane

J7 TJ2 Test jumper, connected to VIN pins G10-13

J8 PWRGND Power ground, connected to ground plane

J9 ADC_IN Pins COMP (pin N1, input comparator for autoboot feature) and

ALNG1 - ALNG3 (pins L3, M1, M2) - inputs to analog-to-digital

converter. 20-kΩpulldown to AGND

J10 GPIO Connected to pins GPIO1 - GPIO4 (M3, M4, N3, N4) with 1-MΩ

pulldown to AGND

J11 USB-I2C ADAPTER Connection for USB-TO-GPIO TI tool which connects HPA752

board to PC for GUI. Connected to pins GPIO1 - GPIO4 with 1-

MΩpulldown to AGND, SAA_3V, SAA_GND, enable for I2C

port expander U2, SCLK ,and SDAT

J12 ADAPTER 3V Header to sense/supply voltage to I2C bus

J13 SUPERCAP/COINCELL Header to connect external real-time clock (RTC) supply

J14 32KHZOUT Header to probe pin OUT32K (C7, pin 1 of J14 is OUT32k and

pin 2 of J14 is analog ground)

J15 AGND Header with four connections to analog ground to facilitate

oscilloscope ground probe connection

J16 PWM Header to pin K9; this pin is a no-connect inside the IC (NC6)

J17 DIG_PWM Header to PWM, digital push-pull output; pin DIG_PWM (N11)

on the IC

J18 DIG_PWM2 Header to PWM, digital push-pull output; pin DIG_PWM2 (F4)

on the IC

J19 SM2 Output of dc/dc converter SM2

J20 PGND2 Power ground 2 for dc/dc converter SM2

J21 SM1 Output of dc/dc converter SM1

J22 PGND1 Power ground 1 for dc/dc converter SM1

J23 SM0 Output of dc/dc converter SM0

J24 PGND0 Power ground 1 for dc/dc converter SM0

J25 DGND2DT_EXTPWR For IT internal use only

J26 SPARE_OUT No internal connection

J27 NINT Header for nINT pin; interruption pin nINT is LO when interrupt

is requested by TPS65864x. Open-drain output

J28 NNORTC Header for nNORTC pin (D4); output status pin of RTC_OUT

LDO

J29 TNOPWR Header to monitor NOPOWER pulse width set pin TNOPWR

(A3)

J30 NHOT_RST Header for nHOT_RST pin (A2); reboot cycle request;

hardware reboot cycle control, pulled up to JP26 (SM2 or 2V2)

through 100 kΩ

J31 NNOPWR Header for pin nNOPOWER (M11)

J32 RESUME Header for pin RESUME (B2), connected to switch S3, and

pulled down to DGND through 1 MΩ

J33 SCLK/SDAT Header for pins SCLK (H4) pin 1 of header and SDAT (J2) pin

2 of header, for monitoring I2C bus

8TPS658643 System Evaluation Board SLVU582A–December 2011–Revised May 2012

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Connector and Test Point Descriptions

Table 1. Headers and Switches (continued)

Header/Switch Title Description

J34 SEQCTRL Connected to SEQ_CTL pin (B3), pulled down to DGND

through 1MΩ- Discrete input control

J35 LDO4PG Header for LDO4 Power Good output, pulled down to DGND

through 1MΩ

J36 EVM_3V Header to connect external supply for LED bias and I2C port

expander U2

J37 SYNCEN Header for SYNC enable pulled down to DGND through 1MΩ-

Discrete input control

J38 SM1PG Header for dc/dc converter SM1 Power Good output

J39 PWRGND Header for ground connection of external supply for LED bias

and I2C port expander U2

J40 SM1EN Header for enabling dc/dc converter SM1 pulled down to

DGND through 1MΩ- Discrete input control

J41 SM0PG Header for dc/dc converter SM0 Power Good output, pulled

down to DGND through 1M-Ohm

J42 SM0EN Header for enabling dc/dc converter SM0 pulled down to

DGND through 1 MΩ- Discrete input control

J43 AGND Header with four connections to analog ground

J44 DGND Header with four connections to digital ground

S1 NOPWRCTL Assertion of NOPWRCTL assets nNOPOWER output of PMU,

typically used as processor reset without rebooting PMU

S2 NHOT_RST Used for rebooting PMU

S3 RESUME Hold to wake up PMU or send PMU to sleep state

4.2 Jumpers

The following table shows the installed jumpers.

Table 2. Jumpers

Jumper Title Shunt Location Description

JP1 EXT_THERM Installed Jumper to connect thermistor (R2) to pin TS

(J13)

JP2 INT PULLUP Between pin 1 and pin 2 Jumper to select pullup voltage for INT pin

(L10). Pin 1 and pin 2 shorted INT pulled up

to 2V2. If pin 2 and 3 are shorted /INT is

pulled up to LDO8

JP3 I2C_PU Not Installed Jumper to select pullup voltage for SCLK

(H4) and SDAT (J2). Position 1 and position

2 shorted for 2V2 pullup; position 2 and

position 3 shorted for pullup to RTC_OUT

(H1).

JP4 32KOUT-PWR Installed Jumper to connect V32K (D7) to RTC_OUT

(H10)

JP5 32K-CLOAD Not Installed Jumper to connect 50-pF capacitor to

OUT32K (C7)

JP6 RESUME Not Installed Jumper to connect RESUME (B2) to pin P2

of the I2C port expander (U2)

JP7 SEQCTRL Between pin 1 and pin 2 Jumper to connect SEQCTRL (B3) to either

2V2 or pin P3 of the I2C port expander U2

JP8 SYNCEN Between pin 1 and pin 2 Jumper to connect SYNCEN (E10) to either

2V2 or pin P4 of the I2C port expander U2

JP9 SM1EN Between pin 1 and pin 2 Jumper to connect SM1EN (E11) to either

2V2 or pin P5 of the I2C port expander U2

JP10 SM0EN Not Installed Jumper to connect SM0EN (F10) to either

2V2 or pin P5 of the I2C port expander U2

JP11 VIN_LDO01 Between pin 2 and pin 3 Jumper to select VIN or SM2 as input to

LDO0 and LDO1

JP12 VIN_LDO23 Between pin 2 and pin 3 Jumper to select VIN or SM2 as input to

LDO2 and LDO3

SLVU582A–December 2011–Revised May 2012 TPS658643 System Evaluation Board

Setup

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Table 2. Jumpers (continued)

Jumper Title Shunt Location Description

JP13 VIN_LDO4 Between pin 2 and pin 3 Jumper to select VIN or SM2 as input to

LDO4

JP14 VIN_LDO678 Between pin 2 and pin 3 Jumper to select VIN or SM2 as input to

LDO6 - LDO8

JP15 VIN_LDO9 Between pin 2 and pin 3 Jumper to select VIN or SM2 as input to

LDO9

JP16 VIN_SM2 Installed Jumper to connect VIN to VIN_SM2

JP17 SM2_IL Installed Jumper to measure current through inductor

JP18 LED_PWM_DRV Between pin 2 and pin 3 Jumper to select SM2 or VIN as supply for

LEDs, D14 - D17

JP19 VIN_SM1 Installed Jumper to connects VIN to VIN_SM1

JP20 SM1_IL Installed Jumper to measure current through inductor

JP21 RGB_DRV Between pin 2 and pin 3 Jumper to select SM2 or VIN as supply for

RGB LED, D18

JP22 VIN_SM0 Installed Jumper to connects VIN to VIN_SM0

JP23 SM0_IL Installed Jumper to measure current through inductor

JP24 RGB2_DRV Between pin 2 and pin 3 Jumper to select SM2 or VIN as supply for

RGB LED, D19

JP25 DGND2DT Between pin 2 and pin 3 For TI internal use only

JP26 JP26 Between pin 2 and pin 3 Jumper to select SM2 or 2V2 as pullup for

HOT_RST

JP27 STATUS_LED_PWR Between pin 1 and pin 2 Jumper to select VIN or EVM_3V J36 as bias

for status LEDs, D1 - D13

5 Setup

The following steps are intended to help users power up and evaluate the EVM.

1. To use the TPS65864xEVM with a personal computer, the TPS865864xEVM software is required

along with the HPA172 USB-to-I2C Interface Board (USB-TO-GPIO) and a USB cable. Two power

supplies capable of supplying 6 V at 2 A are required.

2. To test the HPA752, the computer must have the TPS65864xEVM software program installed. Install

the program from the TPS65864xEVM software zip file. This software zip file is supplied by Texas

Instruments. If the program does not automatically install properly, follow the instructions in the

Readme file.

3. Connect the USB cable between the computer and the HPA172. Connect the Molex cable between the

HPA172 and the HPA752 EVM (J11).

4. Verify the shorting jumpers are installed as noted in the shorting jumper table. The EVM ships with the

default jumper settings.

5. Supply 1: Set the input supply voltage to 3.3 V before connecting to the EVM, and turn the supply off.

While in the off state, connect the power supply positive lead to J36 (EVM 3V). Connect the power

supply return lead to J39 (GND).

6. Input Supply 2: Set the input supply voltage to 5 V before connecting to the EVM, and turn the supply

off. While in the off state, connect the power supply positive lead to J5 (VIN). Connect the power

supply return lead to J6 (GND).

7. First, turn on Input Supply 1 (3.3 V). Next, turn on Input Supply 2 (5 V).

8. To wake the PMU, hold the pushbutton switch, S1, RESUME, for one seconds and release. While the

PMU is awake, holding switch S1 for one second puts the PMU back into the sleep state. Different

combinations of the LDOs and switching converters turn on by default as per table 3-3: TPS65864x

Integrated Power Supply Power-Up Defaults in the corresponding device data sheet. Note, final silicon

can be marked as TPS658643 or P658643.

9. Using the GUI, select the LDOs tab on the left side. Press Read to load the contents of the I2C

10 TPS658643 System Evaluation Board SLVU582A–December 2011–Revised May 2012

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