Texas Instruments TPS54334EVM-722 Manuel utilisateur
User's Guide
SLVUAH4–August 2015
TPS54334EVM-722 3-A Regulator Evaluation Module
This user's guide contains background information for the TPS54334 as well as support documentation for
the TPS54334EVM-722 evaluation module (PWR722-001). Also included are the performance
specifications, the schematic, and the bill of materials for the TPS54334EVM-722.
Contents
1 Introduction ................................................................................................................... 2
2 Test Setup and Results..................................................................................................... 4
3 Board Layout................................................................................................................ 12
4 Schematic and Bill of Materials........................................................................................... 14
List of Figures
1 TPS54334EVM-722 Efficiency............................................................................................. 5
2 TPS54334EVM-722 Low Current Efficiency ............................................................................. 5
3 TPS54334EVM-722 Load Regulation..................................................................................... 6
4 TPS54334EVM-722 Line Regulation...................................................................................... 6
5 TPS54334EVM-722 Transient Response ............................................................................... 7
6 TPS54334EVM-722 Loop Response ..................................................................................... 7
7 TPS54334EVM-722 Output Ripple, IOUT = 3 A .......................................................................... 8
8 TPS54334EVM-722 Output Ripple, IOUT = 200 mA...................................................................... 8
9 TPS54334EVM-722 Output Ripple, IOUT = 0 A ........................................................................... 8
10 TPS54334EVM-722 Input Ripple ......................................................................................... 9
11 TPS54334EVM-722 Startup Relative to VIN ............................................................................ 10
12 TPS54334EVM-722 Startup Relative to Enable ....................................................................... 10
13 TPS54334EVM-722 Shutdown Relative to VIN ......................................................................... 11
14 TPS54334EVM-722 Shutdown Relative to EN......................................................................... 11
15 TPS54334EVM-722 Top-Side Assembly................................................................................ 12
16 TPS54334EVM-722 Top-Side Layout 3................................................................................. 13
17 TPS54334EVM-722 Bottom-Side Layout ............................................................................... 13
18 TPS54334EVM-722 Schematic .......................................................................................... 14
List of Tables
1 Input Voltage and Output Current Summary............................................................................. 2
2 TPS54334EVM-722 Performance Specification Summary............................................................. 2
3 Output Voltages Available .................................................................................................. 3
4 EVM Connectors and Test Points ......................................................................................... 4
5 TPS54334EVM-722 Bill of Materials..................................................................................... 15
1
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Introduction
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1 Introduction
This user's guide contains background information for the TPS54334 as well as support documentation for
the TPS54334EVM-722 evaluation module (PWR722-001). Also included are the performance
specifications, the schematic, and the bill of materials for the TPS54334EVM-722.
1.1 Background
The TPS54334 dc/dc converter is designed to provide up to a 3-A output from an input voltage source of
4.2 V to 28 V. Rated input voltage and output current range for the evaluation module are given in
Table 1. This evaluation module is designed to demonstrate the small printed-circuit-board areas that may
be achieved when designing with the TPS54334 regulator. The switching frequency is externally set at a
nominal 570 kHz. The high-side and low-side MOSFETs are incorporated inside the TPS54334 package
along with the gate-drive circuitry. The low drain-to-source on resistance of the MOSFETs allow the
TPS54334 to achieve high efficiencies and helps keep the junction temperature low at high output
currents. The compensation components are external to the integrated circuit (IC), and an external divider
allows for an adjustable output voltage. Additionally, the TPS54334 provides an adjustable undervoltage
lockout input. The absolute maximum input voltage is 30 V for the TPS54334EVM-722.
Table 1. Input Voltage and Output Current Summary
EVM INPUT VOLTAGE RANGE OUTPUT CURRENT RANGE
TPS54334EVM-722 VIN = 4.2 V to 28 V 0 A to 3 A
1.2 Performance Specification Summary
A summary of the TPS54334EVM-722 performance specifications is provided in Table 2. Specifications
are given for an input voltage of VIN = 24 V and an output voltage of 5.0 V, unless otherwise specified. The
TPS54334EVM-722 is designed and tested for VIN = 4.2 V to 28 V. The ambient temperature is 25°C for
all measurements, unless otherwise noted.
Table 2. TPS54334EVM-722 Performance Specification Summary
Specification Test Conditions MIN TYP MAX Unit
VIN operating voltage range 4.2 24 28 V
VIN start voltage 4.1 V
VIN stop voltage 3.9 V
Output voltage set point 3.3 V
Output current range(1) VIN = 4.2 V to 28 V 0 3 A
Line regulation IO= 1.5 A, VIN = 4.2 V to 28 V ±0.05%
Load regulation VIN = 12 V, IO= 0 A to 3 A ±0.2%
Voltage change –190 mV
IO= 0.75 A to 2.25 A Recovery time 150 μs
Load transient response Voltage change 190 mV
IO= 2.25 A to 0.75 A Recovery time 150 μs
Loop bandwidth VIN = 24 V, IO= 1.5 A 54.26 kHz
Phase margin VIN = 24 V , IO= 1.5 A 82 °
Input ripple voltage IO= 3 A 400 mVPP
Output ripple voltage IO= 3 A <30 mVPP
Output rise time 2 ms
Operating frequency 570 kHz
Maximum Efficiency TPS54334EVM-722, VIN = 12 V, IO= 1 A 91.38%
(1) When VIN = 4.2 V, maximum IOUT is 2 A.
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( )
´
- + +
ENFALLING
STOP ENFALLING p h
R1 V
R2 =
V V R1 I I
æ ö -
ç ÷
è ø
æ ö
- +
ç ÷
è ø
ENFALLING
START STOP
ENRISING
ENFALLING
p h
ENRISING
V
V V
V
R1 = V
I 1 I
V
´
OUT
R5 0.8 V
R6 =
V - 0.8 V
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Introduction
1.3 Modifications
These evaluation modules are designed to provide access to the features of the TPS54334. Some
modifications can be made to this module.
1.3.1 Output Voltage Set Point
The voltage divider, R5 and R6, is used to set the output voltage. To change the output voltage of the
EVM, it is necessary to change the value of resistor R6. Changing the value of R6 can change the output
voltage above 0.8 V. The value of R6 for a specific output voltage can be calculated using Equation 1.
Use 31.6 kΩfor R5.
(1)
Table 3 lists the R5 and R6 values for some common output voltages. Note that VIN must be in a range so
that the minimum on-time is greater than 145 ns, and the maximum duty cycle is less than 100%. The
values given in Table 3 are standard values, not the exact value calculated using Equation 1.
Table 3. Output Voltages Available
Output Voltage (V) R5 Value (kΩ) R6 Value (kΩ)
1.8 31.6 25.5
2.5 31.6 15
3.3 31.6 10
1.3.2 Adjustable UVLO
The under voltage lock out (UVLO) can be adjusted externally using R1 and R2. The EVM is set for a start
voltage of 4.1 V and a stop voltage of 3.23 V using R1 = 220 kΩand R2 = 84.5 kΩ. Use Equation 2 and
Equation 3 to calculate required resistor values for different start and stop voltages. Considering the VIN
UVLO, the stop voltage is set to 3.9 V.
(2)
(3)
Ip= 1.15 µA, Ih= 3.3 µA, VENFALLING = 1.17 V and VENRISING = 1.21 V
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Test Setup and Results
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2 Test Setup and Results
This section describes how to properly connect, set up, and use the TPS54334EVM-722 evaluation
module. The section also includes test results typical for the evaluation module and covers efficiency,
output voltage regulation, load transients, loop response, output ripple, input ripple, and start-up.
2.1 Input/Output Connections
The TPS54334EVM-722 is provided with input/output connectors and test points as shown in Table 4. A
power supply capable of supplying 2 A must be connected to J1 through a pair of 20-AWG wires. The load
must be connected to J4 through a pair of 20-AWG wires. The maximum load current capability must be
at least 4 A to use the full capability of this EVM. Wire lengths must be minimized to reduce losses in the
wires. Test-point TP1 provides a place to monitor the VIN input voltages with TP2 providing a convenient
ground reference. TP6 is used to monitor the output voltage with TP7 as the ground reference.
Table 4. EVM Connectors and Test Points
Reference Designator Function
J1 VIN (see Table 1 for VIN range)
J2 VOUT, 3.3 V at 3 A maximum
JP1 2-pin header for enable. Connect EN to ground to disable, open to enable.
JP2 2-pin header for VDD. Connect VOUT to VDD as the power supply.
TP1 VIN test point at VIN connector
TP2 GND test point at VIN
TP3 PGOOD test point
TP4 PH test point
TP5 Test point between voltage divider network and output. Used for loop response measurements.
TP6 Output voltage test point at OUT connector
TP7 GND test point at VOUT connector
TP8 VDD test point at the VDD connector
TP9 GND test point at the VDD connector
TP10 EN test point
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Output Current (A)
Efficiency %
0
10
20
30
40
50
60
70
80
90
100
1m 10m 100m 1 3
D018
VIN = 12 V
VIN = 24 V
Output Current (A)
Efficiency %
0 0.5 1 1.5 2 2.5 3
0
10
20
30
40
50
60
70
80
90
100
D017
VIN = 12 V
VIN = 24 V
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Test Setup and Results
2.2 Efficiency
The efficiency of this EVM peaks at a load current of about 0.5 A – 1 A, and then decreases as the load
current increases towards full load. Figure 1 shows the efficiency for the TPS54334EVM-722 at an
ambient temperature of 25°C.
Figure 1. TPS54334EVM-722 Efficiency
Figure 2 shows the efficiency for the TPS54334EVM-722 on a semi-log scale to better show light load
efficiency. The ambient temperature is 25°C.
Figure 2. TPS54334EVM-722 Low Current Efficiency
The efficiency may be lower at higher ambient temperatures, due to temperature variation in the drain-to-
source resistance of the internal MOSFET.
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Input Voltage (V)
Line Regulation %
4 6 8 10 12 14 16 18 20 22 24
-0.1
-0.08
-0.06
-0.04
-0.02
0
0.02
0.04
0.06
0.08
0.1
D020
Output Current (A)
Load Regulation %
0 0.5 1 1.5 2 2.5 3
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
D019
VIN = 12 V
VIN = 24 V
Test Setup and Results
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2.3 Output Voltage Load Regulation
Figure 3 shows the load regulation for the TPS54334EVM-722.
Figure 3. TPS54334EVM-722 Load Regulation
Measurements are given for an ambient temperature of 25°C.
2.4 Output Voltage Line Regulation
Figure 4 shows the line regulation for the TPS54334EVM-722.
Figure 4. TPS54334EVM-722 Line Regulation
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Frequency (Hz)
Gain (dB)
Phase (q)
-60 -180
-40 -120
-20 -60
0 0
20 60
40 120
60 180
100 1k 10k 100k 1M
D021
Gain
Phase
VOUT = 200 mV/div(AC coupled)
IOUT = 1 A/div
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Test Setup and Results
2.5 Load Transients
Figure 5 shows the TPS54334EVM-722 response to load transients. The current step is from 25% to 75%
of maximum rated load at 12-V input. Total peak-to-peak voltage variation is as shown, including ripple
and noise on the output.
Figure 5. TPS54334EVM-722 Transient Response
2.6 Loop Characteristics
Figure 6 shows the TPS54334EVM-722 loop-response characteristics. Gain and phase plots are shown
for VIN voltage of 24 V. Load current for the measurement is 1.5 A.
Figure 6. TPS54334EVM-722 Loop Response
7
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SW = 5 V/div
VOUT = 20 mV/div (AC coupled)
VOUT = 20 mV/div (AC coupled)
SW = 5 V/div
SW = 5 V/div
VOUT = 20 mV/div (AC coupled)
Test Setup and Results
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2.7 Output Voltage Ripple
Figure 7,Figure 8, and Figure 9 show the TPS54334EVM-722 output voltage ripple for full load, light load,
and skip mode operation. VIN = 12 V. The output The ripple voltage is measured directly across the output
capacitors.
Figure 7. TPS54334EVM-722 Output Ripple, IOUT =3A
Figure 8. TPS54334EVM-722 Output Ripple, IOUT = 200 mA
Figure 9. TPS54334EVM-722 Output Ripple, IOUT =0A
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VIN = 200 mV/div (AC coupled)
SW = 5 V/div
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Test Setup and Results
2.8 Input Voltage Ripple
Figure 10 shows the TPS54334EVM-722 input voltage ripple. The output current is the rated full load of
3 A and VIN = 12 V. The ripple voltage is measured directly across the input capacitors.
Figure 10. TPS54334EVM-722 Input Ripple
9
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EN = 2 V/div
PGOOD = 2 V/div
V 2 V/div
OUT =
V = 5 V/div
IN
EN = 2 V/div
PGOOD = 2 V/div
V 2 V/div
OUT =
V = 5 V/div
IN
Test Setup and Results
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2.9 Powering Up
Figure 11 and Figure 12 show the start-up waveforms for the TPS54334EVM-722. In Figure 11, the output
voltage ramps up as soon as the input voltage reaches the UVLO threshold as set by the R1and R2
resistor divider network. In Figure 12, the input voltage is initially applied and the output is inhibited by
using a jumper at JP1 to tie EN to GND. When the jumper is removed, EN is released. When the EN
voltage reaches the enable-threshold voltage, the start-up sequence begins and the output voltage ramps
up to the externally set value of 3.3 V. The input voltage for these plots is 12 V and the load is 5 Ω.
Figure 11. TPS54334EVM-722 Startup Relative to VIN
Figure 12. TPS54334EVM-722 Startup Relative to Enable
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