Texas Instruments LM74670-SQEVM Manuel utilisateur

LM74670-SQEVM

User's Guide

Literature Number: SNVU494

October 2015

Contents

1 Introduction......................................................................................................................... 4

2 Setup.................................................................................................................................. 4

2.1 Input/Output Connector Description ................................................................................... 4

2.2 Board Setup............................................................................................................... 5

3 Operation............................................................................................................................ 6

3.1 Reverse Polarity Protection............................................................................................. 6

3.2 Output Voltage............................................................................................................ 8

4 Board Layout..................................................................................................................... 10

5 Schematic ......................................................................................................................... 12

6 Bill of Materials .................................................................................................................. 13

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List of Figures

1 LM74670-Q1 Typical Application Circuit ................................................................................. 4

2 LM74670-Q1-SQ EVM...................................................................................................... 5

3 Response to Reverse Polarity 12V to -20V .............................................................................. 6

4 Response to Start Up Reverse Polarity................................................................................... 7

5 Periodic body diode voltage drop at the output ......................................................................... 8

6 The LM74670-Q1-SQEVM Output voltage waveform................................................................... 9

7 Top Assembly Layer....................................................................................................... 10

8 Bottom Layer................................................................................................................ 11

9 LM74670-Q1-SQEVM Schematic........................................................................................ 12

List of Tables

1 Device and Package Configurations ...................................................................................... 4

2 LM74670-Q1-SQ EVM Bill of Materials for Configuration............................................................. 13

SNVU494–October 2015 List of Figures

Voltage

Regulator

Anode

Vbatt LM74670-Q1

Cathode

Cout

Vcap

TVS+

Vout

TVS-

Introduction

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1 Introduction

The Texas Instruments LM74670-Q1-SQ Evaluation Module helps designers evaluate the operation and

performance of the LM74670-Q1 Reverse Polarity Protection Smart Diode Controller. This EVM

demonstrates how an N-Channel power MOSFET can emulate a very low forward voltage diode with zero

Iq and low leakage current flowing through the IC. In this design scheme the LM74670-Q1 is combined

with a MOSFET and used in series with battery as a replacement for schottky diode and PFET in reverse

polarity protection circuitry as shown in Figure 1 . For more information on the LM74670-Q1 functional and

electrical characteristics, see the LM74670-Q1 Reverse Polarity Protection Smart Diode Controller Data

Sheet (LM74670-Q1).

Table 1. Device and Package Configurations

CONVERTER IC PACKAGE

U1 LM74670-Q1 VSSOP-8

2 Setup

This section describes the jumpers and connectors on the EVM as well and how to properly connect, set

up and use the LM74670-Q1-SQEVM. Ensure the power supply is turned off while making connections on

the board.

2.1 Input/Output Connector Description

•VBAT_1: Power input connector to the positive rail of the input power supply.

•GND: Battery ground connector.

•VOUT: is the power output connector to the positive side of the load.

•TEST POINTS: are also available at VBAT_1,GND,VOUT,DRV_1 (MOSFET Gate Voltage), and

VCAP_1 (Charge pump capacitor).

Figure 1. LM74670-Q1 Typical Application Circuit

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Setup

2.2 Board Setup

Before applying power to the LM74670-Q1EVM, all external connections should be verified. External

power supplies should be turned off and connected with proper polarity to the VBAT_1 and GND

connectors. An electronic or resistive load must be connected at the output.. The LM74670-Q1 will

not initiate the charge pump operation if a closed loop system is in standby mode or the drain current is

smaller than 1mA (typical). The tests outlined in this document have 3A constant load current and 12V

input voltage supply (VBAT_1). Make sure that the external power supply source for the input voltage is

capable of providing enough current to the output load so that the output voltage can be obtained.

Once all connections to the LM74670-Q1-SQEVM are verified, power can be applied to VBAT_1. The

EVM will then begin to operate.

Figure 2. LM74670-Q1-SQ EVM

SNVU494–October 2015 List of Tables

Time (100 µs/DIV)

VOUT (10 V/DIV, 12 V to 0 V)

VIN (10 V/DIV, 12 V to -20 V)

Gate Drive (10 V/DIV)

Operation

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3 Operation

3.1 Reverse Polarity Protection

A dynamic voltage pulse from +12V to -20V is applied at the VBAT_1 input of the LM74670-Q1-SQEVM.

Figure 3 shows when the input voltage (yellow) drops down to -20V, the output voltage (blue) does not go

negative, and therefore, the load is protected from dynamic reverse pulses at the input. The LM74670-Q1

reacts the negative voltage surge within 2μsec and shuts down the MOSFET by pulling the gate voltage to

zero (green). The output slowly decays due to the large output capacitors and increased time constant.

Figure 3. Response to Reverse Polarity 12V to -20V

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Operation

A -12V source is connected to the VBAT_1 input of the LM74670-Q1-SQEVM. Figure 4 shows that the

Output voltage will stay at a constant 0V in this situation. This test simulates the event of connecting a

12V battery in the reverse direction, and therefore, protects the load from negative voltages.

Figure 4. Response to Start Up Reverse Polarity

Note: Please note that the leakage current is 60uA (typ). This means that if you apply a voltage on the

output you will see some voltage on input and this voltage will collapse if you draw more current than the

leakage current. The same applies for a reverse voltage applied on the input.

SNVU494–October 2015 List of Tables

Operation

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3.2 Output Voltage

When power is initially applied, the load current (ID) will flow through the body diode of the MOSFET. This

current will produce a forward voltage drop (Vf) across the MOSFET body diode. This voltage is used to

charge up the charge pump capacitor Vcap. This periodic voltage drop will be equal to the MOSFET body

diode forward voltage drop and occurs for about 25.6msec as shown in Figure 5.

Figure 5. Periodic body diode voltage drop at the output

During the rest of the period of conduction, the LM74670-Q1 will drive the gate of the MOSFET. When the

MOSFET is ON, it provides a low resistive path for the drain current to flow and minimizes the power

dissipation associated with forward conduction. The power losses during the MOSFET ON state depend

primarily on the RDSON of the selected MOSFET and load current. The LM74670-Q1 operation keeps the

MOSFET ON at approximately 98% as shown in Figure 6, leading to very little overall power dissipation

when compared to a typical diode.

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Operation

Figure 6. The LM74670-Q1-SQEVM Output voltage waveform

SNVU494–October 2015 List of Tables

Board Layout

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4 Board Layout

Figure 7. Top Assembly Layer

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