Texas Instruments DS125BR800EVM Manuel utilisateur

DS125BR800EVM User’s Guide

User's Guide

Literature Number: SNLU122

November 2012

User's Guide

SNLU122–November 2012

DS125BR800EVM Evaluation Kit

The DS125BR800EVM – SMA evaluation kit provides a complete high band-width platform to evaluate the

signal integrity and signal conditioning features of the Texas Instruments signal conditioning products –

with Equalization and De-emphasis. SMA edge launch connectors are used as the input and the output

connections for this evaluation board. Commercially available adaptor boards can be purchased to

facilitate connection to cables or backplane interconnects.

Topic ........................................................................................................................... Page

1 Features ............................................................................................................. 3

2 4-Level IO Control ............................................................................................... 5

3 Switch Connection Overview ................................................................................ 6

4 Quick Start Guide ................................................................................................ 7

5 SMBus Slave Mode of the EQ, VOD, and De-Emphasis level: .................................. 10

6 Bill of Materials for DS125BR800EVM: ................................................................. 11

7 Schematic for DS125BR800EVM: ......................................................................... 12

8 EVM Layout ...................................................................................................... 13

2DS125BR800EVM Evaluation Kit SNLU122–November 2012

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Features

1 Features

• 8 Channel Repeater up to 12.5 Gbps

• Low 65 mW/channel power consumption, with option to power down unused channels

• Transparent management of link training protocol for PCIe, SAS, and 10G-KR

• Receive Equalization up to 30 dB at 12.5 Gbps

• Settable transmit de-emphasis driver to -12 dB

• Transmit output voltage control: 700 – 1300 mV

• Programmable via pin selection, EEPROM, or SMBus interface

• Single supply operation: VIN = 3.3V±10% or VDD = 2.5V ±5%

• -40°C to +85°C Operation

• 5 kV HBM ESD rating

• High speed signal flow–thru pin-out package: 54-pin QFN (10 mm x 5.5 mm, 0.5 mm pitch)

Applications

FR-4 Backplane Traces and High Speed Cable

Ordering Information

EVM ID DEVICE ID DEVICE PACKAGE

DS125BR800EVM DS125BR800SQE/NOPB QFN-54

Figure 1. DS125BREVK REV. 1

DS125BR401/DS125BR800 Top Assembly

SNLU122–November 2012 DS125BR800EVM Evaluation Kit

Features

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Figure 2. DS125BREVK REV. 1

DS125BR401/DS125BR800 Bottom Assembly

4DS125BR800EVM Evaluation Kit SNLU122–November 2012

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4-Level IO Control

2 4-Level IO Control

Many of the control pins on the DS125BR800 have more than two valid levels. Table 1 below shows how

to access each of these levels with the switch banks on the back side of the EVM.

Table 1. Switches to set the 4-Level input control pins

4-Level Input Settings Setting for 3 pin switches (3-2-1)

0 - Tie 1kΩto GND ON - OFF - OFF

R - Tie 20kΩto GND OFF - ON - OFF

F - FLOAT (open) OFF - OFF - OFF

1 - Tie 1kΩto VIH OFF - OFF - ON

The following switches are used to set the input condition for the 4-level inputs:

•SW1, SW2, SW3, SW5, SW6, SW8, SW9

There are 3 switches connected to an input signal pin. Each switch when set to the ON position sets the

pin to one of the 4-level setting. The 6 pin switches are assigned similar to the 3 pin switches. The only

difference is 2 signal pins are connected and thus 6-5-4 is for the one signal pin and 3-2-1 is for another

signal pin.

NOTE: Only 1 switch at the ON position is allowed. Activating more than one switch concurrently

results in an indeterminate voltage level.

SNLU122–November 2012 DS125BR800EVM Evaluation Kit

Switch Connection Overview

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3 Switch Connection Overview

Table 2. Connection and Control Description

Component Name Function

IN_B2+, IN_B2-,

IN_B3+, IN_B3-,

J1 to J8 High-speed differential inputs

IN_A0+, IN_A0-,

IN_A1+, IN_A1-,

OUT_B2+, OUT_B2-,

OUT_B3+, OUT_B3-,

J9 to J16 High-speed differential outputs

OUT_A0+, OUT_A0-,

OUT_A1+, OUT_A1-,

J19 VIN or VDD DC Power - VIN or VDD to DS125BR800SQ

J20 VIN or VDD Jumper – VIN or VDD to VIH power

Optional SMBUS access pins.

J17 SDA, SCL See the datasheet for additional information on SMBUS.

J18 EEPROM Optional socket for EEPROM

EQB[1:0] or PIN MODE – EQ control for channel B inputs

SW1 AD[3:2] SMBUS MODE – AD[3:2] device address bits

ENSMB = LOW – PIN MODE

ENSMB = HIGH – SMBUS (slave mode)

SW2 ENSMB ENSMB = FLOAT – SMBUS (master mode – load configuration from

EEPROM)

SW3 DEMA[1:0] PIN MODE – DE control for channel A outputs

SW4 SDA/SCL “ON” position connects SDA and SCL lines to the device pin.

DEMB[1:0] or PIN MODE – DE control for channel B outputs

SW5 AD[1:0] SMBUS MODE – AD[1:0] device address bits

SD_TH – Signal detect threshold level (FLOAT = Default level)

SW6 SD_TH and LPBK - RES LPBK function for BR401 only (FLOAT = Normal operation)

VDD_SEL and VDD_SEL – Enable or disable the internal 3.3V to 2.5V regulator.

SW7 RESET RESET – Enable or disable the device (LOW – enable)

SW8 EQA[1:0] PIN MODE – EQ control for channel A inputs

INPUT_EN – Enable or disable the internal 50 ohm to VDD terminations

MODE – Tie 1kΩto GND = GEN 1,2 and SAS 1,2

INPUT_EN and

SW9 Float = Auto Mode Select (for PCIe and SAS-3)

MODE Tie 20kΩto GND = SAS-3 and GEN-3 without De-emphasis

Tie 1kΩto VDD = SAS-3 and GEN-3 with De-emphasis

ENSMB = FLOAT – SMBUS (master mode – load configuration from

EEPROM)

SW6: SD_TH becomes the READ_EN pin.

To start the loading at power up, set SW6 pin 3 to “ON” position (pull to

SW10 READ_EN GND).

To manually control the start, set SW6 pin 1 to “ON” position (pull to VDD)

and push the SW10 button for the high to low transition to start the loading.

When the loading is complete the LED – D1 light should turn OFF.

6DS125BR800EVM Evaluation Kit SNLU122–November 2012

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Quick Start Guide

4 Quick Start Guide

1. Connect J19: VIN = 3.3V or VDD = 2.5V and GND.

•For VIN = 3.3V:

Set SW7 pin1 (VDD_SEL) to the ON position (enable internal LDO regulator) and float VDD at J19.

•For VIN = 2.5V:

Set SW7 pin1 (VDD_SEL) to the OFF positions (disable internal LDO regulator) and float VIN at

J19.

2. Set jumper – J20 for VIH connection to VIN or VDD.

3. Connect 50 Ohm SMA cables to the board.

• The input signals J1 to J8 can be connected from a pattern generator.Set SW7 pin1 (VDD_SEL) to

the ON position (enable internal LDO regulator) and float VDD at J19.

• The output signals J9 to J16 can be connected to a scope.

Table 3. SMA Channel Connections

A/B Channels Input Channel Output Channel

J1 – IN_B2+, J2 – IN_B2- J9 – OUT_B2+, J10 – OUT_B2-

B-Channels J3 – IN_B3+, J4 – IN_B3- J11 – OUT_B3+, J12 – OUT_B3-

J5 – IN_A0+, J6 – IN_A0- J13 – OUT_A0+, J14 – OUT_A0-

A-Channels J7 – IN_A1+, J8 – IN_A1- J15 – OUT_A1+, J16 – OUT_A1-

4. Set the control pins for normal operation

• SW7 – RESET = 0 (enables the device): set switch pin2 to the ON position.

• SW9 – INPUT_EN = 1 (50 ohm input termination): set switches (3-2-1) = (OFF-OFF-ON).

• SW9 – MODE = VDD (enables SAS-3 / PCIe GEN3 mode): set switches (6-5-4) = (OFF-OFF-ON).

• SW6 – SD_TH = F (default signal detect threshold level): set switches (3-2-1) = (OFF-OFF-OFF).

• SW6 – LPBK - RES = F (normal operation): set switches (6-5-4) = (OFF-OFF-OFF).

SNLU122–November 2012 DS125BR800EVM Evaluation Kit

Quick Start Guide

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5. Set the input equalization level.

•For external pin mode control of the equalization level:

• Set ENSMB = 0 (1kΩto GND) by using the SW2 (3-2-1) = (ON-OFF-OFF).

• SW4 pin1,2 must be set to the OFF positions, so the SMBUS signals are disconnected.

• Refer to Table 1 for information on the 3 switch settings for the 4 level input.

Example:

• Set EQB[1:0] with SW1 for the B bank of inputs (top 4 inputs of DS125BR800).

• SW1 (6-5-4), (3-2-1) = (OFF-ON-OFF), (OFF-ON-OFF) = EQB[1:0] = R,R (Level 6).

• Set EQA[1:0] with SW8 for the A bank of inputs (bottom 4 inputs of DS125BR800).

• SW8 (6-5-4), (3-2-1) = (OFF-ON-OFF), (OFF-ON-OFF) = EQA[1:0] = R,R (Level 6).

Table 4. EQ Settings available with PIN MODE

Level EQA/B[1:0] SW1 - EQB[1:0] or SW8 - EQA[1:0] EQ (dB) @ 6 GHz

654321

1 0, 0 ON OFF OFF ON OFF OFF 3.1

2 0, R ON OFF OFF OFF ON OFF 6.7

3 0, F ON OFF OFF OFF OFF OFF 8.4

4 0, 1 ON OFF OFF OFF OFF ON 9.1

5 R, 0 OFF ON OFF ON OFF OFF 13.7

6 R, R OFF ON OFF OFF ON OFF 16.2

7 R, F OFF ON OFF OFF OFF OFF 15.9

8 R, 1 OFF ON OFF OFF OFF ON 17.0

9 F, 0 OFF OFF OFF ON OFF OFF 20.7

10 F, R OFF OFF OFF OFF ON OFF 21.8

11 F, F OFF OFF OFF OFF OFF OFF 23.6

12 F, 1 OFF OFF OFF OFF OFF ON 24.7

13 1, 0 OFF OFF ON ON OFF OFF 28.0

14 1, R OFF OFF ON OFF ON OFF 29.2

15 1, F OFF OFF ON OFF OFF OFF 30.9

16 1, 1 OFF OFF ON OFF OFF ON 31.9

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Quick Start Guide

6. Set the output VOD and De-emphasis level.

•For external pin mode control for the VOD and De-emphasis level:

• Set ENSMB = 0 (1kΩto GND) by using the SW2 (3-2-1) = (ON-OFF-OFF).

• SW4 pin1,2 must be set to the OFF positions, so the SMBUS signals are disconnected.

• Refer to Table 1 for information on the 3 switch settings for the 4 level input.

Example:

• Set DEMB[1:0] with SW5 for the B bank of outputs (top 4 outputs of DS125BR800).

• SW5 (6-5-4), (3-2-1) = (ON-OFF-OFF), (OFF-OFF-ON) = DEMB[1:0] = 0,1 (VOD=1.0V, DE=0 dB).

• Set DEMA[1:0] with SW3 for the A bank of outputs (bottom 4 outputs of DS125BR800).

• SW3 (6-5-4), (3-2-1) = (ON-OFF-OFF), (OFF-OFF-ON) = DEMA1:0] = 0,1 (VOD=1.0V, DE=0 dB).

Table 5. DE and VOD Settings available in PIN MODE

Level EQA/B[1:0] SW1 - EQB[1:0] or SW8 - EQA[1:0] GEN1 and GEN2

Inner Amplitude

6 5 4 3 2 1 DE (dB)

(VPP)

1 0, 0 ON OFF OFF ON OFF OFF 0.8 0

2 0, R ON OFF OFF OFF ON OFF 0.9 0

3 0, F ON OFF OFF OFF OFF OFF 0.6 -3.5

4 0, 1 ON OFF OFF OFF OFF ON 1.0 0

5 R, 0 OFF ON OFF ON OFF OFF 0.7 -3.5

6 R, R OFF ON OFF OFF ON OFF 0.5 -6

7 R, F OFF ON OFF OFF OFF OFF 1.1 0

8 R, 1 OFF ON OFF OFF OFF ON 0.7 -3.5

9 F, 0 OFF OFF OFF ON OFF OFF 0.6 -6

10 F, R OFF OFF OFF OFF ON OFF 1.2 0

11 F, F OFF OFF OFF OFF OFF OFF 0.8 -3.5

12 F, 1 OFF OFF OFF OFF OFF ON 0.6 -6

13 1, 0 OFF OFF ON ON OFF OFF 1.3 0

14 1, R OFF OFF ON OFF ON OFF 0.9 -3.5

15 1, F OFF OFF ON OFF OFF OFF 0.7 -6

16 1, 1 OFF OFF ON OFF OFF ON 0.5 -9

NOTE: The De-Emphasis levels are also available in SAS-3 / GEN-3 mode when MODE = 1

SNLU122–November 2012 DS125BR800EVM Evaluation Kit

SMBus Slave Mode of the EQ, VOD, and De-Emphasis level:

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5 SMBus Slave Mode of the EQ, VOD, and De-Emphasis level:

• Set ENSMB = 1 (1kΩto VIH) by using the SW2 (3-2-1) = (OFF-OFF-ON).

• Set SW4 pin1,2 to the ON position so the SMBUS signals are connected.

• Set SW3 pin1 thru pin6 switches to the OFF position so they do not connect to the SDA and SCL line.

• Set the SW1 and SW5 for the AD[3:0] pins. AD[3:0]=0000 sets device slave address = B0’hex.

• Connect SDA, SCL and GND to J17. Please refer to datasheet for register map for EQ, VOD and

DEM.

10 DS125BR800EVM Evaluation Kit SNLU122–November 2012

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