Sony CDX-828 - Compact Disc Changer System Manuel utilisateur
MICROFILM
SERVICE MANUAL
COMPACT DISC CHANGER
US Model
Canadian Model
AEP Model
UK Model
E Model
SPECIFICATIONS
CDX-828
Model Name Using Similar Mechanism CDX-805
CD Drive Mechanism Type MG-250C-137
Optical Pick-up Name KSS-521A/J2N
CDX-828
7-6. SCHEMATIC DIAGRAM – RF/SW Boards – • See page 39 forWaveforms. •See page 45 for IC Block Diagrams.
The components identified by mark !or dotted
line with mark !are critical for safety.
Replaceonly with partnumber specified.
Lescomposantsidentifiés par une marque!sont
critiques pour la sécurité. Ne les remplacer que
par une piéce portant le numéro spécifié.
– 27 – – 28 –
(Page 33)
CDX-828
– 33 – – 34 –
7-9. SCHEMATIC DIAGRAM – MAIN Board (1/3) – • See page 39 forWaveforms. •See page 46 for IC Block Diagrams.
(Page
28)
(Page 37)
CDX-828
– 35 – – 36 –
7-10. SCHEMATIC DIAGRAM – MAIN Board (2/3) – • See page 40 forWaveforms. •See page 47 for IC Block Diagrams.
(Page 38)
(Page 43)
CDX-828
– 37 – – 38 –
7-11. SCHEMATIC DIAGRAM – MAIN Board (3/3) – • See page 40 forWaveforms. •See page 47 for IC Block Diagrams.
(Page 34) (Page 35)
– 39 –
• Waveforms
– RF Board –
1IC11 #£ (RF O)
500 mV/DIV, 500 ns/DIV
2IC11 2(FEI)
50 mV/DIV, 1 µs/DIV
3IC11 $¶ (TEI)
200 mV/DIV, 500 µs/DIV
1.4 Vp-p
Approx.
110 mVp-p
Approx.
280 mVp-p
– MAIN Board (1/3) –
1IC101 @¶ (MDP)
2IC101 #§ (V16M)
3IC101 $ª (WDCK)
4IC101 %º (LRCK)
5IC101 %¢ (BCKO)
6.8 Vp-p
120 ns
6.6 Vp-p
11.4
µ
s
6.6 Vp-p
22.7
µ
s
6.6 Vp-p
472 ns
7IC101 &º (C4M)
8IC101 &¢ (WFCK)
9IC101 *ª (XTAI)
!º IC201 #¡ (EXTAL)
6IC101 ^™ (RFCK)
5.7 Vp-p
137
µ
s
6.6 Vp-p
236 ns
5.5 Vp-p
137
µ
s
3.3 Vp-p
59.2 ns
3.2 Vp-p
125 ns
2.5 Vp-p
7.6
µ
s
– 40 –
– MAIN Board (2/3) –
!¡ IC603 4
!™ IC601 4(XTO)
!£ IC601 7(BCK)
!¢ IC601 9(LRCK)
4.7 Vp-p
59.2 ns
6.4 Vp-p
59.2 ns
7.4 Vp-p
472 ns
7.4 Vp-p
22.7
µ
s
– MAIN Board (3/3) –
!∞ IC401 !ª (LRCK)
!§ IC401 !¶ (BCK)
!¶ IC401 !£ (WDCI)
!• IC401 !™ (LRCI)
!ª IC401 9(BCKI)
@¡ IC401 5(C4M)
@™ IC401 3, IC501&¶ (WFCK)
@£ IC403 1
@¢ IC501 @ª (EXTAL)
@º IC401 7(RFCK)
6.2 Vp-p
22.7
µ
s
6.2 Vp-p
472 ns
7.7 Vp-p
11.4
µ
s
6.6 Vp-p
22.7
µ
s
6.6 Vp-p
472 ns
5.7 Vp-p
137
µ
s
6.6 Vp-p
236 ns
5.5 Vp-p
137
µ
s
6.6 Vp-p
11.4
µ
s
3.2 Vp-p
100 ns
CDX-828
– 43 – – 44 –
7-13. SCHEMATIC DIAGRAM – DIGITAL OUT/JACK Boards –
(Page 36)
– 45 –
• IC Block Diagrams
– RF Board –
IC11 CXA1992BR
FZC
VC
TDFCT
TZC
ATSC
TEI
LPFI
TEO
VEE
EI
E
F
FE
BIAS
SL P
SL M
SL O
ISET
VCC
XRST
DATA
XLT
CLK
LOCK
SENS2
SENS1
C. OUT
VCC
DFCTO
IFB1 – IFB6
BAL1 – BAL4
TOG1 – TOG4
FS1 – FS4
TG1 – TG2
TM1 – TM7
PS1 – PS4
TGH
TGL
BALH
BALL
ATSC
DFCT
TM1
TG1
FS2
IFB1 – IFB6
VCC
VEE
VCC
VEE
VEE
PD 2
I-V AMP
FOK
CC2
CC1
CB
CP
RF O
RF I
RFTC
PD2
PD1
PD
LD
RF M
TA O
TA M
FSET
TG2
TGU
SRCH
FEO
FEI
FDFCT
FGD
FLB
FE O
FE M
TZC
FZC FOL
FOH
MIRR
LDON
LPCL
LPC
TGFL
DFCT1
CC1
1 2 3 45678 9 10
26
25
24
23
22
21
20
19
18
17
16
15
14
40
41
42
43
44
45
46
47
48
49
50
51
52
39
PD 1
I-V AMP
38
PD
AMP
37
LD
AMP
LASER
POWER
CONTROL
FOCUS BIAS
WINDOW
COMPARATOR
FOCUS ERROR
AMP
F I-V
AMP
E I-V
AMP TGFL TRACKING GAIN
WINDOW
COMPARATOR
E-F BALANCE
WINDOW
COMPARATOR
ATSC
WINDOW
COMPARATOR
TZC
COMPARATOR
TRACKING PHASE
COMPENSATION
CENTER
VOLTAGE
GENERATOR
FZC
COMPARATOR
FOCUS PHASE
COMPENSATION CHARGE UP
FSET
ISET
IIC DATA REGISTER, INPUT SHIFT REGISTER,
ADDRESS DECODER, SENSE SELECTOR,
OUTPUT DECODER TTL
↓
IIL
IIL
↓
TTL
IIL
↓
TTL
RF SUMMING
AMP FOCUS OK
COMPARATOR
PEAK/BOTTOM
HOLD
PEAK/BOTTOM
HOLD
DEFECT
AMP
MIRR
COMPARATOR
36 34 31 30 29 28 27
35 33 32
BAL1 – BAL4
TM6
TM2
VCC
VEE
TM5
11 12 13
TG2
TM4
VCC
VEE
TM3
FS1
VCC
VEE
TOG1 – TOG4
TM7
FS4
DFCT
+
–
+
–
– 46 –
IC52 BA6287F
1
2
3
4
OUT1
VM
VCC
FIN
8
7
6
5
GND
OUT2
VREF
RIN
CONTROL LOGIC
TSD
POWER
SAVE
DRIVER DRIVER
– MAIN Board –
IC101 CXD2530Q
1 2 3456789 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
43
42
41
40
39
38
37
36
35
34
33
32
31
50
49
48
47
46
45
44
88
89
90
91
92
93
94
95
96
97
98
99
100
81
82
83
84
85
86
87
71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
80 79 78 77 76 75 74 73 72
ASYMMETRY
CORRECTOR
DIGITAL
PLL
CLOCK
GENERATOR
D / A
INTERFACE
DIGITAL CLV
SUB CODE
PROCESSOR
TIMING
LOGIC CPU
INTERFACE
SERVO
AUTO
SEQUENCER
ERROR
CORRECTOR
16K RAM DIGITAL OUT
OSC
EFM
DEMODULATOR
TES6
VDD
VSS
EXCK
SBSO
SCOR
WFCK
TES5
EMPH
DOUT
C4M
FSTT
XTSL
MNT0
MNT1
MNT3
XROF
C2PO
RFCK
GFS
XPCK
XUGF
GTOP
VDD
VSS
TES4
BCK
TES3
PCMD
TES9
LRCK
WDCK
ASYE
ASYO
ASYI
BIAS
RF
AVDD
CLTV
AVSS
FILI
FILO
PCO
VCTL
V16M
VCKI
VPCO1
VPCO2
TES1
TES0
LOCK
PWMI
MDP
MDS
VSS
MON
FOK
VDD
SPOD
XLON
SPOB
SPOC
CLKO
SPOA
DATO
XLTO
SEIN
CNIN
XLAT
CLOK
SENS
DATA
SQCK
SQSO
TES2
CKOUT
LMUT
RMUT
VDD
VSS
NC
XRST
VSS
NC
NC
VDD
NC
TES8
XVSS
VSS
XTAI
XTAO
VSS
XVDD
TES7
NC
VDD
NC
NC
VSS
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