Furuno GP-90 Manuel utilisateur

GPS NAVIGATOR

GP-90/90-DUAL

Back

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9-52 Ashihara-cho,9-52 Ashihara-cho,

Nishinomi

a, Ja

anNishinomi

a, Ja

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IRST EDITION :

IRST EDITION : NOV.NOV. 20032003

Printed in JapanPrinted in Japan

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hts reserved.

ll ri

hts reserved.

PUB.No.PUB.No. SME-44270-ASME-44270-A

*00014894400**00014894400*

(( KAOKKAOK )) GP-90GP-90 * 0 0 0 1 4 8 9 4 4 0 0 ** 0 0 0 1 4 8 9 4 4 0 0 *

*SME44270A00**SME44270A00*

* S M E 4 4 2 7 0 A 0 0 ** S M E 4 4 2 7 0 A 0 0 *

Contents

1. Circuit Description

1.1 Antenna Unit............................................................................1

1.2 Display Unit.............................................................................1

1.3 LCD Driver Signal...................................................................4

1.4 GP-90 - DUAL ........................................................................4

2. Location of Parts .............................................................5

3. Maintenance

3.1 Adjustment...............................................................................6

3.2 Jumper Setting.........................................................................7

3.3 Battery Replacement................................................................8

4. Troubleshooting

4.1 Error Messages......................................................................10

4.2 LED Status.............................................................................10

4.3 Selftest...................................................................................10

4.4 Troubleshooting Flow Chart..................................................13

5. Communication with PC

5.1 Connection.............................................................................19

5.2 Setting....................................................................................19

5.3 DATA Transfer ......................................................................19

5.4 Data Format...........................................................................20

6. Program Upgradation

6.1 Using PC................................................................................23

6.2 Using MT-08 .........................................................................24

6.3 DIP Switch Setting ................................................................24

6.4 Procedure...............................................................................25

Schematic Diagrams ...............................................................S-1

1. Circuit Description

GP-90 features;

1) WAAS-capability (From the production in December 2003)

2) Compliance of IEC61108-1 ed.2

3) Calculation of set and drift based on NMEA ground speed and heading data (From the

production in December 2003)

4) Entering waypoint in range and bearing data (From the production in December 2003)

1.1 Antenna Unit

The antenna unit includes a preamplifier. The antenna cable carries +5 V to power the preamplifier.

The GPS signal received by the antenna is delivered to the GPS board, GN-8091. The GPS board

selftest cannot detect the short circuit on the antenna cable.

1.2 Display Unit

Figure 1 shows the block diagram of the display unit.

PREAMP

Beacon Antenna

ANTENNA UNIT DISPLAY UNIT

Lat/Long, SPD/CRS

GPS initial data

LCD

Key Data

LED Brill,

Display Data

+24 V,

AC210 V

GN-8091 Board

GPS

Power supply

PNL Board

(20P8148)

Keyboard

BEACON

Receiver

(

GR-7000A

)

+5V,+12V

NP Board

(20P8188)

RTCM SC-104

10.2 - 31.2 V

+5 V

Fig. 1 Block diagram of GP-90

RX SIG

5 V

1. Circuit Description

GPS Board, GN-8091

The board is 12 discrete channel, all - in - view, L1 GPS receiver which processes GPS signal for

position fixing and for calculating speed and course of the ship.

NP board, 20P8188

The board mainly consists of a CPU, Flash ROM stored system program, Video RAM, Backup battery,

and power supply circuit. Major function of the board is;

1) Control of entire system

2) Reading key data

3) Control of input and output data

4) Storage of GPS data, waypoints and mark data

5) Graphic data processing

6) Output of display data to LCD

7) Output of log pulse (contact closure signal), if selected

8) Producing following voltages

+5 V: for digital circuit and internal beacon receiver

+12 V: for flash memory and analog circuit

–20.5 V: LCD drive voltage

210 Vac: for LCD backlight

PNL Board, 20P8148

The board consists of 18 switches, 10 LEDs used to adjust brilliance, a buzzer, and a temperature

coefficient resistor (R1). The contrast of LCD is kept constant by R1.

LCD, EW50136FDW

The LCD contrast is stabilized by temperature compensation. Decreasing temperature, for instance,

causes an increase in R1’s resistance and a consequent increase in the LCD bias voltage. The NP board,

20P8188 outputs the bias voltage from pin 2 of J10. The bias is approximately –17.9 V at 25 °C in

automatic bias mode. The bias changes from –20 V to –16 V at 25 °C in manual bias mode.

1. Circuit Description

To LCD Unit

To PNL Unit

From Personal

Computer, Beaco

Receiver

From Built-in

Beacon Receiver Program

ROM

(Flash ROM)

8 Mbit

U16

CR7

#26

#30,#41

#27

#31

MPU

TMP68301

#43

#50-52

DATA 1

DATA 3

#40

#41

#44

RS-232C (5 V),

RS-422 (0 V)

DATA 2

J3 MOB IN

RXD

TXD

U29 #18,U30 #4

#14

#11

CH A

CH B

SIO

RS-232C(U29)

RS-422(U30)

Selector

U29,U30 U23

+12 V +5 V -20.5 V

DATA 4

POWER

Address G/A

ACRTC Controller,

LCD I/F, KEY I/F

16 MHz

8 MHz

U15

RAM

2 Mbit

ROM

4 Mbit

VIDEO

RAM

3 Mbit

6.2 MHz

Address Data ACRTC

Key Data

Picture Data

←Lat/Long,SPD/CRS,Time Date,etc

+5 V

GPS INITIAL SETTING→

U12, U13 U21, U27 U14 U24 U25

U26

CFL Regulator

Contrast Adjuster. #6

JP1

BT1 #3

BAT VOLT

Detector

U22

#2 VBAK

(

+3V

)

Tout1

Connected to temperature sensing

resister(2.7 V at about 20°C)

Vo (-16 V to –20 V)

J10

J11

To GPS

RECEIVER

1, 4

3, 4

1, 2

3, 4

1, 2

Brilliance and Contrast

Adjuster. (D/A CONV.)

TXD

RXD

11-14

1-10

Q6,Q7,T1,U1

ON/OFF

Switching

Regulator

Controller

Switching

Regulator

Q16

U38

TXD

RXD

TXD

JP4, JP5

CONTACT

SIG. GEN

Fig.1.2 Block diagram of NP board

1. Circuit Description

1.3 LCD Driver Signal

The table below illustrates the pin assignments of J10, LCD connector on NP board.

J10 Signal Remarks J10 Signal Remarks

#1 F.G Frame Ground #8 M AC signal for LCD driving

#2 Vo Power supply voltage for

contrast adjustment #9 FRM Frame start signal (Data

signal of the shift register of

the common driver)

#3 VEE LCD driver supply voltage

(-20.5 V) #10 DISP

OFF Display off signal, Active

low

#4 Vss GND #11 D3 Display data

#5 VDD +5 V #12 D2 Display data

#6 CP Clock pulse for segment shift

#7 LOAD Common driver data shift

signal: also latches the data of

the line immediately above.

#14 D0 Display data

1.4 GP-90-DUAL

GP-90 - DUAL consists of two GPS receivers and an interface unit, IF-2500.

The GPS receiver for dual configuration differs from one for single configuration only in software.

Antenna Unit

12 - 24 VDC

GPA - 017S (GPS)

GPA - 018S (DGPS, Whip)

GPA - 019S (DGPS)

ANT

MJ - A6SPF0012 - 100

(Comes with IF - 2500 )

DATA 1

DATA 3

DATA 4

DATA 2

MJ - A6SPF003 - 050

MJ - A2SPF014 - 03 Display Unit

ANT

DATA 1

DATA 3

DATA 4

DATA 2

MJ - A2SPF014 - 03

12 - 24 VDC

GPA - 017S (GPS)

GPA - 018S (DGPS, Whip)

GPA - 019S (DGPS)

GP-90 - DUAL

IF - 2500

E/S, Radar & Autopilot Alarm system

VCTF1.25X2C

12 - 24 VDC

VH2P - 002

XH4P - 002 XH5P-002 XH3P - 002

Contact - closure signal

INPUT INPUT

Antenna Unit

J2 (XH6P) J3 (XH6P)

J1(VH2P)

(XH3P)

J10 (XH3P)

J11 (XH3P)

J12

(XH4P)

J4 (XH4P)

J5 (XH4P)

J6 (XH4P)

J7 (XH5P)

Display Unit

Fig.1.3

2. Location of Parts

Fig.2.3 Front panel without LCD

PNL Board

(20P8148)

Fig.2.2 Front panel, rear view

LCD

EW50136DW

Fig.2.1 GP-90 Display unit

Beacon receiver

GR-7000A

(Optional)

Power supply circuit

4A Fuse

NP Board

(20P8188)

GPS receiver

GN-8091

3. Maintenance

See Fig.3.3 for

enlarged view.

Fig.3.1 NP Board (20P8188)

See Fig.3.2 for

enlarged view.

3.1 Adjustment

Switching regulator frequency and +5 V are adjusted by R34 and R84 respectively as shown in Table

3.1.

Table 3.1 Adjusters on NP board

Test points Adjuster Rating

Gate of Q16 and GND(R80) R34 82.3 to 84.3 KHz

J2#3(+) and J2#5(-) R84 5.07 V to 5.17 V

Fig.3.2 Power supply circuit, enlarged view (NP Board)

Regulator, U8

Type : PQ09RA1

Code : 000-131-421

Q16 gate

4A Fuse

R34 (F - ADJ)

R84 (V - ADJ)

3. Maintenance

3.2 Jumper Setting

Table 3.2 lists the function of jumpers.

Table 3.2 Jumpers on NP board

Jumper Connected Removed

JP1 (BAT) Normal operation* Battery replacement

JP2 (EMU) Not used Not used*

JP3 (BEACON) Not used* Not used

JP4 (NMEA) Not used* When JP5 is connected.

JP5 (LOG) Log pulse from DATA 3 When JP4 is connected.

*Factory - default

JP2

JP1

JP5 JP3 JP4

Fig.3.3 Jumpers on NP Board, enlarged view

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