Casio CTK-541 Manuel utilisateur
ELECTRONIC KEYBOARD
CTK-541
JULY.1999
CTK-541
E
E
E
CONTENTS
Specifications ................................................................................................................................... 1
Block Diagram.................................................................................................................................. 3
Circuit Description ............................................................................................................................ 4
Adjustment ....................................................................................................................................... 8
Major Waveforms ........................................................................................................................... 10
Printed Circuit Boards .................................................................................................................... 11
Schematic Diagrams ...................................................................................................................... 15
Exploded View ............................................................................................................................... 19
Parts List ........................................................................................................................................ 20
— 1 —
SPECIFICATIONS
GENERAL
Keyboard: 61 standard-size keys, 5 octaves (with touch response on/off)
Tones: 100
Polyphony: 16 notes maximum (8 for certain tones)
Auto accompaniment
Rhythm patterns: 100
Tempo: Variable (236 steps, = 20 to 255)
Chords: 2 fingering methods (CASIO CHORD, FINGERED)
Rhythm controller: START/STOP, SYNCHRO/FILL-IN
Accomp volume: 0 to 9 (10 steps)
Song bank
Tunes: 100
Controllers: PLAY/PAUSE, STOP, REW, FF, LEFT ON/OFF (ACCOMP), RIGHT ON/
OFF (MELODY)
Display
Name display: TONE, RHYTHM, SONG BANK name/number, keyboard settings name/value
Tempo: Tempo value, metronome, synchro standby, beat indicator
Chord: Chord name, Chord form
Fingering: Fingering indicators, parts, pedal
Song bank status: PLAY, PAUSE, REW, FF
Staff: 5 octaves with sharp and flat indications
Keyboard: 5 octaves
MIDI: 5 multi-timbre receive
Other functions
Transpose: 12 steps (–6 semitones to +5 semitones)
Tuning: Variable (A4 = approximately 440 Hz ±50 cents)
Volume: 0 to 9 (10 steps)
Terminals
MIDI terminals: IN, OUT
Sustain terminal: Standard jack
Phones/Output terminal: Stereo standard jack
Output Impedance: 50 Ω
Output Voltage: 3.5 V (RMS) MAX
Power supply terminal: 9 V DC
Power supply DC 9 V
Batteries: 6 D-size batteries
Battery life: Approximately 5 hours on manganese batteries
Auto power off: Turns power off approximately six minutes after last key operation. Enabled
under battery power only, can be disabled manually.
Speaker output: 2.0 W + 2.0 W
Power consumption: 9 V --- 7.7 W
Dimensions (HWD): 961 ×376 ×143 mm (37-7/8 ×14-13/16 ×5-5/8 inches)
Weight: Approximately 5.7 kg (12.6 lbs) (without batteries)
— 2 —
ELECTRICAL
Current drain with 9 V DC: Nominal Limit
No sound output 330 mA 330 mA ±20%
Maximum volume 990 mA 990 mA ±20%
with 16 keys C1 to D3 pressed in Synth-Lead 1
Volume: Maximum, Touch response: ON(Velocity MAX)
Phone output level (Vrms with 8 Ωload each channel): L 240mV 240 mV ±20%
with key C3 pressed in Synth-Lead 1 R 250mV 250 mV ±20%
Speaker output level (Vrms with 4 Ωload each channel):
with key G1 pressed in Synth-Lead 1 L/R 2500mV 2500 mV ±20%
Output level (Vrms with 47 KΩload each channel): L 2300mV 2300 mV ±20%
with key C2 pressed in Synth-Lead 1 R 2400mV 2400 mV ±20%
Minimum operating voltage: 6.3V 7.0V
— 3 —
BLOCK DIAGRAM
CPU
GT913F(T)
LSI1
Keyboard
Buttons
LCD LCD Driver
KS0066U-10B
LSI3
Reset IC
UPD6379GR-E1
IC1
Oscillator
X1, Q1
Power Supply Circuit
Q201 ~ Q203, Q207, Q208, D205
Power Amp.
TA8248K
IC201
Filter (L)
Q206
Filter (R)
Q205
Phone/Output
VC VCC DVDD AVDD
APO
DC + 9V IN
DB4 ~ DB7
MIDI IN
MIDI OUT
COM1 ~ COM16
SEG1 ~ SEG40
RS
R/W
EKI0,KI1
FI8~FI10 FI0 ~ FI7
KC0 ~ KC7
MD0 ~ MD15
MA0 ~ MA19 ROM(8M-bit)
MSM538002E-
N8GS - KDR1
LSI2
Power Switch
— 4 —
CIRCUIT DESCRIPTION
KEY MATRIX
NOMENCLATURE OF KEYS
KI0 KI1 KI2 KI3 KI4 KI5 KI6 KI7
KO0 C2 G#2 E3 C4 G#4 E5 C6 G#6
KO1 C#2 A2 F3 C#4 A4 F5 C#6 A6
KO2 D2 A#2 F#3 D4 A#4 F#5 D6 A#6
KO3 D#2 B2 G3 D#4 B4 G5 D#6 B6
KO4 E2 C3 G#3 E4 C5 G#5 E6 C7
KO5 F2 C#3 A3 F4 C#5 A5 F6
KO6 F#2 D3 A#3 F#4 D5 A#5 F#6
KO7 G2 D#3 B3 G4 D#5 B5 G6
KO8 —+0
KO9 321
KO10 6 5 4 Rhythm Tone
KO11 9 8 7 Fingered Normal Off
KO12 FF Right Stop Left REW
Tempo
Down Tempo
Up
Start/
Stop Synchro/
Fill-In Chord
Book Accomp
Volume
Transpose/
Tune/MIDI
Song
Bank
CASIO
Chord
Play/
Pause
Volume
Down Volume
Up
F#3 G#3 A#3 C#4 D#4 F#4 G#4 A#4 C#5 D#5 F#5 G#5 A#5
F3 G3 A3 B3 C4 D4 E4 F4 G4 A4 B4 C5 D5 E5 F5 G5 A5 B5 C6
D#3
C2 D2 E2 F2 G2 A2 B2 C3 D3 E3 B6A6G6F6E6D6 C7
C#3A#2G#2
F#2D#2
C#2 A#6
G#6F#6D#6
C#6
— 5 —
CPU (LSI1: GT-913F)
The 16-bit CPU contains a 1k-byte RAM, three 8-bit I/O ports, two timers, a key controller and serial interfaces.
The CPU detects key velocity by counting the time between first-key input signal FI and second-key SI from
the keyboard. The CPU reads sound data and velocity data from the sound source ROM in accordance with
the selected tone; the CPU can read rhythm data simultaneously when a rhythm pattern is selected. Then the
CPU provides 16-bit serial sound data to the DSP. The CPU also controls MIDI input/output and stores
sequencer data into the working storage RAM.
The following table shows the pin functions of LSI1.
Pin No. Terminal In/Out Function
1 TXD0 Out MIDI signal output
2 RXD0 In MIDI signal input
3 SCK0 Out APO (Auto Power Off) signal output
4, 5 TXD/P13, In/Out Data bus for the LCD driver
RXD/P14
6 SCK1 Out 1 MHZ synchronizing pulse output
7 AVCC In CVDD (+5 V) source
AC adaptor detection terminal.
8 AN0 In +5 V when the keyboard is powered by batteries and becomes 0 V
to cancel the APO function when AC adaptor is connected.
9 AN1 In Input from pitch bender
10 AGND In Ground (0 V) source
11 BCK Out Bit clock output
12 SO Out Serial sound data output
13 LRCK Out Word clock output
14 GND In Ground (0 V) source
15, 16 XLT0, XLT1 In/Out 30 MHz clock input/output
17 VCC In +5 V source
18, 19 MOD0, MOD1 In Mode selection terminal
20 RSTB In Reset signal input
21 NMI In Power ON signal input
22 INT/P10 In/Out Data bus for the LCD driver
23 ~ 30 FI0 ~ FI3 In Terminal for key input signal
SI0 ~ SI3
31 ~ 38 KC0 ~ KC7 Out Terminal for key scan signal
39 ~ 50 FI4 ~ FI9 In Terminal for key input signal
SI4 ~ SI9
51 FI10 In Terminal for button input signal
52 SI10/P23 Out Chip enable signal for the LCD driver
53 ~ 55 KI0 ~ KI2 In Terminal for button input signal
56 MWNB Out Write enable signal for the DSP
57 ~ 76 MA0 ~ MA19 Out Address bus
77 MCSB0 Out Chip enable signal output for the sound source ROM
78 MCSB1 Out Not used
79 MCSB2 Out Chip enable signal output for the DSP
— 6 —
Pin No. Terminal In/Out Function
80 VCC In +5 V source
81 GND In Ground (0 V) source
82 MRDB Out Read enable signal output for the sound source ROM
83 ~ 98 MD0 ~ MD15 In/Out Data bus
99 PLE Out Reset signal output for the DSP
100 P17 In/Out Data bus for the LCD driver
LCD DRIVER (LSI3: KS0066U-10B)
The LCD driver can drive a dot matrix LCD having 40 segment and 16 common lines. The LSI contains 240
graphic symbols in the built-in character generator ROM, and stores 80 characters in the built-in display data
RAM. In accordance with command from the CPU, the LSI is capable of displaying up to 16 characters
simultaneously. The following table shows the pin functions of KS0066U-10B.
Pin No. Terminal In/Out Function
1 ~ 22,
63 ~ 80
23 VSS — GND (0 V) source
Terminals for the built-in clock pulse generator. The external
resistor connected determines the oscillation frequency.
LCD drive voltage input.
26 ~ 30 V1 ~ V5 In Those voltages are used for generating the stepped pulse of
the LCD drive signals.
31, 32 LP, XCLS — Not used
33 VDD In DVDD (+5 V) source
34, 35 FR, DO — Not used
Data/command determination terminal.
High: data, Low: command
37 R/W In Read/Write terminal. High: read, Low: write
Chip enable signal.
38 E In High: enable, the writing is done at fall edge.
Low: disenable
39 ~ 42 DB0 ~ DB3 — Not used. Connected to GND (0 V)
43 ~ 46 DB4 ~ DB7 In/Out Data bus
47 ~ 62 COM1 ~ COM16 Out Common signal/output
SEG1 ~ SEG40 Out Segment signal output
24, 25 OSC1, OSC2 In/Out
36 RS In
— 7 —
FILTER BLOCK
Since the sound signals from the CPU is stepped waveforms, the filter block is added to smooth the waveforms.
POWER AMPLIFIER (IC201: TA8248K)
The power amplifier is a two-channel amplifier with standby switch.
The following table shows the pin function of IC201.
Pin No. Terminal In/Out Function
1 NC — Not used
2 B.S.2 — Terminal for a bootstrap capacitor
3 OUT2 Out Channel 2 output
4 VCC In +9 V source
5 OUT1 Out Channel 1 output
6 B.S.1 — Terminal for a bootstrap capacitor
7 Power GND In Ground (0 V) source
8 Stand by In Power control signal input. 0 V: Off, +9 V: On
9 DC — Terminal for a decoupling capacitor
10 NF1 In Negative feedback input
11 IN1 In Channel 1 input
12 IN2 In Channel 2 input
13 NF2 In Negative feedback input
14, 15 Pre GND In Ground (0 V) source
Amp.
TA8248K Filter
Block CPU
MSM6755B-17
— 8 —
ADJUSTMENT
MAIN PCB
1) Items to be adjusted:
2) Adjustment and Test Point Locations
Item Measuring Instrument
Vop voltage setting Voltmeter
VR1
(BOTTOM VIEW)
Test point
(TOP VIEW)
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