Audiopraise AVARICE Manuel utilisateur

AVARICE

User Manual

Avarice – User Manual

rev.1, January 2012

- 2 -

Introduction

IntroductionIntroduction

Introduction

T e Avarice is a device primarily aimed at t e owners of digital to

analog converters, digital amplifiers, digital crossovers and ot er devices

w ic perform digital to analogue conversion, and t erefore rely on a ig

quality of t e incoming digital signal. T e Avarice elps to attenuate and

reject all sorts of interference between various devices, to restore t e time

domain of t e S/PDIF signal (i.e. to attenuate jitter) and to upsample

t e signal up to four times, t us bypassing t e imperfect digital filters

present in any integrated DAC c ip. Connecting t e Avarice into t e signal

pat and setting its signal processing parameters is very simple and intuitive.

Connection

ConnectionConnection

Connection

T e device as one input and one output, and can t erefore be simply

introduced into t e S/PDIF signal pat by placing it between t e signal source

and t e signal receiver. Typical signal sources include CD/DVD players,

satellite or cable TV receivers, multimedia players, PC sound cards, portable

music players, etc. Signal receivers performing DA conversion include stand-

alone DA converters, AV receivers, digital amplifiers, digital crossovers and

t e like. T e diagram below s ows an example of a signal pat employing

t e Avarice. Suitable S/PDIF cables terminated by BNC connectors can be

included in t e packaging of t e Avarice on t e customer's request.

DVD Player

DAC

Avarice

S/PDIF out

S/PDIF outS/PDIF in

S/PDIF in

Avarice – User Manual

rev.1, January 2012

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T e Avarice version employing t e optical input may serve as a ig -

quality optical-to-metallic SPDIF converter (TOSLINK -> S/PDIF). T e

improvement delivered by t e Avarice can be particularly significant w en

used to connect an optical signal source, w ic is more susceptible to jitter.

T e Avarice can be fed wit power by t e supplied universal power

source, or by any ot er DC source meeting t e required parameters (see

specification s eet).

LED indicators

LED indicatorsLED indicators

LED indicators

T e current operational mode of t e device is indicated by four diodes

located on t e front panel. T e LEDs lig t up individually or in various

combinations to indicate t e input sampling frequency ranging from 32kHz

to 192kHz, as s own on a sc ematic printed on t e back panel of t e device.

If no input signal is detected, all four diodes lig t up and become slig tly

dimmed after some 30 seconds, so t at t e device does not visually disturb

t e room interior.

Set

SetSet

Settings

tingstings

tings

Various audio signal processing parameters can be user-configured,

using six jumpers accessible from t e front panel. Jitter attenuation is active

at al times, for all input sampling frequencies. It is a result of t e c oice of

circuit topology and cannot be deactivated by t e user.

Avarice – User Manual

rev.1, January 2012

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T e effect of t e jumper settings is also s own on a sc ematic on t e

back panel.

Switc 1 – enables (ON) or disables t e upsampling function

Switc 2 – upsampling to 96 kHz or 192 kHz (ON)

Switc 3 – output bit dept value set to 16 bit or 24 bit (ON)

Switc 4 – digital filter c aracteristic #1 (ON) or #2

Switc es 5 and 6 – compatibility setting of t e S/PDIF output

Switc 1 activates 2x or 4x upsampling performed in a single filtering

stage. If t is switc is set to t e OFF position, t e Avarice does not alter

t e audio data – t e position of switc es 2 and 4 as no effect in t is case.

W enever switc 1 is at t e ON position, t e position of switc 2 determines

if two or four-fold upsampling is performed according to t e maximum

output sampling frequency. Switc 4 allows t e user to select one of two

available digital filter c aracteristics.

T e following table contains t e input and output sampling frequencies and

t e corresponding switc settings.

Output Fs

Input Fs S1:OFF S1:ON S2:OFF S1:ON S2:ON

32 kHz 32 kHz 32 kHz 32 kHz

44.1 kHz 44.1 kHz 88.2 kHz 176.4 kHz

48 kHz 48 kHz 96 kHz 192 kHz

88.2 kHz 88.2 kHz 88.2 kHz 176.4 kHz

96 kHz 96 kHz 96 kHz 192 kHz

176.4 kHz 176.4 kHz 176.4 kHz 176.4 kHz

192 kHz 192 kHz 192 kHz 192 kHz

Fs – sampling frequency

Avarice – User Manual

rev.1, January 2012

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Switc 3, determining output bit dept , is active at all times. It is useful

mainly for t e owners of so-called non-oversampling DACs or older devices

w ic usually employ a 16-bit word lengt . T e setting of t is switc to 16

bits will ensure correct bit dept reduction of a 24-bit input signal by

applying TPDF dit ering.

Switc es 5 and 6 enable t e user to modify t e structure and certain

sync ronization elements of t e S/PDIF protocol, w ic can ave an impact

on sound (so-called data jitter). Four setting configurations are available in

total, as some S/PDIF receivers may not work wit some of t e available

settings. T e setting combinations ave to be tested by trial and error. Wit

bot switc es in t e OFF position (up) t e output is set to a standard format

compatible wit all receivers.

S ould you ave any questions or concerns, you can contact our

dealers. Alternatively, please contact us on [email protected].

Avarice – User Manual

rev.1, January 2012

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Specifications

SpecificationsSpecifications

Specifications

S/PDIF input

S/PDIF inputS/PDIF input

S/PDIF input

•protocol: S/PDIF (IEC958 / EIAJ CP1201)

•type: coaxial, transformer-coupled, 75Ω impedance, BNC connector, optional

version equipped wit TOSLINK input available on request

•format: linear PCM stereo

•supported sampling frequencies: 32/44.1/48/88.2/96/176.4/192kHz

•supported bit dept : 16-24bit

S/PDIF output

S/PDIF outputS/PDIF output

S/PDIF output

•protocol: S/PDIF (IEC958 / EIAJ CP1201)

•type: coaxial, transformer-coupled, 75Ω impedance, BNC connector

•format: linear PCM stereo

•supported sampling frequencies: 32/44.1/48/88.2/96/176.4/192kHz

•supported bit dept : 16 / 24bit

Jitter attenuation

Jitter attenuationJitter attenuation

Jitter attenuation

•recovery of t e clock signal using digital PLL

•two-stage re-clocking of t e output SPDIF signal

•t ree data-jitter attenuation modes

•low-noise discrete regulators for t e clock and t e output circuits

Hig

HigHig

Hig -

-quality sync ronous upsampling

quality sync ronous upsamplingquality sync ronous upsampling

quality sync ronous upsampling

•proprietary linear p ase Zero Alias digital filters

•33bit arit metic / 67bit accumulator

•2x and 4x upsampling performed in one single filter stage

User settings

User settingsUser settings

User settings

•Zero Alias LPCM Upsampling: on / off

•Zero Alias LPCM Upsampling: 2x / 4x

•output bit dept : 16 / 24bit

•two user selectable upsampling filter c aracteristics

•data jitter attenuation: off / mode 1-3

Power supply and dimensions

Power supply and dimensionsPower supply and dimensions

Power supply and dimensions

•power supply connector: 2.1mm DC jack

•voltage / current rating: 8-15VDC / 1A

•lxwx : 120x78x43mm

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