DAC Channel-A MSB (Offset=5) 54
DAC Channel-A (Offset=4) 55
DAC Channel-B LSB (Offset=6) 57
DAC Channel-B MSB (Offset=7) 57
DAC Channel-B (Offset=6) 57
Clear Interrupts (Offset=8) 59
ADC Status (Offset=8) 60
ADC Control (Offset=9) 62
Pacer Clock Control (Offset=10) 64
FIFO Status MSB (Offset=10) 65
ADC Configuration (Offset=11) 68
8254 CT0 Data (Offset=12, RB='0'. Index=68, RB='1') 71
8254 CT1 Data (Offset=13, RB='0'. Index=69, RB='1') 71
8254 CT2 Data (Offset=14, RB='0'. Index=70, RB='1') 71
8254 Configuration (Offset=15, RB='0'. Index=71, RB='1') 72
FIFO Status LSB (Offset=15) 74
Index Data LSB (Offset=12, RB='1') 74
Index Data MSB (Offset=13, RB='1') 75
Index Data (Offset=12, RB='1') 75
Index Pointer (Offset=14, RB='1') 76
Conversion Disable (Offset=1028; Index=64, RB='1') 78
Burst Mode Enable (Offset=1029; Index=65, RB='1') 79
Burst Function Enable (Offset=1030; Index=66, RB='1') 80
Extended Status (Offset=1031; Index=67, RB='1') 81
General Configuration (Index=0, RB='1') 82
Interrupt Source Select (Index=2, RB='1') 83
Interrupt Configuration (Index=4, RB='1') 84
STX104 Reference Manual
Copyright © 2009 by Apex Embedded Systems. All rights reserved.
Thursday, October 08, 2009 v
