Vlsi VS1000 Manuel

PRELIMINARY DOCUMENT

VS1000 PROGRAMMER’SGUIDE

VSMPG “VLSI Solution Audio Decoder”

Project Code: Support.VS1000

Project Name: VSMPG

All information in this document is provided as-is without warranty. Features are

subject to change without notice. This document may contain mistakes and typ-

ing errors. Please contact VLSI if you suspect an error.

Revision History

Rev. Date Author Description

0.1 2007-03-23 PKP Preliminary version

0.11 2007-04-16 PKP Minor adjustments

0.12 2007-06-28 PKP Additions for version 1.33 of developer tools

0.14 2007-06-28 PKP VS1000B minor update

0.15 2008-06-30 POj vskit1.34: lib and include merged

0.16 2009-07-06 POj USB register map ﬁxed.

0.20 2011-10-04 POj More NF peripheral information.

Rev. 0.20 2011-10-04 Page 1(90)

PKP

VS1000 PROGRAMMER’SGUIDE VSMPG

Who needs to read this document

This document describes the programming interface, register map and and integrated

peripherals of the VS1000. It’s primarily meant for those that wish to add to the func-

tionality of the ROM code in VS1000 or design completely new software for the chip.

If you use the USB...

The example “Changing the USB descriptors” should be read by all vendors that have

USB functionality in their end-products. Although the ROM software is functional as is,

all such vendors should change the USB descriptors to identify the vendor and product

ID’s correctly.

Additionally, all vendors that ship devices conforming to the USB Mass Storage Class

speciﬁcation should change the USB descriptors and create a unique serial number for

each device. Instructions on how to do this are given in the example.

VS1000B/C

VS1000B is an updated version of VS1000A. VS1000B has many small internal ﬁxes

and some additions that remove some of the restrictions in VS1000A. It is mainly com-

patible with VS1000A, but code needs to be recompiled for VS1000B. This guide was

originally written for VS1000A, so it may not show all of the extra features in VS1000B.

VS1000C is another production test version of VS1000B with identical ROM.

VS1000D

VS1000D includes bug ﬁxes, but is fully backwards-compatible with VS1000C. All soft-

ware works without recompilation, so VS1000D can be used as a direct replacement.

The patches required for VS1000C are no longer necessary, which can save a bit of

code space.

The most important VS1000D changes:

•Code can be loaded and executed when in USB RAM disk mode without

detaching the device.

•Default 3 V IO voltage setting reduced from 3.6 V to 3.3 V (control value 31 to 27).

•SCSI supports the full 32-bit block address (2048GB).

•BusyWait1() now waits 1 ms at 12 MHz clock.

•Time to enter low-power pause mode doubled.

•Ignores subdirectories in FAT12 disks.

•RAMDISK label changed to VS1000D_RAM to make it possible to detect VS1000D.

•USB descriptors, including device ID is the same as with VS1000B.

•Fixed-width Latin-1 font (7x8 pixels) and 8-bit bit-reverse table added to YROM.

All new code should be written for VS1000D.

Rev. 0.20 2011-10-04 Page 2(90)

PKP

VS1000 PROGRAMMER’SGUIDE VSMPG

Contents

Introduction 2

Table of Contents 3

1 Introducing the VS1000 7

2 VS_DSP Basics 8

3 VS1000 RAM Memory Map 9

4 VS1000 Integrated Peripherals 10

5 VS1000 Register Map and Frequently Used Tables 11

6 Software Tools 16

6.1 vcc........................................ 16

6.2 vslink ...................................... 16

6.3 vs3emu ..................................... 16

6.4 coff2spiboot................................... 16

6.5 coff2nandboot ................................. 17

6.6 makenandimage (required for VS1000A only) . . . . . . . . . . . . . . . . 17

7 Examples 18

7.1 Hello,World! .................................. 18

7.1.1 Compiling................................ 18

7.1.2 Linking ................................. 19

7.1.3 Loading................................. 19

7.1.4 Note................................... 20

7.1.5 InputandOutput............................ 20

7.2 MakingtheLEDsblink............................. 22

7.3 Adjusting the Player User Interface . . . . . . . . . . . . . . . . . . . . . . 23

7.4 Hooking custom storage controller . . . . . . . . . . . . . . . . . . . . . . 25

7.4.1 ReadDiskSector is for reading only . . . . . . . . . . . . . . . . . . 26

7.5 Setting your own USB descriptors . . . . . . . . . . . . . . . . . . . . . . 29

7.5.1 Descriptor data format . . . . . . . . . . . . . . . . . . . . . . . . . 29

8 Booting from SPI EEPROM 32

8.0.2 Using a VS1000 Developer Board as an eeprommer . . . . . . . . 32

9 Booting from NAND FLASH 36

9.1 Nand Flash startup sequence and structure . . . . . . . . . . . . . . . . . 36

9.2 Preparing a nand ﬂash image . . . . . . . . . . . . . . . . . . . . . . . . . 37

9.3 Using the VS1000 Demostration/Developer Board as a nand ﬂash writer . 38

10 Using an external display 40

11 Peripheral documentation 41

Rev. 0.20 2011-10-04 Page 3(90)

PKP

VS1000 PROGRAMMER’SGUIDE VSMPG

12 VS1000 System Controller 41

12.1General ..................................... 41

12.2Registers .................................... 41

12.2.1 SCI_SYSTEM: System Power and Clock Control . . . . . . . . . . 41

12.2.2USBpowering ............................. 42

12.2.3 SCI_STATUS: System Flags . . . . . . . . . . . . . . . . . . . . . 42

12.2.4USBdetection ............................. 42

12.3ConservingPower ............................... 43

12.4I/OPinRouting................................. 44

12.5 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

13 PLL controller v1.0 2006-05-10 45

13.1General ..................................... 45

13.2 DAC Interpolator control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

13.3Registers .................................... 45

13.3.1 Interpolator Rate (low part) . . . . . . . . . . . . . . . . . . . . . . 45

13.3.2 Interpolator Rate (high part) and PLL control . . . . . . . . . . . . 46

13.4 Overview of VS1000 Clocking . . . . . . . . . . . . . . . . . . . . . . . . . 47

13.5 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

14 Interruptable General Purpose IO (VS1000) v1.0 2002-04-23 49

14.1General ..................................... 49

14.2Registers .................................... 49

14.2.1 Data Direction GPIOx_DDR . . . . . . . . . . . . . . . . . . . . . . 49

14.2.2 Output Data GPIOx_ODATA . . . . . . . . . . . . . . . . . . . . . . 49

14.2.3 Input Data GPIOx_IDATA . . . . . . . . . . . . . . . . . . . . . . . 50

14.2.4 Falling Edge Interrupt Enable GPIOx_INT_FALL . . . . . . . . . . 50

14.2.5 Rising Edge Interrupt Enable GPIOx_INT_RISE . . . . . . . . . . 50

14.2.6 Interrupt Pending Source GPIOx_INT_PEND . . . . . . . . . . . . 50

14.2.7 Data Set Mask GPIOx_SET_MASK . . . . . . . . . . . . . . . . . 50

14.2.8 Data Clear Mask GPIOx_CLEAR_MASK . . . . . . . . . . . . . . 51

14.2.9 Bit Engine Conﬁg GPIOx_BIT_CONF . . . . . . . . . . . . . . . . 51

14.2.10Bit Engine 0 Read/Write GPIOx_BIT_ENG0 . . . . . . . . . . . . . 51

14.2.11Bit Engine 1 Read/Write GPIOx_BIT_ENG1 . . . . . . . . . . . . . 51

14.3 VS1000 GPIO Pin Mappings . . . . . . . . . . . . . . . . . . . . . . . . . 52

14.4 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

15 Interrupt Controller v1.0 2002-04-23 54

15.1Registers .................................... 54

15.1.1 Enable INT_ENABLE[L/H][0/1] . . . . . . . . . . . . . . . . . . . . 55

15.1.2 Origin INT_ORIGIN[0/1] . . . . . . . . . . . . . . . . . . . . . . . . 55

15.1.3 Vector INT_VECTOR . . . . . . . . . . . . . . . . . . . . . . . . . 56

15.1.4 Enable Counter INT_ENCOUNT . . . . . . . . . . . . . . . . . . . 56

15.1.5 Global Disable INT_GLOB_DIS . . . . . . . . . . . . . . . . . . . . 56

15.1.6 Global Enable INT_GLOB_EN . . . . . . . . . . . . . . . . . . . . 56

15.2 VS1000 Interrupt Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

15.3 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

16 SPI v1.3 2005-06-09 58

Rev. 0.20 2011-10-04 Page 4(90)

PKP

VS1000 PROGRAMMER’SGUIDE VSMPG

16.1General ..................................... 58

16.2TheSPIBlock ................................. 59

16.2.1MasterMode .............................. 59

16.2.2SlaveMode............................... 60

16.3Registers .................................... 61

16.3.1 Main Conﬁguration SPIx_CONFIG . . . . . . . . . . . . . . . . . . 61

16.3.2 Clock Conﬁguration SPIx_CLKCONFIG . . . . . . . . . . . . . . . 62

16.3.3 Status SPIx_STATUS . . . . . . . . . . . . . . . . . . . . . . . . . 63

16.3.4DataSPIx_DATA............................ 63

16.3.5 SSI Synchronization SPIx_FSYNC . . . . . . . . . . . . . . . . . . 64

16.4Interrupts .................................... 64

16.5Changesfrom1.2 ............................... 64

16.6 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

16.7 Effect of Clock Multiplier . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

17 Byte-wide bus/Nand Flash controller v1.0 2006-05-10 66

17.1General ..................................... 66

17.2BlockDiagram ................................. 67

17.3Registers .................................... 68

17.3.1Controlregister............................. 68

17.3.2 Line and Column parity registers . . . . . . . . . . . . . . . . . . . 68

17.3.3Dataregister .............................. 69

17.3.4 Interface control towards physical pins . . . . . . . . . . . . . . . . 69

17.3.5 Interface control towards DSP . . . . . . . . . . . . . . . . . . . . . 70

17.3.6 ECC counter register . . . . . . . . . . . . . . . . . . . . . . . . . . 70

17.4Timing...................................... 71

17.5 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

17.5.1 Nand Flash access methodology . . . . . . . . . . . . . . . . . . . 75

18 Timers v1.0 2002-04-23 76

18.1General ..................................... 76

18.2Registers .................................... 76

18.2.1 Conﬁguration TIMER_CONFIG . . . . . . . . . . . . . . . . . . . . 76

18.2.2 Conﬁguration TIMER_ENABLE . . . . . . . . . . . . . . . . . . . . 77

18.2.3 Timer X Startvalue TIMER_Tx[L/H] . . . . . . . . . . . . . . . . . . 77

18.2.4 Timer X Counter TIMER_TxCNT[L/H] . . . . . . . . . . . . . . . . 77

18.3Interrupts .................................... 77

18.4 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

19 UART v1.11 2007-03-16 78

19.1General ..................................... 78

19.2Registers .................................... 78

19.2.1 Status UARTx_STATUS . . . . . . . . . . . . . . . . . . . . . . . . 78

19.2.2DataUARTx_DATA........................... 79

19.2.3 Data High UARTx_DATAH . . . . . . . . . . . . . . . . . . . . . . . 79

19.2.4 Divider UARTx_DIV . . . . . . . . . . . . . . . . . . . . . . . . . . 79

19.3 Interrupts and Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

19.4 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

Rev. 0.20 2011-10-04 Page 5(90)

PKP

VS1000 PROGRAMMER’SGUIDE VSMPG

20 Universal Serial Bus Controller v1.0 2006-01-05 81

20.1General ..................................... 81

20.2Registers .................................... 81

20.2.1 USB_CONFIG - USB Device Conﬁg 0xC080 . . . . . . . . . . . . 82

20.2.2 USB_CONTROL - USB Device Control 0xC081 . . . . . . . . . . . 82

20.2.3 USB_STATUS - USB Device Status 0xC082 . . . . . . . . . . . . . 83

20.2.4 USB_RDPTR - Receive buffer read pointer 0xC083 . . . . . . . . 83

20.2.5 USB_WRPTR - Receive buffer write pointer 0xC084 . . . . . . . . 83

20.2.6 USB_EP_SENDn - EPnIN Transmittable Packet Info 0xC088..0xC08B 84

20.2.7 USB_EP_STn - Endpoint ﬂags EPnIN and EP0nUT 0xC090..0xC093 84

20.3 Receiving Packets from PC (EP0OUT, EP1OUT, ... , EP3OUT) . . . . . . 85

20.3.1Reception................................ 85

20.3.2 Sending Packet to PC (EP0IN, EP1IN, ... , EP3IN) . . . . . . . . . 86

20.3.3 How to know that the PC is expecting data . . . . . . . . . . . . . 86

20.3.4Stalling ................................. 86

20.4 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

20.4.1 Augmenting the ROM functionality . . . . . . . . . . . . . . . . . . 88

20.4.2 Hooking: Example . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

20.4.3 Used memory areas . . . . . . . . . . . . . . . . . . . . . . . . . . 89

21 Watchdog v1.0 2002-08-26 90

21.1General ..................................... 90

21.2Registers .................................... 90

21.3 VS1000 ROM code usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

Rev. 0.20 2011-10-04 Page 6(90)

PKP

VS1000 PROGRAMMER’SGUIDE VSMPG

1 Introducing the VS1000

VS1000 is a complete DSP system-on-chip (SoC) that can be used to implement a mul-

titude of applications such as a single-chip Ogg Vorbis player. VS1000 contains a high-

performance low-power DSP core VS_DSP4, NAND-FLASH interface, Full Speed USB

port, general purpose I/O pins, SPI, UART, as well as a high-quality variable-sample-rate

stereo DAC, and an earphone ampliﬁer and a common voltage buffer.

Reference

Regulator

Common

Voltage

Driver

Voltage

Monitor

Stereo

Earphone

Driver

Stereo

DAC

AVDD1

AVDD2

AVDD3

Serial

Data/

Control

Interface

UART

Clock

NAND

Flash

Interface/

General IO

<1.6V

USB

X RAM

X ROM

Y RAM

Y ROM

I RAM

I ROM

VSDSP4

processor

USBP

USPN

XCS/GPIO1[0]

SCLK/GPIO1[1]

SI/GPIO1[2]

SO/GPIO1[3]

RX/GPIO1[5]

TX/GPIO1[4]

XTALO

XTALI

Data/

GPIO0[0...7]

Control/

GPIO0[8...14]

XRESETTEST

IOVDD

AVDD

CVDD

IOVDD1

IOVDD2

PWRBTN

VHIGHRCAPCBUFRIGHTLEFT

reset

Figure 1: VS1000 Block Diagram

Rev. 0.20 2011-10-04 Page 7(90)

PKP

VS1000 PROGRAMMER’SGUIDE VSMPG

2 VS_DSP Basics

At VS1000’s core is the VS_DSP4 signal processor. It has a 16-bit Harward architecture

with three separate 16-bit address spaces: X and Y space for data and I space for

instructions (running code). All of these spaces have both ROM and RAM. In addition,

X and or Y spaces can occupy special function registers for peripheral devices.

X memory Y memory

PROGRAM

CONTROL

Program

memory

VS_DSP CORE

DATAPATH

arithmetic

registers

P register

ALU

X and Y

memory

ADDRESS

CALCULATION

address

registers

Y address

ALU

X address

ALU

control

registers

decode

logic

Peripheral

interface

PLL clock

generator

Peripheral

devices

Interrupt

arbitrator

Boot loader

Bus switch

Figure 2: VS_DSP General Architecture

Most of the features of the VS_DSP processor can be accessed by using standard C

language, without any speciﬁc VS_DSP knowledge. But if you need to develop really

powerful DSP algorithms, use the 40-bit datapath, control the pipeline and take the max-

imum out of the parallel X, Y and I buses, you need to study the VS_DSP architecture

and use assembly language.

The VS_DSP4 architecture manual is included in the VS1000-speciﬁc command-line

tools package (vskit140.zip), and also in VSIDE releases. Both packages are down-

loadable from VLSI Solution’s website (www.vlsi.ﬁ).

Rev. 0.20 2011-10-04 Page 8(90)

PKP

VS1000 PROGRAMMER’SGUIDE VSMPG

3 VS1000 RAM Memory Map

0000

3800

0400

0800

0c00

1000

1400

1800

1c00

2000

2400

2800

2c00

3000

3400

3c00

4000

mallocAreaX

System variables

(Vorbis heap)

audio buffer

mallocAreaY

IMDCT workspace

Y RAM (16−bit)

System Y

variables

User Y statics

Static user variables

IMDCT workspace

Vorbis

workspace

1A00

1B32

1BFF

1F85

X RAM (16−bit)

USB Receive

USB Send

4096 words

(8192 bytes) (8192 bytes)

4096 words

2K words (4K bytes)

I RAM (32−bit)

Interrupt vector (80 words)

USER CODE

1968 words = 7872 bytes

Reserved user static memory: 7872 bytes I + 2240 bytes X + 412 bytes Y, total: 10524 bytes

9216 words

(18432 bytes)

ing vorbis and disk cache,

when USB is connected)

(Vorbis heap when play−

Total stack space: 1024 bytes X + 1024 bytes Y, total: 2048 bytes (for user and system)

Total RAM space: 26624 bytes X + 32768 bytes Y + 8192 bytes I, total: 67584 bytes

stack space and function local variables

Figure 3: VS1000B RAM layout

While playing Ogg Vorbis audio the memory areas available for user are 0x1fa0 to 0x23ff

(1120 words) in X data memory and 0x1b32 to 0x1bff (206 words) in Y data memory.

These areas are included in the default memory description ﬁle (mem_desc.vs1000), so

linker can allocate variables into those memory areas.

More memory can be used as temporary storage when audio is not being decoded.

Rev. 0.20 2011-10-04 Page 9(90)

PKP

VS1000 PROGRAMMER’SGUIDE VSMPG

4 VS1000 Integrated Peripherals

VS1000 contains several integrated peripherals. They are controlled by memory-mapped

special function registers. From the programmer’s point of view this means reading and

writing special memory locations. The peripheral registers in VS1000 are located in the

X address space.

VS1000 chip has the following integrated peripherals:

•21 GPIO pins multiplexed with peripherals, each capable of generating an interrupt

•SPI port with master/slave operation and programmable Frame Sync

•UART port with programmable bit rate and framing error detection

•USB port with 12 Mbit/s signaling rate and 4 KiB of buffer memory

•Digital-to-Analog converter and integrated earphone driver

•Byte-wide Bus / Nand Flash controller with fast 32-byte buffer and ECC calculation

•2 32-bit timers with shared master clock divider

•Interrupt controller, 11 interrupt sources

•3 programmable linear regulators for generating analog, I/O and core voltages

•Internal oscillator for external crystal, can also use external oscillator

•Integrated Clock Generator with PLL and clock multiplier and low-speed modes

•Watchdog timer

The VS1000 has 76 KiB of program ROM and 8 KiB of program RAM. While the latter

might seem like a small amount, note that the ROM code contains many useful rou-

tines, interfaces and tables the RAM code can access. Many internal functions can be

replaced or augmented by hooking a handler vector of a ROM routine.

The amount of data RAM available varies depending on the application. If Vorbis playing

is not used, it can be over 50 KiB. For programs that do play Vorbis ﬁles, at least 2652

bytes can be used when Vorbis ﬁles are playing.

The complete peripheral documentation is in its own chapter.

Rev. 0.20 2011-10-04 Page 10(90)

Autres manuels pour VS1000

Table des matières

Manuels Convertisseur de média populaires d'autres marques

SoundTraxx

SoundTraxx Blunami BLU-2200 Manuel utilisateur

SPROLINK

SPROLINK VA1 Manuel utilisateur

Acclaim Lighting

Acclaim Lighting DDC-1-AC Manuel utilisateur

Nikon

Nikon AF-S TC-20E III Manuel utilisateur

Axis

Axis AXIS Q7406 Manuel utilisateur

Omega

Omega TAC80B-J Manuel utilisateur

Zoom

Zoom Thunderbolt TAC-2R Manuel utilisateur

OST

OST iConverter 10/100M Manuel utilisateur

Vertiv

Vertiv Netsure Manuel utilisateur

birddog

birddog MINI Manuel utilisateur

Roland

Roland GI-10 Manuel utilisateur

Wallenstein

Wallenstein WX310 Manuel utilisateur

Pace

Pace MSS 200-1 Manuel utilisateur

Solar Converters

Solar Converters EQ 12/24-50 Manuel utilisateur

CYP

CYP EL-7400V Manuel utilisateur

TIE

TIE MIDI 1i1o Manuel utilisateur

DCS

DCS Vivaldi Upsampler Manuel utilisateur

Westermo

Westermo MCW-211 SERIES Manuel utilisateur